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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2025-09-19 09:37:36 +0900 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-09-19 09:37:36 +0900 |
| commit | 116ca9522e89f1e4e02676b5bbe505e80c4d4933 (patch) | |
| tree | 4151a2160d381b9f03f14267815beaf4d510b3e4 /clang/lib/AST/ByteCode/Compiler.cpp | |
| parent | 33e8e5a84643f3e2aeb5d85e58000b2a1ba9d3df (diff) | |
| download | llvm-116ca9522e89f1e4e02676b5bbe505e80c4d4933.zip llvm-116ca9522e89f1e4e02676b5bbe505e80c4d4933.tar.gz llvm-116ca9522e89f1e4e02676b5bbe505e80c4d4933.tar.bz2 | |
Greedy: Take copy hints involving subregisters (#159570)
Previously this would only accept full copy hints. This relaxes
this to accept some subregister copies. Specifically, this now
accepts:
- Copies to/from physical registers if there is a compatible
super register
- Subreg-to-subreg copies
This has the potential to repeatedly add the same hint to the
hint vector, but not sure if that's a real problem.
Diffstat (limited to 'clang/lib/AST/ByteCode/Compiler.cpp')
0 files changed, 0 insertions, 0 deletions