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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2022-08-26 17:34:43 +0100 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2022-08-26 17:34:52 +0100 |
| commit | f9445ae75c55ce4a0ff33bdaedefee00b9a27704 (patch) | |
| tree | 4ed1e3a825a7cf4aa95bacc545aa18efb4764201 | |
| parent | 7790518c1fd9729032c40f2d19a074093c6ff102 (diff) | |
| download | llvm-f9445ae75c55ce4a0ff33bdaedefee00b9a27704.zip llvm-f9445ae75c55ce4a0ff33bdaedefee00b9a27704.tar.gz llvm-f9445ae75c55ce4a0ff33bdaedefee00b9a27704.tar.bz2 | |
[CostModel][X86] Add CodeSize handling for fneg ops
Eventually this will be part of the cost table lookup
| -rw-r--r-- | llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 1 | ||||
| -rw-r--r-- | llvm/test/Analysis/CostModel/X86/arith-fp-codesize.ll | 53 |
2 files changed, 44 insertions, 10 deletions
diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp index 8dfd0d9..db261ea 100644 --- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp +++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp @@ -1110,6 +1110,7 @@ InstructionCost X86TTIImpl::getArithmeticInstrCost( case ISD::FSUB: case ISD::FMUL: case ISD::FDIV: + case ISD::FNEG: return LT.first; break; } diff --git a/llvm/test/Analysis/CostModel/X86/arith-fp-codesize.ll b/llvm/test/Analysis/CostModel/X86/arith-fp-codesize.ll index b3991a8..bc55018 100644 --- a/llvm/test/Analysis/CostModel/X86/arith-fp-codesize.ll +++ b/llvm/test/Analysis/CostModel/X86/arith-fp-codesize.ll @@ -186,16 +186,49 @@ define i32 @fneg_idiom(i32 %arg) { } define i32 @fneg(i32 %arg) { -; CHECK-LABEL: 'fneg' -; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fneg float undef -; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fneg <4 x float> undef -; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = fneg <8 x float> undef -; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16F32 = fneg <16 x float> undef -; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fneg double undef -; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fneg <2 x double> undef -; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = fneg <4 x double> undef -; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F64 = fneg <8 x double> undef -; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; SSE1-LABEL: 'fneg' +; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fneg float undef +; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fneg <4 x float> undef +; SSE1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fneg <8 x float> undef +; SSE1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = fneg <16 x float> undef +; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fneg double undef +; SSE1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = fneg <2 x double> undef +; SSE1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = fneg <4 x double> undef +; SSE1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8F64 = fneg <8 x double> undef +; SSE1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; +; SSE2-LABEL: 'fneg' +; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fneg float undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fneg <4 x float> undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fneg <8 x float> undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = fneg <16 x float> undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fneg double undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fneg <2 x double> undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = fneg <4 x double> undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F64 = fneg <8 x double> undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; +; AVX-LABEL: 'fneg' +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fneg float undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fneg <4 x float> undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = fneg <8 x float> undef +; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F32 = fneg <16 x float> undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fneg double undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fneg <2 x double> undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = fneg <4 x double> undef +; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F64 = fneg <8 x double> undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; +; AVX512-LABEL: 'fneg' +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fneg float undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fneg <4 x float> undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = fneg <8 x float> undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16F32 = fneg <16 x float> undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fneg double undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fneg <2 x double> undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = fneg <4 x double> undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F64 = fneg <8 x double> undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef ; %F32 = fneg float undef %V4F32 = fneg <4 x float> undef |
