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authorCraig Topper <craig.topper@sifive.com>2022-08-10 21:43:52 -0700
committerCraig Topper <craig.topper@sifive.com>2022-08-10 21:44:08 -0700
commitbc1f78cc3ba3120ab78671a72003723161fcd2ea (patch)
tree062bb527ba7b4d0e6113e9e6452a99d5d3cf2639
parent02e56e2533027833ff2ca0042fae9cfaa2d85aa6 (diff)
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[RISCV] Rename PROC_ALIAS to TUNE_ALIAS to reflect it's usage. NFC
This is not used as general CPU alias. Only to support -mtune. Name it as such. Reviewed By: kito-cheng Differential Revision: https://reviews.llvm.org/D131602
-rw-r--r--llvm/include/llvm/Support/RISCVTargetParser.def12
-rw-r--r--llvm/lib/Support/TargetParser.cpp4
2 files changed, 8 insertions, 8 deletions
diff --git a/llvm/include/llvm/Support/RISCVTargetParser.def b/llvm/include/llvm/Support/RISCVTargetParser.def
index f658cdb..2bf9c12 100644
--- a/llvm/include/llvm/Support/RISCVTargetParser.def
+++ b/llvm/include/llvm/Support/RISCVTargetParser.def
@@ -1,12 +1,12 @@
-#ifndef PROC_ALIAS
-#define PROC_ALIAS(NAME, RV32, RV64)
+#ifndef TUNE_ALIAS
+#define TUNE_ALIAS(NAME, RV32, RV64)
#endif
-PROC_ALIAS("generic", "generic-rv32", "generic-rv64")
-PROC_ALIAS("rocket", "rocket-rv32", "rocket-rv64")
-PROC_ALIAS("sifive-7-series", "sifive-7-rv32", "sifive-7-rv64")
+TUNE_ALIAS("generic", "generic-rv32", "generic-rv64")
+TUNE_ALIAS("rocket", "rocket-rv32", "rocket-rv64")
+TUNE_ALIAS("sifive-7-series", "sifive-7-rv32", "sifive-7-rv64")
-#undef PROC_ALIAS
+#undef TUNE_ALIAS
#ifndef PROC
#define PROC(ENUM, NAME, FEATURES, DEFAULT_MARCH)
diff --git a/llvm/lib/Support/TargetParser.cpp b/llvm/lib/Support/TargetParser.cpp
index e5590d4..cd72c97 100644
--- a/llvm/lib/Support/TargetParser.cpp
+++ b/llvm/lib/Support/TargetParser.cpp
@@ -290,7 +290,7 @@ CPUKind parseCPUKind(StringRef CPU) {
StringRef resolveTuneCPUAlias(StringRef TuneCPU, bool IsRV64) {
return llvm::StringSwitch<StringRef>(TuneCPU)
-#define PROC_ALIAS(NAME, RV32, RV64) .Case(NAME, IsRV64 ? StringRef(RV64) : StringRef(RV32))
+#define TUNE_ALIAS(NAME, RV32, RV64) .Case(NAME, IsRV64 ? StringRef(RV64) : StringRef(RV32))
#include "llvm/Support/RISCVTargetParser.def"
.Default(TuneCPU);
}
@@ -321,7 +321,7 @@ void fillValidTuneCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64) {
if (C.Kind != CK_INVALID && IsRV64 == C.is64Bit())
Values.emplace_back(C.Name);
}
-#define PROC_ALIAS(NAME, RV32, RV64) Values.emplace_back(StringRef(NAME));
+#define TUNE_ALIAS(NAME, RV32, RV64) Values.emplace_back(StringRef(NAME));
#include "llvm/Support/RISCVTargetParser.def"
}