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author | Craig Topper <craig.topper@sifive.com> | 2024-10-09 22:55:01 -0700 |
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committer | GitHub <noreply@github.com> | 2024-10-09 22:55:01 -0700 |
commit | 527cd117b2cb189f59ba64882b2bc5d15e35eefb (patch) | |
tree | 287083cacf09b54ea464e7d963f05b67bd83fa56 | |
parent | 9432f7074c8ebacd33cb0b271054881c8f566276 (diff) | |
download | llvm-527cd117b2cb189f59ba64882b2bc5d15e35eefb.zip llvm-527cd117b2cb189f59ba64882b2bc5d15e35eefb.tar.gz llvm-527cd117b2cb189f59ba64882b2bc5d15e35eefb.tar.bz2 |
[RISCV] Move testing of Smrnmi CSRs to machine-csr-names.s. NFC (#111790)
I incorrectly put them in rv32-machine-csr-names.s which only tests
RV32.
-rw-r--r-- | llvm/test/MC/RISCV/machine-csr-names.s | 56 | ||||
-rw-r--r-- | llvm/test/MC/RISCV/rv32-machine-csr-names.s | 56 |
2 files changed, 56 insertions, 56 deletions
diff --git a/llvm/test/MC/RISCV/machine-csr-names.s b/llvm/test/MC/RISCV/machine-csr-names.s index ae1af1f..8cfdf7e 100644 --- a/llvm/test/MC/RISCV/machine-csr-names.s +++ b/llvm/test/MC/RISCV/machine-csr-names.s @@ -2585,3 +2585,59 @@ csrrs t2, 0x309, zero csrrs t1, mctrctl, zero # uimm12 csrrs t2, 0x34E, zero + +################################################ +# Resumable Non-Maskable Interrupts(Smrnmi) CSRs +################################################ + +# mnscratch +# name +# CHECK-INST: csrrs t1, mnscratch, zero +# CHECK-ENC: encoding: [0x73,0x23,0x00,0x74] +# CHECK-INST-ALIAS: csrr t1, mnscratch +# uimm12 +# CHECK-INST: csrrs t2, mnscratch, zero +# CHECK-ENC: encoding: [0xf3,0x23,0x00,0x74] +# CHECK-INST-ALIAS: csrr t2, mnscratch +csrrs t1, mnscratch, zero +# uimm12 +csrrs t2, 0x740, zero + +# mnepc +# name +# CHECK-INST: csrrs t1, mnepc, zero +# CHECK-ENC: encoding: [0x73,0x23,0x10,0x74] +# CHECK-INST-ALIAS: csrr t1, mnepc +# uimm12 +# CHECK-INST: csrrs t2, mnepc, zero +# CHECK-ENC: encoding: [0xf3,0x23,0x10,0x74] +# CHECK-INST-ALIAS: csrr t2, mnepc +csrrs t1, mnepc, zero +# uimm12 +csrrs t2, 0x741, zero + +# mncause +# name +# CHECK-INST: csrrs t1, mncause, zero +# CHECK-ENC: encoding: [0x73,0x23,0x20,0x74] +# CHECK-INST-ALIAS: csrr t1, mncause +# uimm12 +# CHECK-INST: csrrs t2, mncause, zero +# CHECK-ENC: encoding: [0xf3,0x23,0x20,0x74] +# CHECK-INST-ALIAS: csrr t2, mncause +csrrs t1, mncause, zero +# uimm12 +csrrs t2, 0x742, zero + +# mnstatus +# name +# CHECK-INST: csrrs t1, mnstatus, zero +# CHECK-ENC: encoding: [0x73,0x23,0x40,0x74] +# CHECK-INST-ALIAS: csrr t1, mnstatus +# uimm12 +# CHECK-INST: csrrs t2, mnstatus, zero +# CHECK-ENC: encoding: [0xf3,0x23,0x40,0x74] +# CHECK-INST-ALIAS: csrr t2, mnstatus +csrrs t1, mnstatus, zero +# uimm12 +csrrs t2, 0x744, zero diff --git a/llvm/test/MC/RISCV/rv32-machine-csr-names.s b/llvm/test/MC/RISCV/rv32-machine-csr-names.s index 016f448..e7a6d9c 100644 --- a/llvm/test/MC/RISCV/rv32-machine-csr-names.s +++ b/llvm/test/MC/RISCV/rv32-machine-csr-names.s @@ -1149,59 +1149,3 @@ csrrs t2, 0x319, zero csrrs t1, miph, zero # uimm12 csrrs t2, 0x354, zero - -################################################ -# Resumable Non-Maskable Interrupts(Smrnmi) CSRs -################################################ - -# mnscratch -# name -# CHECK-INST: csrrs t1, mnscratch, zero -# CHECK-ENC: encoding: [0x73,0x23,0x00,0x74] -# CHECK-INST-ALIAS: csrr t1, mnscratch -# uimm12 -# CHECK-INST: csrrs t2, mnscratch, zero -# CHECK-ENC: encoding: [0xf3,0x23,0x00,0x74] -# CHECK-INST-ALIAS: csrr t2, mnscratch -csrrs t1, mnscratch, zero -# uimm12 -csrrs t2, 0x740, zero - -# mnepc -# name -# CHECK-INST: csrrs t1, mnepc, zero -# CHECK-ENC: encoding: [0x73,0x23,0x10,0x74] -# CHECK-INST-ALIAS: csrr t1, mnepc -# uimm12 -# CHECK-INST: csrrs t2, mnepc, zero -# CHECK-ENC: encoding: [0xf3,0x23,0x10,0x74] -# CHECK-INST-ALIAS: csrr t2, mnepc -csrrs t1, mnepc, zero -# uimm12 -csrrs t2, 0x741, zero - -# mncause -# name -# CHECK-INST: csrrs t1, mncause, zero -# CHECK-ENC: encoding: [0x73,0x23,0x20,0x74] -# CHECK-INST-ALIAS: csrr t1, mncause -# uimm12 -# CHECK-INST: csrrs t2, mncause, zero -# CHECK-ENC: encoding: [0xf3,0x23,0x20,0x74] -# CHECK-INST-ALIAS: csrr t2, mncause -csrrs t1, mncause, zero -# uimm12 -csrrs t2, 0x742, zero - -# mnstatus -# name -# CHECK-INST: csrrs t1, mnstatus, zero -# CHECK-ENC: encoding: [0x73,0x23,0x40,0x74] -# CHECK-INST-ALIAS: csrr t1, mnstatus -# uimm12 -# CHECK-INST: csrrs t2, mnstatus, zero -# CHECK-ENC: encoding: [0xf3,0x23,0x40,0x74] -# CHECK-INST-ALIAS: csrr t2, mnstatus -csrrs t1, mnstatus, zero -# uimm12 -csrrs t2, 0x744, zero |