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authorJim Grosbach <grosbach@apple.com>2011-08-23 18:39:41 +0000
committerJim Grosbach <grosbach@apple.com>2011-08-23 18:39:41 +0000
commit505be7590067ac686dd6a8bc671a65f8940b9565 (patch)
tree4f5c4bee56bc43df8bd72587514bb0d44bafc16a
parent6e546e0725a8af2b296f2866c04b3dca47b20f76 (diff)
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Thumb parsing and encoding for tSTRspi.
llvm-svn: 138348
-rw-r--r--llvm/lib/Target/ARM/ARMInstrThumb.td2
-rw-r--r--llvm/test/MC/ARM/basic-thumb-instructions.s8
2 files changed, 10 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrThumb.td b/llvm/lib/Target/ARM/ARMInstrThumb.td
index 563b0ef..c54aae0 100644
--- a/llvm/lib/Target/ARM/ARMInstrThumb.td
+++ b/llvm/lib/Target/ARM/ARMInstrThumb.td
@@ -194,6 +194,8 @@ def t_addrmode_is1 : Operand<i32>,
// t_addrmode_sp := sp + imm8 * 4
//
+// FIXME: This really shouldn't have an explicit SP operand at all. It should
+// be implicit, just like in the instruction encoding itself.
def t_addrmode_sp_asm_operand : AsmOperandClass { let Name = "MemThumbSPI"; }
def t_addrmode_sp : Operand<i32>,
ComplexPattern<i32, 2, "SelectThumbAddrModeSP", []> {
diff --git a/llvm/test/MC/ARM/basic-thumb-instructions.s b/llvm/test/MC/ARM/basic-thumb-instructions.s
index a8d13cf..b2e7345 100644
--- a/llvm/test/MC/ARM/basic-thumb-instructions.s
+++ b/llvm/test/MC/ARM/basic-thumb-instructions.s
@@ -444,11 +444,19 @@ _func:
str r2, [r7, #0]
str r5, [r1, #4]
str r3, [r7, #124]
+ str r2, [sp]
+ str r3, [sp, #0]
+ str r4, [sp, #20]
+ str r5, [sp, #1020]
@ CHECK: str r2, [r7] @ encoding: [0x3a,0x60]
@ CHECK: str r2, [r7] @ encoding: [0x3a,0x60]
@ CHECK: str r5, [r1, #4] @ encoding: [0x4d,0x60]
@ CHECK: str r3, [r7, #124] @ encoding: [0xfb,0x67]
+@ CHECK: str r2, [sp] @ encoding: [0x00,0x92]
+@ CHECK: str r3, [sp] @ encoding: [0x00,0x93]
+@ CHECK: str r4, [sp, #20] @ encoding: [0x05,0x94]
+@ CHECK: str r5, [sp, #1020] @ encoding: [0xff,0x95]
@------------------------------------------------------------------------------