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| author | ZhaoQi <zhaoqi01@loongson.cn> | 2025-10-20 15:23:28 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-10-20 07:23:28 +0000 |
| commit | 4d6f43d64f07f5adc9f37212756794e20b4ae8c5 (patch) | |
| tree | 633d36d54862ddd04e482ae17cc8f7ed47b25afa | |
| parent | d4b504ff2038385bbe162e33a7a2560ed564731f (diff) | |
| download | llvm-4d6f43d64f07f5adc9f37212756794e20b4ae8c5.zip llvm-4d6f43d64f07f5adc9f37212756794e20b4ae8c5.tar.gz llvm-4d6f43d64f07f5adc9f37212756794e20b4ae8c5.tar.bz2 | |
[LoongArch][NFC] Pre-commit tests for `xvshuf4i.d` (#164210)
| -rw-r--r-- | llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvshuf4i.ll | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvshuf4i.ll b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvshuf4i.ll index 37b62ca..69437a2 100644 --- a/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvshuf4i.ll +++ b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvshuf4i.ll @@ -33,6 +33,18 @@ define <8 x i32> @shufflevector_xvshuf4i_v8i32(<8 x i32> %a, <8 x i32> %b) { ret <8 x i32> %c } +;; xvshuf4i.d +define <4 x i64> @shufflevector_xvshuf4i_v4i64(<4 x i64> %a, <4 x i64> %b) { +; CHECK-LABEL: shufflevector_xvshuf4i_v4i64: +; CHECK: # %bb.0: +; CHECK-NEXT: xvbsrl.v $xr0, $xr0, 8 +; CHECK-NEXT: xvbsll.v $xr1, $xr1, 8 +; CHECK-NEXT: xvor.v $xr0, $xr1, $xr0 +; CHECK-NEXT: ret + %c = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> <i32 1, i32 4, i32 3, i32 6> + ret <4 x i64> %c +} + ;; xvshuf4i.w define <8 x float> @shufflevector_xvshuf4i_v8f32(<8 x float> %a, <8 x float> %b) { ; CHECK-LABEL: shufflevector_xvshuf4i_v8f32: @@ -42,3 +54,16 @@ define <8 x float> @shufflevector_xvshuf4i_v8f32(<8 x float> %a, <8 x float> %b) %c = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4> ret <8 x float> %c } + +;; xvshuf4i.d +define <4 x double> @shufflevector_xvshuf4i_v4f64(<4 x double> %a, <4 x double> %b) { +; CHECK-LABEL: shufflevector_xvshuf4i_v4f64: +; CHECK: # %bb.0: +; CHECK-NEXT: pcalau12i $a0, %pc_hi20(.LCPI5_0) +; CHECK-NEXT: xvld $xr2, $a0, %pc_lo12(.LCPI5_0) +; CHECK-NEXT: xvshuf.d $xr2, $xr1, $xr0 +; CHECK-NEXT: xvori.b $xr0, $xr2, 0 +; CHECK-NEXT: ret + %c = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3> + ret <4 x double> %c +} |
