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| author | Jinsong Ji <jji@us.ibm.com> | 2019-09-13 14:18:36 +0000 |
|---|---|---|
| committer | Jinsong Ji <jji@us.ibm.com> | 2019-09-13 14:18:36 +0000 |
| commit | 455a0db01a04ca28b97f363fc822cbbadf89a59e (patch) | |
| tree | 162b6b8d12aae817376e4fcb0c5dc94893bb0f54 | |
| parent | b4160cb94c54f0b31d0ce14694950dac7b6cd83f (diff) | |
| download | llvm-455a0db01a04ca28b97f363fc822cbbadf89a59e.zip llvm-455a0db01a04ca28b97f363fc822cbbadf89a59e.tar.gz llvm-455a0db01a04ca28b97f363fc822cbbadf89a59e.tar.bz2 | |
[PowerPC][NFC] Move codegen tests to PowerPC from MIR/PowerPC
All tests with -run-pass !=none should not in MIR/, See MIR/README.
```
Tests for codegen passes should NOT be here but in
test/CodeGen/sometarget. As
a rule of thumb this directory should only contain tests using
'llc -run-pass none'.
```
llvm-svn: 371857
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/ifcvt-diamond-ret.mir (renamed from llvm/test/CodeGen/MIR/PowerPC/ifcvt-diamond-ret.mir) | 0 | ||||
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/machine-backward-cp.mir (renamed from llvm/test/CodeGen/MIR/PowerPC/machine-backward-cp.mir) | 0 | ||||
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/peephole-miscompile-extswsli.mir (renamed from llvm/test/CodeGen/MIR/PowerPC/peephole-miscompile-extswsli.mir) | 0 | ||||
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/prolog_vec_spills.mir (renamed from llvm/test/CodeGen/MIR/PowerPC/prolog_vec_spills.mir) | 0 |
4 files changed, 0 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/MIR/PowerPC/ifcvt-diamond-ret.mir b/llvm/test/CodeGen/PowerPC/ifcvt-diamond-ret.mir index bf8ce2b..bf8ce2b 100644 --- a/llvm/test/CodeGen/MIR/PowerPC/ifcvt-diamond-ret.mir +++ b/llvm/test/CodeGen/PowerPC/ifcvt-diamond-ret.mir diff --git a/llvm/test/CodeGen/MIR/PowerPC/machine-backward-cp.mir b/llvm/test/CodeGen/PowerPC/machine-backward-cp.mir index c485600..c485600 100644 --- a/llvm/test/CodeGen/MIR/PowerPC/machine-backward-cp.mir +++ b/llvm/test/CodeGen/PowerPC/machine-backward-cp.mir diff --git a/llvm/test/CodeGen/MIR/PowerPC/peephole-miscompile-extswsli.mir b/llvm/test/CodeGen/PowerPC/peephole-miscompile-extswsli.mir index 9f50a07..9f50a07 100644 --- a/llvm/test/CodeGen/MIR/PowerPC/peephole-miscompile-extswsli.mir +++ b/llvm/test/CodeGen/PowerPC/peephole-miscompile-extswsli.mir diff --git a/llvm/test/CodeGen/MIR/PowerPC/prolog_vec_spills.mir b/llvm/test/CodeGen/PowerPC/prolog_vec_spills.mir index 59df0e1..59df0e1 100644 --- a/llvm/test/CodeGen/MIR/PowerPC/prolog_vec_spills.mir +++ b/llvm/test/CodeGen/PowerPC/prolog_vec_spills.mir |