aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorAmaury Sechet <deadalnix@gmail.com>2019-08-28 13:52:32 +0000
committerAmaury Sechet <deadalnix@gmail.com>2019-08-28 13:52:32 +0000
commit3b44c36b296d18b09fb8ea1284b6449de71c6f81 (patch)
treec1b65b40550930c0b793ce712ff09757849d4d8b
parent2dddf3e4ff813710d5ee529a8f5d077623f4a20e (diff)
downloadllvm-3b44c36b296d18b09fb8ea1284b6449de71c6f81.zip
llvm-3b44c36b296d18b09fb8ea1284b6449de71c6f81.tar.gz
llvm-3b44c36b296d18b09fb8ea1284b6449de71c6f81.tar.bz2
[X86] Add test for rotate combining when add X, X is used instead of shl X, 1. NFC
llvm-svn: 370203
-rw-r--r--llvm/test/CodeGen/X86/rotate-extract-vector.ll14
-rw-r--r--llvm/test/CodeGen/X86/rotate-extract.ll23
2 files changed, 37 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/rotate-extract-vector.ll b/llvm/test/CodeGen/X86/rotate-extract-vector.ll
index 4959de7..c439ffc 100644
--- a/llvm/test/CodeGen/X86/rotate-extract-vector.ll
+++ b/llvm/test/CodeGen/X86/rotate-extract-vector.ll
@@ -280,3 +280,17 @@ define <2 x i64> @no_extract_udiv(<2 x i64> %i) nounwind {
%out = or <2 x i64> %lhs_shift, %rhs_div
ret <2 x i64> %out
}
+
+; DAGCombiner transforms shl X, 1 into add X, X.
+define <4 x i32> @extract_add_1(<4 x i32> %i) nounwind {
+; CHECK-LABEL: extract_add_1:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vpaddd %xmm0, %xmm0, %xmm1
+; CHECK-NEXT: vpsrld $31, %xmm0, %xmm0
+; CHECK-NEXT: vpor %xmm0, %xmm1, %xmm0
+; CHECK-NEXT: ret{{[l|q]}}
+ %ii = add <4 x i32> %i, %i
+ %rhs = lshr <4 x i32> %i, <i32 31, i32 31, i32 31, i32 31>
+ %out = or <4 x i32> %ii, %rhs
+ ret <4 x i32> %out
+}
diff --git a/llvm/test/CodeGen/X86/rotate-extract.ll b/llvm/test/CodeGen/X86/rotate-extract.ll
index e5228d2..62d1616 100644
--- a/llvm/test/CodeGen/X86/rotate-extract.ll
+++ b/llvm/test/CodeGen/X86/rotate-extract.ll
@@ -265,3 +265,26 @@ define i8 @no_extract_udiv(i8 %i) nounwind {
%out = or i8 %lhs_shift, %rhs_div
ret i8 %out
}
+
+; DAGCombiner transforms shl X, 1 into add X, X.
+define i32 @extract_add_1(i32 %i) nounwind {
+; X86-LABEL: extract_add_1:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: leal (%ecx,%ecx), %eax
+; X86-NEXT: shrl $31, %ecx
+; X86-NEXT: orl %ecx, %eax
+; X86-NEXT: retl
+;
+; X64-LABEL: extract_add_1:
+; X64: # %bb.0:
+; X64-NEXT: # kill: def $edi killed $edi def $rdi
+; X64-NEXT: leal (%rdi,%rdi), %eax
+; X64-NEXT: shrl $31, %edi
+; X64-NEXT: orl %edi, %eax
+; X64-NEXT: retq
+ %ii = add i32 %i, %i
+ %rhs = lshr i32 %i, 31
+ %out = or i32 %ii, %rhs
+ ret i32 %out
+}