Use minimal types for generated expressions

  We now use the minimal necessary bit width for the generated code. If
  operations might overflow (add/sub/mul) we will try to adjust the types in
  order to ensure a non-wrapping computation. If the type adjustment is not
  possible, thus the necessary type is bigger than the type value of
  --polly-max-expr-bit-width, we will use assumptions to verify the computation
  will not wrap. However, for run-time checks we cannot build assumptions but
  instead utilize overflow tracking intrinsics.

llvm-svn: 271878

49 files changed, 357 insertions, 308 deletions

diff --git a/polly/include/polly/CodeGen/IslExprBuilder.h b/polly/include/polly/CodeGen/IslExprBuilder.h
index 13b0763..f357569 100644
--- a/polly/include/polly/CodeGen/IslExprBuilder.h
+++ b/polly/include/polly/CodeGen/IslExprBuilder.h
@@ -69,24 +69,17 @@ namespace polly {
 /// When lowering to LLVM-IR we need to chose both the size of the data type and
 /// the sign of the operations we use.
 ///
-/// At the moment, we hardcode i64 bit signed computations. Our experience has
-/// shown that 64 bit are generally large enough for the loop bounds that appear
-/// in the wild. Signed computations are needed, as loop bounds may become
-/// negative.
+/// We use the minimal necessary bit width for the generated code and always
+/// interpret values as signed. If operations might overflow (add/sub/mul) we
+/// will try to adjust the types in order to ensure a non-wrapping computation.
+/// If the type adjustment is not possible (e.g., the necessary type is bigger
+/// than the type value of --polly-max-expr-bit-width) we will use assumptions
+/// to verify the computation will not wrap. However, for run-time checks we
+/// cannot build assumptions but instead utilize overflow tracking intrinsics.
 ///
 /// It is possible to track overflows that occured in the generated IR. See the
 /// description of @see OverflowState for more information.
 ///
-/// FIXME: Hardcoding sizes can cause issues:
-///
-///   -  On embedded systems and especially for high-level-synthesis 64 bit
-///      computations are very costly.
-///
-///   The right approach is to compute the minimal necessary bitwidth and
-///   signedness for each subexpression during in the isl AST generation and
-///   to use this information in our IslAstGenerator. Preliminary patches are
-///   available, but have not been committed yet.
-///
 class IslExprBuilder {
 public:
   /// @brief A map from isl_ids to llvm::Values.
@@ -128,6 +121,26 @@ public:
   /// The same as unifyTypes above but for three values instead of two.
   void unifyTypes(llvm::Value *&V0, llvm::Value *&V1, llvm::Value *&V2);
 
+  /// @brief Adjust the types of @p V0 and @p V1 in-place.
+  ///
+  /// @param V0               One operand of an operation.
+  /// @param V1               Another operand of an operation.
+  /// @param RequiredBitWidth The bit with required for a safe operation.
+  ///
+  /// @return True if the new type has at least @p RequiredBitWidth bits.
+  bool adjustTypesForSafeComputation(llvm::Value *&V0, llvm::Value *&V1,
+                                     unsigned RequiredBitWidth);
+
+  /// @brief Unify the types of @p LHS and @p RHS in-place for an add/sub op.
+  ///
+  /// @return False if an additive operation of @p LHS and @p RHS can overflow.
+  bool adjustTypesForSafeAddition(llvm::Value *&LHS, llvm::Value *&RHS);
+
+  /// @brief Unify the types of @p LHS and @p RHS in-place for a mul op.
+  ///
+  /// @return False if a multiplication of @p LHS and @p RHS can overflow.
+  bool adjustTypesForSafeMultiplication(llvm::Value *&LHS, llvm::Value *&RHS);
+
   /// @brief Return the type with which this expression should be computed.
   ///
   /// The type needs to be large enough to hold all possible input and all
diff --git a/polly/lib/CodeGen/IslExprBuilder.cpp b/polly/lib/CodeGen/IslExprBuilder.cpp
index 7dcc651..b2bfbf9 100644
--- a/polly/lib/CodeGen/IslExprBuilder.cpp
+++ b/polly/lib/CodeGen/IslExprBuilder.cpp
@@ -39,6 +39,12 @@ static cl::opt<OverflowTrackingChoice> OTMode(
                clEnumValEnd),
     cl::Hidden, cl::init(OT_REQUEST), cl::ZeroOrMore, cl::cat(PollyCategory));
 
+// @TODO This should actually be derived from the DataLayout.
+static cl::opt<unsigned> PollyMaxAllowedBitWidth(
+    "polly-max-expr-bit-width",
+    cl::desc("The maximal bit with for generated expressions."), cl::Hidden,
+    cl::ZeroOrMore, cl::init(64), cl::cat(PollyCategory));
+
 IslExprBuilder::IslExprBuilder(Scop &S, PollyIRBuilder &Builder,
                                IDToValueTy &IDToValue, ValueMapT &GlobalMap,
                                const DataLayout &DL, ScalarEvolution &SE,
@@ -74,13 +80,23 @@ Value *IslExprBuilder::getOverflowState() const {
 
 Value *IslExprBuilder::createBinOp(BinaryOperator::BinaryOps Opc, Value *LHS,
                                    Value *RHS, const Twine &Name) {
-  // @TODO Temporarily promote types of potentially overflowing binary
-  //       operations to at least i64.
-  Value *I64C = Builder.getInt64(0);
-  unifyTypes(LHS, RHS, I64C);
+  // Flag that is true if the computation cannot overflow.
+  bool IsSafeToCompute = false;
+  switch (Opc) {
+  case Instruction::Add:
+  case Instruction::Sub:
+    IsSafeToCompute = adjustTypesForSafeAddition(LHS, RHS);
+    break;
+  case Instruction::Mul:
+    IsSafeToCompute = adjustTypesForSafeMultiplication(LHS, RHS);
+    break;
+  default:
+    llvm_unreachable("Unknown binary operator!");
+  }
 
-  // Handle the plain operation (without overflow tracking) first.
-  if (!OverflowState) {
+  // Handle the plain operation (without overflow tracking or a safe
+  // computation) first.
+  if (!OverflowState || (IsSafeToCompute && (OTMode != OT_ALWAYS))) {
     switch (Opc) {
     case Instruction::Add:
       return Builder.CreateNSWAdd(LHS, RHS, Name);
@@ -164,6 +180,40 @@ void IslExprBuilder::unifyTypes(Value *&V0, Value *&V1, Value *&V2) {
   V2 = Builder.CreateSExt(V2, MaxT);
 }
 
+bool IslExprBuilder::adjustTypesForSafeComputation(Value *&LHS, Value *&RHS,
+                                                   unsigned RequiredBitWidth) {
+  unsigned LBitWidth = LHS->getType()->getPrimitiveSizeInBits();
+  unsigned RBitWidth = RHS->getType()->getPrimitiveSizeInBits();
+  unsigned MaxUsedBitWidth = std::max(LBitWidth, RBitWidth);
+
+  // @TODO For now use the maximal bit width if the required one is to large but
+  //       note that this is not sound.
+  unsigned MaxAllowedBitWidth = PollyMaxAllowedBitWidth;
+  unsigned NewBitWidth =
+      std::max(MaxUsedBitWidth, std::min(MaxAllowedBitWidth, RequiredBitWidth));
+
+  Type *Ty = Builder.getIntNTy(NewBitWidth);
+  LHS = Builder.CreateSExt(LHS, Ty);
+  RHS = Builder.CreateSExt(RHS, Ty);
+
+  // If the new bit width is not large enough the computation is not sound.
+  return NewBitWidth == RequiredBitWidth;
+}
+
+bool IslExprBuilder::adjustTypesForSafeAddition(Value *&LHS, Value *&RHS) {
+  unsigned LBitWidth = LHS->getType()->getPrimitiveSizeInBits();
+  unsigned RBitWidth = RHS->getType()->getPrimitiveSizeInBits();
+  return adjustTypesForSafeComputation(LHS, RHS,
+                                       std::max(LBitWidth, RBitWidth) + 1);
+}
+
+bool IslExprBuilder::adjustTypesForSafeMultiplication(Value *&LHS,
+                                                      Value *&RHS) {
+  unsigned LBitWidth = LHS->getType()->getPrimitiveSizeInBits();
+  unsigned RBitWidth = RHS->getType()->getPrimitiveSizeInBits();
+  return adjustTypesForSafeComputation(LHS, RHS, LBitWidth + RBitWidth);
+}
+
 Value *IslExprBuilder::createOpUnary(__isl_take isl_ast_expr *Expr) {
   assert(isl_ast_expr_get_op_type(Expr) == isl_ast_op_minus &&
          "Unsupported unary operation");
@@ -195,10 +245,6 @@ Value *IslExprBuilder::createOpNAry(__isl_take isl_ast_expr *Expr) {
     V = Builder.CreateSelect(Builder.CreateICmp(Pred, V, OpV), V, OpV);
   }
 
-  // TODO: We can truncate the result, if it fits into a smaller type. This can
-  // help in cases where we have larger operands (e.g. i67) but the result is
-  // known to fit into i64. Without the truncation, the larger i67 type may
-  // force all subsequent operations to be performed on a non-native type.
   isl_ast_expr_free(Expr);
   return V;
 }
@@ -356,10 +402,6 @@ Value *IslExprBuilder::createOpBin(__isl_take isl_ast_expr *Expr) {
     break;
   }
 
-  // TODO: We can truncate the result, if it fits into a smaller type. This can
-  // help in cases where we have larger operands (e.g. i67) but the result is
-  // known to fit into i64. Without the truncation, the larger i67 type may
-  // force all subsequent operations to be performed on a non-native type.
   isl_ast_expr_free(Expr);
   return Res;
 }
@@ -615,7 +657,7 @@ Value *IslExprBuilder::createId(__isl_take isl_ast_expr *Expr) {
 
   V = IDToValue[Id];
   if (!V)
-    V = UndefValue::get(getType(Expr));
+    V = UndefValue::get(Builder.getInt1Ty());
 
   if (V->getType()->isPointerTy())
     V = Builder.CreatePtrToInt(V, Builder.getIntNTy(DL.getPointerSizeInBits()));
@@ -628,33 +670,12 @@ Value *IslExprBuilder::createId(__isl_take isl_ast_expr *Expr) {
   return V;
 }
 
-IntegerType *IslExprBuilder::getType(__isl_keep isl_ast_expr *Expr) {
-  // XXX: We assume i64 is large enough. This is often true, but in general
-  //      incorrect. Also, on 32bit architectures, it would be beneficial to
-  //      use a smaller type. We can and should directly derive this information
-  //      during code generation.
-  return IntegerType::get(Builder.getContext(), 64);
-}
-
 Value *IslExprBuilder::createInt(__isl_take isl_ast_expr *Expr) {
   assert(isl_ast_expr_get_type(Expr) == isl_ast_expr_int &&
          "Expression not of type isl_ast_expr_int");
-  isl_val *Val;
-  Value *V;
-  APInt APValue;
-  IntegerType *T;
-
-  Val = isl_ast_expr_get_val(Expr);
-  APValue = APIntFromVal(Val);
-
-  auto BitWidth = APValue.getBitWidth();
-  if (BitWidth <= 64)
-    T = getType(Expr);
-  else
-    T = Builder.getIntNTy(BitWidth);
 
-  APValue = APValue.sextOrSelf(T->getBitWidth());
-  V = ConstantInt::get(T, APValue);
+  auto *Val = isl_ast_expr_get_val(Expr);
+  auto *V = ConstantInt::get(Builder.getContext(), APIntFromVal(Val));
 
   isl_ast_expr_free(Expr);
   return V;
diff --git a/polly/lib/CodeGen/IslNodeBuilder.cpp b/polly/lib/CodeGen/IslNodeBuilder.cpp
index 4623e3e..b73ed3f 100644
--- a/polly/lib/CodeGen/IslNodeBuilder.cpp
+++ b/polly/lib/CodeGen/IslNodeBuilder.cpp
@@ -390,7 +390,11 @@ void IslNodeBuilder::createForVector(__isl_take isl_ast_node *For,
   Value *ValueLB = ExprBuilder.create(Init);
   Value *ValueInc = ExprBuilder.create(Inc);
 
-  ExprBuilder.unifyTypes(ValueLB, ValueInc);
+  CmpInst::Predicate Predicate;
+  auto *UB = getUpperBound(For, Predicate);
+  auto *ValueUB = ExprBuilder.create(UB);
+
+  ExprBuilder.unifyTypes(ValueLB, ValueUB, ValueInc);
 
   std::vector<Value *> IVS(VectorWidth);
   IVS[0] = ValueLB;
diff --git a/polly/test/Isl/CodeGen/LoopParallelMD/loop_nest_param_parallel.ll b/polly/test/Isl/CodeGen/LoopParallelMD/loop_nest_param_parallel.ll
index b546c09..d379159 100644
--- a/polly/test/Isl/CodeGen/LoopParallelMD/loop_nest_param_parallel.ll
+++ b/polly/test/Isl/CodeGen/LoopParallelMD/loop_nest_param_parallel.ll
@@ -2,10 +2,10 @@
 ;
 ; Check that we mark multiple parallel loops correctly including the memory instructions.
 ;
-; CHECK-DAG:  %polly.loop_cond[[COuter:[0-9]*]] = icmp sle i64 %polly.indvar{{[0-9]*}}, 1022
+; CHECK-DAG:  %polly.loop_cond[[COuter:[0-9]*]] = icmp sle i11 %polly.indvar{{[0-9]*}}, 1022
 ; CHECK-DAG:  br i1 %polly.loop_cond[[COuter]], label %polly.loop_header{{[0-9]*}}, label %polly.loop_exit{{[0-9]*}}, !llvm.loop ![[IDOuter:[0-9]*]]
 ;
-; CHECK-DAG:  %polly.loop_cond[[CInner:[0-9]*]] = icmp sle i64 %polly.indvar{{[0-9]*}}, 510
+; CHECK-DAG:  %polly.loop_cond[[CInner:[0-9]*]] = icmp sle i10 %polly.indvar{{[0-9]*}}, 510
 ; CHECK-DAG:  br i1 %polly.loop_cond[[CInner]], label %polly.loop_header{{[0-9]*}}, label %polly.loop_exit{{[0-9]*}}, !llvm.loop ![[IDInner:[0-9]*]]
 ;
 ; CHECK-DAG: store i32 %{{[a-z_0-9]*}}, i32* %{{[a-z_0-9]*}}, {{[ ._!,a-zA-Z0-9]*}}, !llvm.mem.parallel_loop_access !4
diff --git a/polly/test/Isl/CodeGen/MemAccess/codegen_address_space.ll b/polly/test/Isl/CodeGen/MemAccess/codegen_address_space.ll
index 4bb9cee..f68df22 100644
--- a/polly/test/Isl/CodeGen/MemAccess/codegen_address_space.ll
+++ b/polly/test/Isl/CodeGen/MemAccess/codegen_address_space.ll
@@ -40,5 +40,5 @@ for.end:                                          ; preds = %for.cond
 }
 
 ; CHECK: %polly.access.cast.A = bitcast [100 x i32] addrspace(5)* %A to i32 addrspace(5)*
-; CHECK: %polly.access.A = getelementptr i32, i32 addrspace(5)* %polly.access.cast.A, i64 0
+; CHECK: %polly.access.A = getelementptr i32, i32 addrspace(5)* %polly.access.cast.A, i1 false
 ; CHECK: %tmp2_p_scalar_ = load i32, i32 addrspace(5)* %polly.access.A, align 4, !alias.scope !0, !noalias !2
diff --git a/polly/test/Isl/CodeGen/MemAccess/codegen_simple_md.ll b/polly/test/Isl/CodeGen/MemAccess/codegen_simple_md.ll
index 9a86b7fb..81aa8b2 100644
--- a/polly/test/Isl/CodeGen/MemAccess/codegen_simple_md.ll
+++ b/polly/test/Isl/CodeGen/MemAccess/codegen_simple_md.ll
@@ -54,19 +54,28 @@ for.end6:                                         ; preds = %for.cond
   ret i32 0
 }
 
-; WITHCONST:  %[[IVOut:polly.indvar[0-9]*]] = phi i64 [ 0, %polly.loop_preheader{{[0-9]*}} ], [ %polly.indvar_next{{[0-9]*}}, %polly.{{[._a-zA-Z0-9]*}} ]
-; WITHCONST:  %[[IVIn:polly.indvar[0-9]*]] = phi i64 [ 0, %polly.loop_preheader{{[0-9]*}} ], [ %polly.indvar_next{{[0-9]*}}, %polly.{{[._a-zA-Z0-9]*}} ]
-; WITHCONST:  %[[MUL1:[._a-zA-Z0-9]+]] = mul nsw i64 16, %[[IVOut]]
-; WITHCONST:  %[[MUL2:[._a-zA-Z0-9]+]] = mul nsw i64 2, %[[IVIn]]
-; WITHCONST:  %[[SUM1:[._a-zA-Z0-9]+]] = add nsw i64 %[[MUL1]], %[[MUL2]]
-; WITHCONST:  %[[SUM2:[._a-zA-Z0-9]+]] = add nsw i64 %[[SUM1]], 5
-; WITHCONST:  %[[ACC:[._a-zA-Z0-9]*]] = getelementptr i32, i32* getelementptr inbounds ([1040 x i32], [1040 x i32]* @A, i{{(32|64)}} 0, i{{(32|64)}} 0), i64 %[[SUM2]]
+; WITHCONST:  %[[IVOut:polly.indvar[0-9]*]] = phi i6 [ 0, %polly.loop_preheader{{[0-9]*}} ], [ %polly.indvar_next{{[0-9]*}}, %polly.{{[._a-zA-Z0-9]*}} ]
+; WITHCONST:  %[[IVIn:polly.indvar[0-9]*]] = phi i6 [ 0, %polly.loop_preheader{{[0-9]*}} ], [ %polly.indvar_next{{[0-9]*}}, %polly.{{[._a-zA-Z0-9]*}} ]
+; WITHCONST:  %[[IVOutSext:[._a-zA-Z0-9]+]] = sext i6 %[[IVOut]] to i12
+; WITHCONST:  %[[MUL1:[._a-zA-Z0-9]+]] = mul nsw i12 16, %[[IVOutSext]]
+; WITHCONST:  %[[IVInSext:[._a-zA-Z0-9]+]] = sext i6 %[[IVIn]] to i9
+; WITHCONST:  %[[MUL2:[._a-zA-Z0-9]+]] = mul nsw i9 2, %[[IVInSext]]
+; WITHCONST:  %[[MUL1Sext:[._a-zA-Z0-9]+]] = sext i12 %[[MUL1]] to i13
+; WITHCONST:  %[[MUL2Sext:[._a-zA-Z0-9]+]] = sext i9 %[[MUL2]] to i13
+; WITHCONST:  %[[SUM1:[._a-zA-Z0-9]+]] = add nsw i13 %[[MUL1Sext]], %[[MUL2Sext]]
+; WITHCONST:  %[[SUM1Sext:[._a-zA-Z0-9]+]] = sext i13 %[[SUM1]] to i14
+; WITHCONST:  %[[SUM2:[._a-zA-Z0-9]+]] = add nsw i14 %[[SUM1Sext]], 5
+; WITHCONST:  %[[ACC:[._a-zA-Z0-9]*]] = getelementptr i32, i32* getelementptr inbounds ([1040 x i32], [1040 x i32]* @A, i{{(32|64)}} 0, i{{(32|64)}} 0), i14 %[[SUM2]]
 ; WITHCONST:  store i32 100, i32* %[[ACC]]
 
-; WITHOUTCONST:  %[[IVOut:polly.indvar[0-9]*]] = phi i64 [ 0, %polly.loop_preheader{{[0-9]*}} ], [ %polly.indvar_next{{[0-9]*}}, %polly.{{[._a-zA-Z0-9]*}} ]
-; WITHOUTCONST:  %[[IVIn:polly.indvar[0-9]*]] = phi i64 [ 0, %polly.loop_preheader{{[0-9]*}} ], [ %polly.indvar_next{{[0-9]*}}, %polly.{{[._a-zA-Z0-9]*}} ]
-; WITHOUTCONST:  %[[MUL1:[._a-zA-Z0-9]+]] = mul nsw i64 16, %[[IVOut]]
-; WITHOUTCONST:  %[[MUL2:[._a-zA-Z0-9]+]] = mul nsw i64 2, %[[IVIn]]
-; WITHOUTCONST:  %[[SUM1:[._a-zA-Z0-9]+]] = add nsw i64 %[[MUL1]], %[[MUL2]]
-; WITHOUTCONST:  %[[ACC:[._a-zA-Z0-9]*]] = getelementptr i32, i32* getelementptr inbounds ([1040 x i32], [1040 x i32]* @A, i{{(32|64)}} 0, i{{(32|64)}} 0), i64 %[[SUM1]]
+; WITHOUTCONST:  %[[IVOut:polly.indvar[0-9]*]] = phi i6 [ 0, %polly.loop_preheader{{[0-9]*}} ], [ %polly.indvar_next{{[0-9]*}}, %polly.{{[._a-zA-Z0-9]*}} ]
+; WITHOUTCONST:  %[[IVIn:polly.indvar[0-9]*]] = phi i6 [ 0, %polly.loop_preheader{{[0-9]*}} ], [ %polly.indvar_next{{[0-9]*}}, %polly.{{[._a-zA-Z0-9]*}} ]
+; WITHOUTCONST:  %[[IVOutSext:[._a-zA-Z0-9]+]] = sext i6 %[[IVOut]] to i12
+; WITHOUTCONST:  %[[MUL1:[._a-zA-Z0-9]+]] = mul nsw i12 16, %[[IVOutSext]]
+; WITHOUTCONST:  %[[IVInSext:[._a-zA-Z0-9]+]] = sext i6 %[[IVIn]] to i9
+; WITHOUTCONST:  %[[MUL2:[._a-zA-Z0-9]+]] = mul nsw i9 2, %[[IVInSext]]
+; WITHOUTCONST:  %[[MUL1Sext:[._a-zA-Z0-9]+]] = sext i12 %[[MUL1]] to i13
+; WITHOUTCONST:  %[[MUL2Sext:[._a-zA-Z0-9]+]] = sext i9 %[[MUL2]] to i13
+; WITHOUTCONST:  %[[SUM1:[._a-zA-Z0-9]+]] = add nsw i13 %[[MUL1Sext]], %[[MUL2Sext]]
+; WITHOUTCONST:  %[[ACC:[._a-zA-Z0-9]*]] = getelementptr i32, i32* getelementptr inbounds ([1040 x i32], [1040 x i32]* @A, i{{(32|64)}} 0, i{{(32|64)}} 0), i13 %[[SUM1]]
 ; WITHOUTCONST:  store i32 100, i32* %[[ACC]]
diff --git a/polly/test/Isl/CodeGen/MemAccess/codegen_simple_md_float.ll b/polly/test/Isl/CodeGen/MemAccess/codegen_simple_md_float.ll
index 942e4c4..dd4b962 100644
--- a/polly/test/Isl/CodeGen/MemAccess/codegen_simple_md_float.ll
+++ b/polly/test/Isl/CodeGen/MemAccess/codegen_simple_md_float.ll
@@ -51,19 +51,28 @@ for.end6:                                         ; preds = %for.cond
   ret void
 }
 
-; WITHCONST:  %[[IVOut:polly.indvar[0-9]*]] = phi i64 [ 0, %polly.loop_preheader{{[0-9]*}} ], [ %polly.indvar_next{{[0-9]*}}, %polly.{{[._a-zA-Z0-9]*}} ]
-; WITHCONST:  %[[IVIn:polly.indvar[0-9]*]] = phi i64 [ 0, %polly.loop_preheader{{[0-9]*}} ], [ %polly.indvar_next{{[0-9]*}}, %polly.{{[._a-zA-Z0-9]*}} ]
-; WITHCONST:  %[[MUL1:[._a-zA-Z0-9]+]] = mul nsw i64 16, %[[IVOut]]
-; WITHCONST:  %[[MUL2:[._a-zA-Z0-9]+]] = mul nsw i64 2, %[[IVIn]]
-; WITHCONST:  %[[SUM1:[._a-zA-Z0-9]+]] = add nsw i64 %[[MUL1]], %[[MUL2]]
-; WITHCONST:  %[[SUM2:[._a-zA-Z0-9]+]] = add nsw i64 %[[SUM1]], 5
-; WITHCONST:  %[[ACC:[._a-zA-Z0-9]*]] = getelementptr float, float* getelementptr inbounds ([1040 x float], [1040 x float]* @A, i{{(32|64)}} 0, i{{(32|64)}} 0), i64 %[[SUM2]]
+; WITHCONST:  %[[IVOut:polly.indvar[0-9]*]] = phi i6 [ 0, %polly.loop_preheader{{[0-9]*}} ], [ %polly.indvar_next{{[0-9]*}}, %polly.{{[._a-zA-Z0-9]*}} ]
+; WITHCONST:  %[[IVIn:polly.indvar[0-9]*]] = phi i6 [ 0, %polly.loop_preheader{{[0-9]*}} ], [ %polly.indvar_next{{[0-9]*}}, %polly.{{[._a-zA-Z0-9]*}} ]
+; WITHCONST:  %[[IVOutSext:[._a-zA-Z0-9]+]] = sext i6 %[[IVOut]] to i12
+; WITHCONST:  %[[MUL1:[._a-zA-Z0-9]+]] = mul nsw i12 16, %[[IVOutSext]]
+; WITHCONST:  %[[IVInSext:[._a-zA-Z0-9]+]] = sext i6 %[[IVIn]] to i9
+; WITHCONST:  %[[MUL2:[._a-zA-Z0-9]+]] = mul nsw i9 2, %[[IVInSext]]
+; WITHCONST:  %[[MUL1Sext:[._a-zA-Z0-9]+]] = sext i12 %[[MUL1]] to i13
+; WITHCONST:  %[[MUL2Sext:[._a-zA-Z0-9]+]] = sext i9 %[[MUL2]] to i13
+; WITHCONST:  %[[SUM1:[._a-zA-Z0-9]+]] = add nsw i13 %[[MUL1Sext]], %[[MUL2Sext]]
+; WITHCONST:  %[[SUM1Sext:[._a-zA-Z0-9]+]] = sext i13 %[[SUM1]] to i14
+; WITHCONST:  %[[SUM2:[._a-zA-Z0-9]+]] = add nsw i14 %[[SUM1Sext]], 5
+; WITHCONST:  %[[ACC:[._a-zA-Z0-9]*]] = getelementptr float, float* getelementptr inbounds ([1040 x float], [1040 x float]* @A, i{{(32|64)}} 0, i{{(32|64)}} 0), i14 %[[SUM2]]
 ; WITHCONST:  store float 1.000000e+02, float* %[[ACC]]
 
-; WITHOUTCONST:  %[[IVOut:polly.indvar[0-9]*]] = phi i64 [ 0, %polly.loop_preheader{{[0-9]*}} ], [ %polly.indvar_next{{[0-9]*}}, %polly.{{[._a-zA-Z0-9]*}} ]
-; WITHOUTCONST:  %[[IVIn:polly.indvar[0-9]*]] = phi i64 [ 0, %polly.loop_preheader{{[0-9]*}} ], [ %polly.indvar_next{{[0-9]*}}, %polly.{{[._a-zA-Z0-9]*}} ]
-; WITHOUTCONST:  %[[MUL1:[._a-zA-Z0-9]+]] = mul nsw i64 16, %[[IVOut]]
-; WITHOUTCONST:  %[[MUL2:[._a-zA-Z0-9]+]] = mul nsw i64 2, %[[IVIn]]
-; WITHOUTCONST:  %[[SUM1:[._a-zA-Z0-9]+]] = add nsw i64 %[[MUL1]], %[[MUL2]]
-; WITHOUTCONST:  %[[ACC:[._a-zA-Z0-9]*]] = getelementptr float, float* getelementptr inbounds ([1040 x float], [1040 x float]* @A, i{{(32|64)}} 0, i{{(32|64)}} 0), i64 %[[SUM1]]
+; WITHOUTCONST:  %[[IVOut:polly.indvar[0-9]*]] = phi i6 [ 0, %polly.loop_preheader{{[0-9]*}} ], [ %polly.indvar_next{{[0-9]*}}, %polly.{{[._a-zA-Z0-9]*}} ]
+; WITHOUTCONST:  %[[IVIn:polly.indvar[0-9]*]] = phi i6 [ 0, %polly.loop_preheader{{[0-9]*}} ], [ %polly.indvar_next{{[0-9]*}}, %polly.{{[._a-zA-Z0-9]*}} ]
+; WITHOUTCONST:  %[[IVOutSext:[._a-zA-Z0-9]+]] = sext i6 %[[IVOut]] to i12
+; WITHOUTCONST:  %[[MUL1:[._a-zA-Z0-9]+]] = mul nsw i12 16, %[[IVOutSext]]
+; WITHOUTCONST:  %[[IVInSext:[._a-zA-Z0-9]+]] = sext i6 %[[IVIn]] to i9
+; WITHOUTCONST:  %[[MUL2:[._a-zA-Z0-9]+]] = mul nsw i9 2, %[[IVInSext]]
+; WITHOUTCONST:  %[[MUL1Sext:[._a-zA-Z0-9]+]] = sext i12 %[[MUL1]] to i13
+; WITHOUTCONST:  %[[MUL2Sext:[._a-zA-Z0-9]+]] = sext i9 %[[MUL2]] to i13
+; WITHOUTCONST:  %[[SUM1:[._a-zA-Z0-9]+]] = add nsw i13 %[[MUL1Sext]], %[[MUL2Sext]]
+; WITHOUTCONST:  %[[ACC:[._a-zA-Z0-9]*]] = getelementptr float, float* getelementptr inbounds ([1040 x float], [1040 x float]* @A, i{{(32|64)}} 0, i{{(32|64)}} 0), i13 %[[SUM1]]
 ; WITHOUTCONST:  store float 1.000000e+02, float* %[[ACC]]
diff --git a/polly/test/Isl/CodeGen/MemAccess/different_types.ll b/polly/test/Isl/CodeGen/MemAccess/different_types.ll
index 527c6ce..51bb3c2 100644
--- a/polly/test/Isl/CodeGen/MemAccess/different_types.ll
+++ b/polly/test/Isl/CodeGen/MemAccess/different_types.ll
@@ -10,9 +10,11 @@
 ;    }
 
 ; CHECK: %polly.access.cast.A14 = bitcast float* %A to i32*
-; CHECK: %[[R1:[._0-9]*]] = sub nsw i64 0, %polly.indvar11
-; CHECK: %[[R2:[._0-9]*]] = add nsw i64 %[[R1]], 99
-; CHECK: %polly.access.A15 = getelementptr i32, i32* %polly.access.cast.A14, i64 %[[R2]]
+; CHECK: %[[R0:[._0-9]*]] = sext i8 %polly.indvar11 to i9
+; CHECK: %[[R1:[._0-9]*]] = sub nsw i9 0, %[[R0]]
+; CHECK: %[[R1s:[._0-9]*]] = sext i9 %[[R1]] to i10
+; CHECK: %[[R2:[._0-9]*]] = add nsw i10 %[[R1s]], 99
+; CHECK: %polly.access.A15 = getelementptr i32, i32* %polly.access.cast.A14, i10 %[[R2]]
 ; CHECK: %[[R3:[._0-9]*]] = bitcast i32* %polly.access.A15 to float*
 ; CHECK: %tmp14_p_scalar_ = load float, float* %[[R3]], align 4, !alias.scope !3, !noalias !4
 
diff --git a/polly/test/Isl/CodeGen/MemAccess/multiple_types.ll b/polly/test/Isl/CodeGen/MemAccess/multiple_types.ll
index 9a97e3f..53e3198 100644
--- a/polly/test/Isl/CodeGen/MemAccess/multiple_types.ll
+++ b/polly/test/Isl/CodeGen/MemAccess/multiple_types.ll
@@ -12,20 +12,21 @@
 ;    }
 
 ; Short[0]
-; CHECK: %polly.access.Short10 = getelementptr i8, i8* %Short, i64 0
+; CHECK: %polly.access.Short10 = getelementptr i8, i8* %Short, i1 false
 ; CHECK: %24 = bitcast i8* %polly.access.Short10 to i16*
 ; CHECK: %tmp5_p_scalar_ = load i16, i16* %24
 
 ; Float[8 * i]
-; CHECK: %25 = mul nsw i64 8, %polly.indvar
-; CHECK: %polly.access.Float11 = getelementptr i8, i8* %Float, i64 %25
-; CHECK: %26 = bitcast i8* %polly.access.Float11 to float*
-; CHECK: %tmp11_p_scalar_ = load float, float* %26
+; CHECK: %26 = sext i8 %polly.indvar to i13
+; CHECK: %27 = mul nsw i13 8, %26
+; CHECK: %polly.access.Float11 = getelementptr i8, i8* %Float, i13 %27
+; CHECK: %28 = bitcast i8* %polly.access.Float11 to float*
+; CHECK: %tmp11_p_scalar_ = load float, float* %28
 
 ; Double[8]
-; CHECK: %polly.access.Double13 = getelementptr i8, i8* %Double, i64 8
-; CHECK: %27 = bitcast i8* %polly.access.Double13 to double*
-; CHECK: %tmp17_p_scalar_ = load double, double* %27
+; CHECK: %polly.access.Double13 = getelementptr i8, i8* %Double, i5 8
+; CHECK: %30 = bitcast i8* %polly.access.Double13 to double*
+; CHECK: %tmp17_p_scalar_ = load double, double* %30
 
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 
diff --git a/polly/test/Isl/CodeGen/MemAccess/simple_stride_test.ll b/polly/test/Isl/CodeGen/MemAccess/simple_stride_test.ll
index afa4fca..937a526 100644
--- a/polly/test/Isl/CodeGen/MemAccess/simple_stride_test.ll
+++ b/polly/test/Isl/CodeGen/MemAccess/simple_stride_test.ll
@@ -4,12 +4,12 @@
 ;    stride zero for B
 ;    stride one for A
 ;
-; CHECK:  %polly.access.B = getelementptr i32, i32* %B, i64 0
+; CHECK:  %polly.access.B = getelementptr i32, i32* %B, i1 false
 ; CHECK:  %[[BC:[._a-zA-Z0-9]*]] = bitcast i32* %polly.access.B to <1 x i32>*
 ; CHECK:  %[[LD:[._a-zA-Z0-9]*]] = load <1 x i32>, <1 x i32>* %[[BC]], align 8
 ; CHECK:  %[[SV:[._a-zA-Z0-9]*]] = shufflevector <1 x i32> %[[LD]], <1 x i32> %[[LD]], <16 x i32> zeroinitializer
 ;
-; CHECK:  %polly.access.A = getelementptr i32, i32* %A, i64 0
+; CHECK:  %polly.access.A = getelementptr i32, i32* %A, i5 0
 ; CHECK:  %[[VP:[._a-zA-Z0-9]*]] = bitcast i32* %polly.access.A to <16 x i32>*
 ; CHECK:  store <16 x i32> %[[SV]], <16 x i32>* %[[VP]], align 8
 ;
diff --git a/polly/test/Isl/CodeGen/MemAccess/update_access_functions.ll b/polly/test/Isl/CodeGen/MemAccess/update_access_functions.ll
index 63f2eda..9a35a23 100644
--- a/polly/test/Isl/CodeGen/MemAccess/update_access_functions.ll
+++ b/polly/test/Isl/CodeGen/MemAccess/update_access_functions.ll
@@ -3,7 +3,7 @@
 ; RUN:                 < %s -S | FileCheck %s
 
 ; CHECK: polly.stmt.loop2:
-; CHECK-NEXT:   %polly.access.A = getelementptr double, double* %A, i64 42
+; CHECK-NEXT:   %polly.access.A = getelementptr double, double* %A, i7 42
 ; CHECK-NEXT:   %val_p_scalar_ = load double, double* %polly.access.A
 
 ; CHECK: polly.stmt.loop3:
diff --git a/polly/test/Isl/CodeGen/OpenMP/invariant_base_pointer_preloaded_pass_only_needed.ll b/polly/test/Isl/CodeGen/OpenMP/invariant_base_pointer_preloaded_pass_only_needed.ll
index b044684..77c48ed 100644
--- a/polly/test/Isl/CodeGen/OpenMP/invariant_base_pointer_preloaded_pass_only_needed.ll
+++ b/polly/test/Isl/CodeGen/OpenMP/invariant_base_pointer_preloaded_pass_only_needed.ll
@@ -15,7 +15,7 @@
 ;    }
 ;
 ;                                           i    A[0]    A
-; CHECK: %polly.par.userContext = alloca { i64, float, float* }
+; CHECK: %polly.par.userContext = alloca { i11, float, float* }
 ;
 ; CHECK:  %polly.access.B.load =
 ; CHECK:  %polly.subfn.storeaddr.polly.access.A.load = getelementptr inbounds
diff --git a/polly/test/Isl/CodeGen/OpenMP/new_multidim_access.ll b/polly/test/Isl/CodeGen/OpenMP/new_multidim_access.ll
index 74c0823b..b87253a 100644
--- a/polly/test/Isl/CodeGen/OpenMP/new_multidim_access.ll
+++ b/polly/test/Isl/CodeGen/OpenMP/new_multidim_access.ll
@@ -20,14 +20,18 @@
 ; CHECK:    new: [n, m] -> { Stmt_bb4[i0, i1] -> MemRef_A[i0, 43 + i1] };
 
 ; IR: %polly.access.mul.polly.subfunc.arg.A = mul nsw i64 %polly.indvar, %polly.subfunc.arg.m
-; IR: %6 = add nsw i64 %polly.indvar5, 13
-; IR: %polly.access.add.polly.subfunc.arg.A = add nsw i64 %polly.access.mul.polly.subfunc.arg.A, %6
+; IR: %[[R0:[0-9]*]] = sext i8 %polly.indvar5 to i9
+; IR: %[[R1:[0-9]*]] = add nsw i9 %[[R0]], 13
+; IR: %[[R2:[0-9]*]] = sext i9 %[[R1]] to i64
+; IR: %polly.access.add.polly.subfunc.arg.A = add nsw i64 %polly.access.mul.polly.subfunc.arg.A, %[[R2]]
 ; IR: %polly.access.polly.subfunc.arg.A = getelementptr float, float* %polly.subfunc.arg.A, i64 %polly.access.add.polly.subfunc.arg.A
 ; IR: %tmp10_p_scalar_ = load float, float* %polly.access.polly.subfunc.arg.A, align 4, !alias.scope !0, !noalias !2, !llvm.mem.parallel_loop_access !3
 
 ; IR: %polly.access.mul.polly.subfunc.arg.A8 = mul nsw i64 %polly.indvar, %polly.subfunc.arg.m
-; IR: %7 = add nsw i64 %polly.indvar5, 43
-; IR: %polly.access.add.polly.subfunc.arg.A9 = add nsw i64 %polly.access.mul.polly.subfunc.arg.A8, %7
+; IR: %[[P0:[0-9]*]] = sext i8 %polly.indvar5 to i9
+; IR: %[[P1:[0-9]*]] = add nsw i9 %[[P0]], 43
+; IR: %[[P2:[0-9]*]] = sext i9 %[[P1]] to i64
+; IR: %polly.access.add.polly.subfunc.arg.A9 = add nsw i64 %polly.access.mul.polly.subfunc.arg.A8, %[[P2]]
 ; IR: %polly.access.polly.subfunc.arg.A10 = getelementptr float, float* %polly.subfunc.arg.A, i64 %polly.access.add.polly.subfunc.arg.A9
 ; IR: store float %p_tmp11, float* %polly.access.polly.subfunc.arg.A10, align 4, !alias.scope !0, !noalias !2, !llvm.mem.parallel_
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
diff --git a/polly/test/Isl/CodeGen/OpenMP/recomputed-srem.ll b/polly/test/Isl/CodeGen/OpenMP/recomputed-srem.ll
index c05830c..9aff6d5 100644
--- a/polly/test/Isl/CodeGen/OpenMP/recomputed-srem.ll
+++ b/polly/test/Isl/CodeGen/OpenMP/recomputed-srem.ll
@@ -3,7 +3,7 @@
 ;
 ; Test to verify that we pass %rem96 to the parallel subfunction.
 ;
-; CHECK:       %[[R:[0-9]*]] = getelementptr inbounds { i32, i32, i64, float*, float*, i32 }, { i32, i32, i64, float*, float*, i32 }* %polly.par.userContext1, i32 0, i32 5
+; CHECK:       %[[R:[0-9]*]] = getelementptr inbounds { i32, i32, float*, float*, i32 }, { i32, i32, float*, float*, i32 }* %polly.par.userContext1, i32 0, i32 4
 ; CHECK-NEXT:  %polly.subfunc.arg.rem96 = load i32, i32* %[[R]]
 ;
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
diff --git a/polly/test/Isl/CodeGen/RuntimeDebugBuilder/combine_different_values.ll b/polly/test/Isl/CodeGen/RuntimeDebugBuilder/combine_different_values.ll
index 0555f5b..28ea5bf 100644
--- a/polly/test/Isl/CodeGen/RuntimeDebugBuilder/combine_different_values.ll
+++ b/polly/test/Isl/CodeGen/RuntimeDebugBuilder/combine_different_values.ll
@@ -50,46 +50,53 @@
 ; CHECK: @21 = private unnamed_addr addrspace(4) constant [3 x i8] c": \00"
 ; CHECK: @22 = private unnamed_addr addrspace(4) constant [2 x i8] c"\0A\00"
 ; CHECK: @23 = private unnamed_addr constant [12 x i8] c"%s%ld%s%f%s\00"
-
-; CHECK: %0 = ptrtoint double* %scevgep to i64
-; CHECK: %1 = call i32 (...) @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @3, i32 0, i32 0), i8 addrspace(4)* getelementptr inbounds ([11 x i8], [11 x i8] addrspace(4)* @0, i32 0, i32 0), i64 %0, i8 addrspace(4)* getelementptr inbounds ([3 x i8], [3 x i8] addrspace(4)* @1, i32 0, i32 0), double %tmp3_p_scalar_, i8 addrspace(4)* getelementptr inbounds ([2 x i8], [2 x i8] addrspace(4)* @2, i32 0, i32 0))
-; CHECK: %2 = call i32 @fflush(i8* null)
-; CHECK: %scevgep1 = getelementptr i8, i8* %C, i64 %polly.indvar
+;
+; CHECK: %0 = zext i5 %polly.indvar to i64
+; CHECK: %scevgep = getelementptr double, double* %B, i64 %0
+; CHECK: %tmp3_p_scalar_ = load double, double* %scevgep
+; CHECK: %1 = ptrtoint double* %scevgep to i64
+; CHECK: %2 = call i32 (...) @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @3, i32 0, i32 0), i8 addrspace(4)* getelementptr inbounds ([11 x i8], [11 x i8] addrspace(4)* @0, i32 0, i32 0), i64 %1, i8 addrspace(4)* getelementptr inbounds ([3 x i8], [3 x i8] addrspace(4)* @1, i32 0, i32 0), double %tmp3_p_scalar_, i8 addrspace(4)* getelementptr inbounds ([2 x i8], [2 x i8] addrspace(4)* @2, i32 0, i32 0))
+; CHECK: %3 = call i32 @fflush(i8* null)
+; CHECK: %4 = zext i5 %polly.indvar to i64
+; CHECK: %scevgep1 = getelementptr i8, i8* %C, i64 %4
 ; CHECK: %tmp5_p_scalar_ = load i8, i8* %scevgep1
-; CHECK: %3 = ptrtoint i8* %scevgep1 to i64
-; CHECK: %4 = sext i8 %tmp5_p_scalar_ to i64
-; CHECK: %5 = call i32 (...) @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @7, i32 0, i32 0), i8 addrspace(4)* getelementptr inbounds ([11 x i8], [11 x i8] addrspace(4)* @4, i32 0, i32 0), i64 %3, i8 addrspace(4)* getelementptr inbounds ([3 x i8], [3 x i8] addrspace(4)* @5, i32 0, i32 0), i64 %4, i8 addrspace(4)* getelementptr inbounds ([2 x i8], [2 x i8] addrspace(4)* @6, i32 0, i32 0))
-; CHECK: %6 = call i32 @fflush(i8* null)
+; CHECK: %5 = ptrtoint i8* %scevgep1 to i64
+; CHECK: %6 = sext i8 %tmp5_p_scalar_ to i64
+; CHECK: %7 = call i32 (...) @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @7, i32 0, i32 0), i8 addrspace(4)* getelementptr inbounds ([11 x i8], [11 x i8] addrspace(4)* @4, i32 0, i32 0), i64 %5, i8 addrspace(4)* getelementptr inbounds ([3 x i8], [3 x i8] addrspace(4)* @5, i32 0, i32 0), i64 %6, i8 addrspace(4)* getelementptr inbounds ([2 x i8], [2 x i8] addrspace(4)* @6, i32 0, i32 0))
+; CHECK: %8 = call i32 @fflush(i8* null)
 ; CHECK: %p_tmp6 = sitofp i8 %tmp5_p_scalar_ to double
 ; CHECK: %p_tmp7 = fadd double %tmp3_p_scalar_, %p_tmp6
-; CHECK: %scevgep2 = getelementptr i32, i32* %D, i64 %polly.indvar
+; CHECK: %9 = zext i5 %polly.indvar to i64
+; CHECK: %scevgep2 = getelementptr i32, i32* %D, i64 %9
 ; CHECK: %tmp9_p_scalar_ = load i32, i32* %scevgep2
-; CHECK: %7 = ptrtoint i32* %scevgep2 to i64
-; CHECK: %8 = sext i32 %tmp9_p_scalar_ to i64
-; CHECK: %9 = call i32 (...) @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @11, i32 0, i32 0), i8 addrspace(4)* getelementptr inbounds ([11 x i8], [11 x i8] addrspace(4)* @8, i32 0, i32 0), i64 %7, i8 addrspace(4)* getelementptr inbounds ([3 x i8], [3 x i8] addrspace(4)* @9, i32 0, i32 0), i64 %8, i8 addrspace(4)* getelementptr inbounds ([2 x i8], [2 x i8] addrspace(4)* @10, i32 0, i32 0))
-; CHECK: %10 = call i32 @fflush(i8* null)
+; CHECK: %10 = ptrtoint i32* %scevgep2 to i64
+; CHECK: %11 = sext i32 %tmp9_p_scalar_ to i64
+; CHECK: %12 = call i32 (...) @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @11, i32 0, i32 0), i8 addrspace(4)* getelementptr inbounds ([11 x i8], [11 x i8] addrspace(4)* @8, i32 0, i32 0), i64 %10, i8 addrspace(4)* getelementptr inbounds ([3 x i8], [3 x i8] addrspace(4)* @9, i32 0, i32 0), i64 %11, i8 addrspace(4)* getelementptr inbounds ([2 x i8], [2 x i8] addrspace(4)* @10, i32 0, i32 0))
+; CHECK: %13 = call i32 @fflush(i8* null)
 ; CHECK: %p_tmp10 = sitofp i32 %tmp9_p_scalar_ to double
 ; CHECK: %p_tmp11 = fadd double %p_tmp7, %p_tmp10
-; CHECK: %scevgep3 = getelementptr i64, i64* %E, i64 %polly.indvar
+; CHECK: %14 = zext i5 %polly.indvar to i64
+; CHECK: %scevgep3 = getelementptr i64, i64* %E, i64 %14
 ; CHECK: %tmp13_p_scalar_ = load i64, i64* %scevgep3
-; CHECK: %11 = ptrtoint i64* %scevgep3 to i64
-; CHECK: %12 = call i32 (...) @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @15, i32 0, i32 0), i8 addrspace(4)* getelementptr inbounds ([11 x i8], [11 x i8] addrspace(4)* @12, i32 0, i32 0), i64 %11, i8 addrspace(4)* getelementptr inbounds ([3 x i8], [3 x i8] addrspace(4)* @13, i32 0, i32 0), i64 %tmp13_p_scalar_, i8 addrspace(4)* getelementptr inbounds ([2 x i8], [2 x i8] addrspace(4)* @14, i32 0, i32 0))
-; CHECK: %13 = call i32 @fflush(i8* null)
+; CHECK: %15 = ptrtoint i64* %scevgep3 to i64
+; CHECK: %16 = call i32 (...) @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @15, i32 0, i32 0), i8 addrspace(4)* getelementptr inbounds ([11 x i8], [11 x i8] addrspace(4)* @12, i32 0, i32 0), i64 %15, i8 addrspace(4)* getelementptr inbounds ([3 x i8], [3 x i8] addrspace(4)* @13, i32 0, i32 0), i64 %tmp13_p_scalar_, i8 addrspace(4)* getelementptr inbounds ([2 x i8], [2 x i8] addrspace(4)* @14, i32 0, i32 0))
+; CHECK: %17 = call i32 @fflush(i8* null)
 ; CHECK: %p_tmp14 = sitofp i64 %tmp13_p_scalar_ to double
 ; CHECK: %p_tmp15 = fadd double %p_tmp11, %p_tmp14
-; CHECK: %scevgep4 = getelementptr float, float* %A, i64 %polly.indvar
+; CHECK: %18 = zext i5 %polly.indvar to i64
+; CHECK: %scevgep4 = getelementptr float, float* %A, i64 %18
 ; CHECK: %tmp17_p_scalar_ = load float, float* %scevgep4
-; CHECK: %14 = ptrtoint float* %scevgep4 to i64
-; CHECK: %15 = fpext float %tmp17_p_scalar_ to double
-; CHECK: %16 = call i32 (...) @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @19, i32 0, i32 0), i8 addrspace(4)* getelementptr inbounds ([11 x i8], [11 x i8] addrspace(4)* @16, i32 0, i32 0), i64 %14, i8 addrspace(4)* getelementptr inbounds ([3 x i8], [3 x i8] addrspace(4)* @17, i32 0, i32 0), double %15, i8 addrspace(4)* getelementptr inbounds ([2 x i8], [2 x i8] addrspace(4)* @18, i32 0, i32 0))
-; CHECK: %17 = call i32 @fflush(i8* null)
+; CHECK: %19 = ptrtoint float* %scevgep4 to i64
+; CHECK: %20 = fpext float %tmp17_p_scalar_ to double
+; CHECK: %21 = call i32 (...) @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @19, i32 0, i32 0), i8 addrspace(4)* getelementptr inbounds ([11 x i8], [11 x i8] addrspace(4)* @16, i32 0, i32 0), i64 %19, i8 addrspace(4)* getelementptr inbounds ([3 x i8], [3 x i8] addrspace(4)* @17, i32 0, i32 0), double %20, i8 addrspace(4)* getelementptr inbounds ([2 x i8], [2 x i8] addrspace(4)* @18, i32 0, i32 0))
+; CHECK: %22 = call i32 @fflush(i8* null)
 ; CHECK: %p_tmp18 = fpext float %tmp17_p_scalar_ to double
 ; CHECK: %p_tmp19 = fadd double %p_tmp18, %p_tmp15
 ; CHECK: %p_tmp20 = fptrunc double %p_tmp19 to float
-; CHECK: %18 = ptrtoint float* %scevgep4 to i64
-; CHECK: %19 = fpext float %p_tmp20 to double
-; CHECK: %20 = call i32 (...) @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @23, i32 0, i32 0), i8 addrspace(4)* getelementptr inbounds ([11 x i8], [11 x i8] addrspace(4)* @20, i32 0, i32 0), i64 %18, i8 addrspace(4)* getelementptr inbounds ([3 x i8], [3 x i8] addrspace(4)* @21, i32 0, i32 0), double %19, i8 addrspace(4)* getelementptr inbounds ([2 x i8], [2 x i8] addrspace(4)* @22, i32 0, i32 0))
-; CHECK: %21 = call i32 @fflush(i8* null)
+; CHECK: %23 = ptrtoint float* %scevgep4 to i64
+; CHECK: %24 = fpext float %p_tmp20 to double
+; CHECK: %25 = call i32 (...) @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @23, i32 0, i32 0), i8 addrspace(4)* getelementptr inbounds ([11 x i8], [11 x i8] addrspace(4)* @20, i32 0, i32 0), i64 %23, i8 addrspace(4)* getelementptr inbounds ([3 x i8], [3 x i8] addrspace(4)* @21, i32 0, i32 0), double %24, i8 addrspace(4)* getelementptr inbounds ([2 x i8], [2 x i8] addrspace(4)* @22, i32 0, i32 0))
+; CHECK: %26 = call i32 @fflush(i8* null)
 
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 
@@ -104,25 +111,25 @@ bb1:                                              ; preds = %bb21, %bb
 
 bb2:                                              ; preds = %bb1
   %tmp = getelementptr inbounds double, double* %B, i64 %i.0
-  %tmp3 = load double, double* %tmp, align 8
+  %tmp3 = load double, double* %tmp
   %tmp4 = getelementptr inbounds i8, i8* %C, i64 %i.0
-  %tmp5 = load i8, i8* %tmp4, align 1
+  %tmp5 = load i8, i8* %tmp4
   %tmp6 = sitofp i8 %tmp5 to double
   %tmp7 = fadd double %tmp3, %tmp6
   %tmp8 = getelementptr inbounds i32, i32* %D, i64 %i.0
-  %tmp9 = load i32, i32* %tmp8, align 4
+  %tmp9 = load i32, i32* %tmp8
   %tmp10 = sitofp i32 %tmp9 to double
   %tmp11 = fadd double %tmp7, %tmp10
   %tmp12 = getelementptr inbounds i64, i64* %E, i64 %i.0
-  %tmp13 = load i64, i64* %tmp12, align 8
+  %tmp13 = load i64, i64* %tmp12
   %tmp14 = sitofp i64 %tmp13 to double
   %tmp15 = fadd double %tmp11, %tmp14
   %tmp16 = getelementptr inbounds float, float* %A, i64 %i.0
-  %tmp17 = load float, float* %tmp16, align 4
+  %tmp17 = load float, float* %tmp16
   %tmp18 = fpext float %tmp17 to double
   %tmp19 = fadd double %tmp18, %tmp15
   %tmp20 = fptrunc double %tmp19 to float
-  store float %tmp20, float* %tmp16, align 4
+  store float %tmp20, float* %tmp16
   br label %bb21
 
 bb21:                                             ; preds = %bb2
@@ -135,11 +142,11 @@ bb23:                                             ; preds = %bb1
 
 define i32 @main() {
 bb:
-  %A = alloca [10 x float], align 16
-  %B = alloca [10 x double], align 16
-  %C = alloca [10 x i8], align 1
-  %D = alloca [10 x i32], align 16
-  %E = alloca [10 x i64], align 16
+  %A = alloca [10 x float]
+  %B = alloca [10 x double]
+  %C = alloca [10 x i8]
+  %D = alloca [10 x i32]
+  %E = alloca [10 x i64]
   br label %bb1
 
 bb1:                                              ; preds = %bb7, %bb
@@ -150,15 +157,15 @@ bb1:                                              ; preds = %bb7, %bb
 bb2:                                              ; preds = %bb1
   fence seq_cst
   %tmp = getelementptr inbounds [10 x i64], [10 x i64]* %E, i64 0, i64 %i.0
-  store i64 42, i64* %tmp, align 8
+  store i64 42, i64* %tmp
   %tmp3 = getelementptr inbounds [10 x i32], [10 x i32]* %D, i64 0, i64 %i.0
-  store i32 42, i32* %tmp3, align 4
+  store i32 42, i32* %tmp3
   %tmp4 = getelementptr inbounds [10 x i8], [10 x i8]* %C, i64 0, i64 %i.0
-  store i8 42, i8* %tmp4, align 1
+  store i8 42, i8* %tmp4
   %tmp5 = getelementptr inbounds [10 x double], [10 x double]* %B, i64 0, i64 %i.0
-  store double 4.200000e+01, double* %tmp5, align 8
+  store double 4.200000e+01, double* %tmp5
   %tmp6 = getelementptr inbounds [10 x float], [10 x float]* %A, i64 0, i64 %i.0
-  store float 4.200000e+01, float* %tmp6, align 4
+  store float 4.200000e+01, float* %tmp6
   br label %bb7
 
 bb7:                                              ; preds = %bb2
@@ -173,7 +180,7 @@ bb9:                                              ; preds = %bb1
   %tmp14 = getelementptr inbounds [10 x i64], [10 x i64]* %E, i64 0, i64 0
   call void @foo(float* %tmp10, double* %tmp11, i8* %tmp12, i32* %tmp13, i64* %tmp14)
   %tmp15 = getelementptr inbounds [10 x float], [10 x float]* %A, i64 0, i64 8
-  %tmp16 = load float, float* %tmp15, align 16
+  %tmp16 = load float, float* %tmp15
   %tmp17 = fptosi float %tmp16 to i32
   ret i32 %tmp17
 }
diff --git a/polly/test/Isl/CodeGen/aliasing_different_base_and_access_type.ll b/polly/test/Isl/CodeGen/aliasing_different_base_and_access_type.ll
index a5d2f7a..60e80be 100644
--- a/polly/test/Isl/CodeGen/aliasing_different_base_and_access_type.ll
+++ b/polly/test/Isl/CodeGen/aliasing_different_base_and_access_type.ll
@@ -3,7 +3,7 @@
 ; We have to cast %B to "short *" before we create RTCs.
 ;
 ; CHECK:   %polly.access.cast.B = bitcast i32* %B to i16*
-; CHECK-NEXT:   %polly.access.B = getelementptr i16, i16* %polly.access.cast.B, i64 1024
+; CHECK-NEXT:   %polly.access.B = getelementptr i16, i16* %polly.access.cast.B, i12 1024
 ;
 ; We should never access %B as an i32 pointer:
 ;
diff --git a/polly/test/Isl/CodeGen/aliasing_different_pointer_types.ll b/polly/test/Isl/CodeGen/aliasing_different_pointer_types.ll
index 43a06bf..e26895a 100644
--- a/polly/test/Isl/CodeGen/aliasing_different_pointer_types.ll
+++ b/polly/test/Isl/CodeGen/aliasing_different_pointer_types.ll
@@ -4,13 +4,13 @@
 ; them in the RTC's. We use i8* as max pointer type.
 ;
 ; CHECK:   polly.split_new_and_old:
-; CHECK:   %polly.access.B = getelementptr float*, float** %B, i64 1024
-; CHECK:   %polly.access.A = getelementptr double*, double** %A, i64 0
+; CHECK:   %polly.access.B = getelementptr float*, float** %B, i12 1024
+; CHECK:   %polly.access.A = getelementptr double*, double** %A, i1 false
 ; CHECK:   %[[paBb:[._a-zA-Z0-9]]] = ptrtoint float** %polly.access.B to i64
 ; CHECK:   %[[paAb:[._a-zA-Z0-9]]] = ptrtoint double** %polly.access.A to i64
 ; CHECK:   %[[ALeB:[._a-zA-Z0-9]]] = icmp ule i64 %[[paBb]], %[[paAb]]
-; CHECK:   %polly.access.A1 = getelementptr double*, double** %A, i64 1024
-; CHECK:   %polly.access.B2 = getelementptr float*, float** %B, i64 0
+; CHECK:   %polly.access.A1 = getelementptr double*, double** %A, i12 1024
+; CHECK:   %polly.access.B2 = getelementptr float*, float** %B, i1 false
 ; CHECK:   %[[paA1b:[._a-zA-Z0-9]]] = ptrtoint double** %polly.access.A1 to i64
 ; CHECK:   %[[paB2b:[._a-zA-Z0-9]]] = ptrtoint float** %polly.access.B2 to i64
 ; CHECK:   %[[A1LeB2:[._a-zA-Z0-9]]] = icmp ule i64 %[[paA1b]], %[[paB2b]]
diff --git a/polly/test/Isl/CodeGen/aliasing_parametric_simple_1.ll b/polly/test/Isl/CodeGen/aliasing_parametric_simple_1.ll
index eaf5c7f..a2151a6 100644
--- a/polly/test/Isl/CodeGen/aliasing_parametric_simple_1.ll
+++ b/polly/test/Isl/CodeGen/aliasing_parametric_simple_1.ll
@@ -5,26 +5,21 @@
 ;        A[i] = B[c];
 ;    }
 ;
-; CHECK:  %[[Cext:[._a-zA-Z0-9]*]] = sext i32 %c to i64
-; CHECK:  %[[Cp1:[._a-zA-Z0-9]*]]  = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %[[Cext]], i64 1)
-; CHECK:  %[[Cp1O:[._a-zA-Z0-9]*]] = extractvalue { i64, i1 } %[[Cp1]], 1
-; CHECK:  %[[OS:[._a-zA-Z0-9]*]]   = or i1 false, %[[Cp1O]]
-; CHECK:  %[[Cp1R:[._a-zA-Z0-9]*]] = extractvalue { i64, i1 } %[[Cp1]], 0
-; CHECK:  %[[BMax:[._a-zA-Z0-9]*]] = getelementptr i32, i32* %B, i64 %[[Cp1R]]
-; CHECK:  %[[AMin:[._a-zA-Z0-9]*]] = getelementptr i32, i32* %A, i64 0
+; CHECK:  %[[Cext:[._a-zA-Z0-9]*]] = sext i32 %c to i33
+; CHECK:  %[[Cp1:[._a-zA-Z0-9]*]]  = add nsw i33 %[[Cext]], 1
+; CHECK:  %[[BMax:[._a-zA-Z0-9]*]] = getelementptr i32, i32* %B, i33 %[[Cp1]]
+; CHECK:  %[[AMin:[._a-zA-Z0-9]*]] = getelementptr i32, i32* %A, i1 false
 ; CHECK:  %[[BMaxI:[._a-zA-Z0-9]*]] = ptrtoint i32* %[[BMax]] to i64
 ; CHECK:  %[[AMinI:[._a-zA-Z0-9]*]] = ptrtoint i32* %[[AMin]] to i64
 ; CHECK:  %[[BltA:[._a-zA-Z0-9]*]] = icmp ule i64 %[[BMaxI]], %[[AMinI]]
-; CHECK:  %[[AMax:[._a-zA-Z0-9]*]] = getelementptr i32, i32* %A, i64 1024
+; CHECK:  %[[AMax:[._a-zA-Z0-9]*]] = getelementptr i32, i32* %A, i12 1024
 ; CHECK:  %[[BMin:[._a-zA-Z0-9]*]] = getelementptr i32, i32* %B, i32 %c
 ; CHECK:  %[[AMaxI:[._a-zA-Z0-9]*]] = ptrtoint i32* %[[AMax]] to i64
 ; CHECK:  %[[BMinI:[._a-zA-Z0-9]*]] = ptrtoint i32* %[[BMin]] to i64
 ; CHECK:  %[[AltB:[._a-zA-Z0-9]*]] = icmp ule i64 %[[AMaxI]], %[[BMinI]]
 ; CHECK:  %[[NoAlias:[._a-zA-Z0-9]*]] = or i1 %[[BltA]], %[[AltB]]
 ; CHECK:  %[[RTC:[._a-zA-Z0-9]*]] = and i1 true, %[[NoAlias]]
-; CHECK:  %[[NOV:[._a-zA-Z0-9]*]] = xor i1 %[[OS]], true
-; CHECK:  %[[RTCV:[._a-zA-Z0-9]*]] = and i1 %[[RTC]], %[[NOV]]
-; CHECK:  br i1 %[[RTCV]], label %polly.start, label %for.cond
+; CHECK:  br i1 %[[RTC]], label %polly.start, label %for.cond
 ;
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 
diff --git a/polly/test/Isl/CodeGen/aliasing_parametric_simple_2.ll b/polly/test/Isl/CodeGen/aliasing_parametric_simple_2.ll
index 24b52ce..4f14c41 100644
--- a/polly/test/Isl/CodeGen/aliasing_parametric_simple_2.ll
+++ b/polly/test/Isl/CodeGen/aliasing_parametric_simple_2.ll
@@ -6,35 +6,27 @@
 ;    }
 ;
 ; CHECK:  %[[Ctx:[._a-zA-Z0-9]*]] = and i1 true
-; CHECK-NEXT:  %[[M0:[._a-zA-Z0-9]*]] = sext i32 %c to i64
-; CHECK-NEXT:  %[[M3:[._a-zA-Z0-9]*]] = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %[[M0]], i64 9)
-; CHECK-NEXT:  %[[M3O:[._a-zA-Z0-9]*]] = extractvalue { i64, i1 } %[[M3]], 1
-; CHECK-NEXT:  %[[OS0:[._a-zA-Z0-9]*]]   = or i1 false, %[[M3O]]
-; CHECK-NEXT:  %[[M3R:[._a-zA-Z0-9]*]] = extractvalue { i64, i1 } %[[M3]], 0
-; CHECK-NEXT:  %[[M1:[._a-zA-Z0-9]*]] = icmp sgt i64 6, %[[M3R]]
-; CHECK-NEXT:  %[[M4:[._a-zA-Z0-9]*]] = select i1 %[[M1]], i64 6, i64 %[[M3R]]
-; CHECK-NEXT:  %[[BMax:[._a-zA-Z0-9]*]] = getelementptr i32, i32* %B, i64 %[[M4]]
-; CHECK-NEXT:  %[[AMin:[._a-zA-Z0-9]*]] = getelementptr i32, i32* %A, i64 0
+; CHECK-NEXT:  %[[M0:[._a-zA-Z0-9]*]] = sext i32 %c to i33
+; CHECK-NEXT:  %[[M3:[._a-zA-Z0-9]*]] = sub nsw i33 %[[M0]], 9
+; CHECK-NEXT:  %[[M1:[._a-zA-Z0-9]*]] = icmp sgt i33 6, %[[M3]]
+; CHECK-NEXT:  %[[M4:[._a-zA-Z0-9]*]] = select i1 %[[M1]], i33 6, i33 %[[M3]]
+; CHECK-NEXT:  %[[BMax:[._a-zA-Z0-9]*]] = getelementptr i32, i32* %B, i33 %[[M4]]
+; CHECK-NEXT:  %[[AMin:[._a-zA-Z0-9]*]] = getelementptr i32, i32* %A, i1 false
 ; CHECK-NEXT:  %[[BMaxI:[._a-zA-Z0-9]*]] = ptrtoint i32* %[[BMax]] to i64
 ; CHECK-NEXT:  %[[AMinI:[._a-zA-Z0-9]*]] = ptrtoint i32* %[[AMin]] to i64
 ; CHECK-NEXT:  %[[BltA:[._a-zA-Z0-9]*]] = icmp ule i64 %[[BMaxI]], %[[AMinI]]
-; CHECK-NEXT:  %[[AMax:[._a-zA-Z0-9]*]] = getelementptr i32, i32* %A, i64 1024
-; CHECK-NEXT:  %[[m0:[._a-zA-Z0-9]*]] = sext i32 %c to i64
-; CHECK-NEXT:  %[[m3:[._a-zA-Z0-9]*]] = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %[[m0]], i64 10)
-; CHECK-NEXT:  %[[m3O:[._a-zA-Z0-9]*]] = extractvalue { i64, i1 } %[[m3]], 1
-; CHECK-NEXT:  %[[OS1:[._a-zA-Z0-9]*]]   = or i1 %[[OS0]], %[[m3O]]
-; CHECK-NEXT:  %[[m3R:[._a-zA-Z0-9]*]] = extractvalue { i64, i1 } %[[m3]], 0
-; CHECK-NEXT:  %[[m1:[._a-zA-Z0-9]*]] = icmp slt i64 5, %[[m3R]]
-; CHECK-NEXT:  %[[m4:[._a-zA-Z0-9]*]] = select i1 %[[m1]], i64 5, i64 %[[m3R]]
-; CHECK-NEXT:  %[[BMin:[._a-zA-Z0-9]*]] = getelementptr i32, i32* %B, i64 %[[m4]]
+; CHECK-NEXT:  %[[AMax:[._a-zA-Z0-9]*]] = getelementptr i32, i32* %A, i12 1024
+; CHECK-NEXT:  %[[m0:[._a-zA-Z0-9]*]] = sext i32 %c to i33
+; CHECK-NEXT:  %[[m3:[._a-zA-Z0-9]*]] = sub nsw i33 %[[m0]], 10
+; CHECK-NEXT:  %[[m1:[._a-zA-Z0-9]*]] = icmp slt i33 5, %[[m3]]
+; CHECK-NEXT:  %[[m4:[._a-zA-Z0-9]*]] = select i1 %[[m1]], i33 5, i33 %[[m3]]
+; CHECK-NEXT:  %[[BMin:[._a-zA-Z0-9]*]] = getelementptr i32, i32* %B, i33 %[[m4]]
 ; CHECK-NEXT:  %[[AMaxI:[._a-zA-Z0-9]*]] = ptrtoint i32* %[[AMax]] to i64
 ; CHECK-NEXT:  %[[BMinI:[._a-zA-Z0-9]*]] = ptrtoint i32* %[[BMin]] to i64
 ; CHECK-NEXT:  %[[AltB:[._a-zA-Z0-9]*]] = icmp ule i64 %[[AMaxI]], %[[BMinI]]
 ; CHECK-NEXT:  %[[NoAlias:[._a-zA-Z0-9]*]] = or i1 %[[BltA]], %[[AltB]]
 ; CHECK-NEXT:  %[[RTC:[._a-zA-Z0-9]*]] = and i1 %[[Ctx]], %[[NoAlias]]
-; CHECK-NEXT:  %[[NOV:[._a-zA-Z0-9]*]] = xor i1 %[[OS1]], true
-; CHECK-NEXT:  %[[RTCV:[._a-zA-Z0-9]*]] = and i1 %[[RTC]], %[[NOV]]
-; CHECK-NEXT:  br i1 %[[RTCV]], label %polly.start, label %for.cond
+; CHECK-NEXT:  br i1 %[[RTC]], label %polly.start, label %for.cond
 ;
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 
diff --git a/polly/test/Isl/CodeGen/aliasing_struct_element.ll b/polly/test/Isl/CodeGen/aliasing_struct_element.ll
index ceec5ee..ce6ec72 100644
--- a/polly/test/Isl/CodeGen/aliasing_struct_element.ll
+++ b/polly/test/Isl/CodeGen/aliasing_struct_element.ll
@@ -11,7 +11,7 @@
 ; compute runtime alias checks but treat it as if it was a char array.
 ;
 ; CHECK: %polly.access.cast.S = bitcast %struct.st* %S to i8*
-; CHECK: %polly.access.S = getelementptr i8, i8* %polly.access.cast.S, i64 1424
+; CHECK: %polly.access.S = getelementptr i8, i8* %polly.access.cast.S, i12 1424
 ;
 ;    struct st {
 ;      int Dummy[100];
diff --git a/polly/test/Isl/CodeGen/annotated_alias_scopes.ll b/polly/test/Isl/CodeGen/annotated_alias_scopes.ll
index 912a090..05e2cab 100644
--- a/polly/test/Isl/CodeGen/annotated_alias_scopes.ll
+++ b/polly/test/Isl/CodeGen/annotated_alias_scopes.ll
@@ -3,11 +3,14 @@
 ; Check that we create alias scopes that indicate the accesses to A, B and C cannot alias in any way.
 ;
 ; SCOPES-LABEL: polly.stmt.for.body:
-; SCOPES:      %[[BIdx:[._a-zA-Z0-9]*]] = getelementptr{{.*}} i32* %B, i64 %polly.indvar
+; SCOPES:      %[[R0:[0-9]*]] = zext i11 %polly.indvar to i64
+; SCOPES:      %[[BIdx:[._a-zA-Z0-9]*]] = getelementptr{{.*}} i32* %B, i64 %[[R0]]
 ; SCOPES:      load i32, i32* %[[BIdx]], align 4, !alias.scope ![[AliasScopeB:[0-9]*]], !noalias ![[NoAliasB:[0-9]*]]
-; SCOPES:      %[[CIdx:[._a-zA-Z0-9]*]] = getelementptr{{.*}} float* %C, i64 %polly.indvar
+; SCOPES:      %[[R1:[0-9]*]] = zext i11 %polly.indvar to i64
+; SCOPES:      %[[CIdx:[._a-zA-Z0-9]*]] = getelementptr{{.*}} float* %C, i64 %[[R1]]
 ; SCOPES:      load float, float* %[[CIdx]], align 4, !alias.scope ![[AliasScopeC:[0-9]*]], !noalias ![[NoAliasC:[0-9]*]]
-; SCOPES:      %[[AIdx:[._a-zA-Z0-9]*]] = getelementptr{{.*}} i32* %A, i64 %polly.indvar
+; SCOPES:      %[[R2:[0-9]*]] = zext i11 %polly.indvar to i64
+; SCOPES:      %[[AIdx:[._a-zA-Z0-9]*]] = getelementptr{{.*}} i32* %A, i64 %[[R2]]
 ; SCOPES:      store i32 %{{[._a-zA-Z0-9]*}}, i32* %[[AIdx]], align 4, !alias.scope ![[AliasScopeA:[0-9]*]], !noalias ![[NoAliasA:[0-9]*]]
 ;
 ; SCOPES:      ![[AliasScopeB]] = distinct !{![[AliasScopeB]], !{{[0-9]*}}, !"polly.alias.scope.B"}
diff --git a/polly/test/Isl/CodeGen/invariant_cannot_handle_void.ll b/polly/test/Isl/CodeGen/invariant_cannot_handle_void.ll
index e9d607be3..3f42227 100644
--- a/polly/test/Isl/CodeGen/invariant_cannot_handle_void.ll
+++ b/polly/test/Isl/CodeGen/invariant_cannot_handle_void.ll
@@ -18,7 +18,7 @@
 ;
 ; CHECK-LABEL: polly.preload.begin:
 ; CHECK-NEXT:    %polly.access.cast.buff = bitcast i8* %buff to i16*
-; CHECK-NEXT:    %polly.access.buff = getelementptr i16, i16* %polly.access.cast.buff, i64 31
+; CHECK-NEXT:    %polly.access.buff = getelementptr i16, i16* %polly.access.cast.buff, i6 31
 ; CHECK-NEXT:    %polly.access.buff.cast = bitcast i16* %polly.access.buff to i32*
 ; CHECK-NEXT:    %polly.access.buff.load = load i32, i32* %polly.access.buff.cast, align 4
 ; CHECK-NEXT:    store i32 %polly.access.buff.load, i32* %tmp1.preload.s2a
diff --git a/polly/test/Isl/CodeGen/invariant_load.ll b/polly/test/Isl/CodeGen/invariant_load.ll
index a48dc20..b617319 100644
--- a/polly/test/Isl/CodeGen/invariant_load.ll
+++ b/polly/test/Isl/CodeGen/invariant_load.ll
@@ -1,11 +1,12 @@
 ; RUN: opt %loadPolly -polly-codegen -S < %s | FileCheck %s
 ;
 ; CHECK-LABEL: polly.preload.begin:
-; CHECK-NEXT:    %polly.access.B = getelementptr i32, i32* %B, i64 0
+; CHECK-NEXT:    %polly.access.B = getelementptr i32, i32* %B, i1 false
 ; CHECK-NEXT:    %polly.access.B.load = load i32, i32* %polly.access.B
 ;
 ; CHECK-LABEL: polly.stmt.bb2:
-; CHECK-NEXT:    %scevgep = getelementptr i32, i32* %A, i64 %polly.indvar
+; CHECK-NEXT:    %[[R:[0-9]*]] = zext i11 %polly.indvar to i64
+; CHECK-NEXT:    %scevgep = getelementptr i32, i32* %A, i64 %[[R]]
 ; CHECK-NEXT:    store i32 %polly.access.B.load, i32* %scevgep, align 4
 ;
 ;    void f(int *restrict A, int *restrict B) {
diff --git a/polly/test/Isl/CodeGen/invariant_load_base_pointer.ll b/polly/test/Isl/CodeGen/invariant_load_base_pointer.ll
index 4a6db93..77cbd04 100644
--- a/polly/test/Isl/CodeGen/invariant_load_base_pointer.ll
+++ b/polly/test/Isl/CodeGen/invariant_load_base_pointer.ll
@@ -1,11 +1,12 @@
 ; RUN: opt %loadPolly  -polly-codegen -polly-ignore-aliasing -polly-process-unprofitable -S < %s | FileCheck %s
 ;
 ; CHECK-LABEL: polly.preload.begin:
-; CHECK-NEXT:    %polly.access.BPLoc = getelementptr i32*, i32** %BPLoc, i64 0
+; CHECK-NEXT:    %polly.access.BPLoc = getelementptr i32*, i32** %BPLoc, i1 false
 ; CHECK-NEXT:    %polly.access.BPLoc.load = load i32*, i32** %polly.access.BPLoc
 ;
 ; CHECK-LABEL: polly.stmt.bb2:
-; CHECK-NEXT:    %p_tmp3 = getelementptr inbounds i32, i32* %polly.access.BPLoc.load, i64 %polly.indvar
+; CHECK-NEXT:    %[[R:[0-9]*]] = zext i11 %polly.indvar to i64
+; CHECK-NEXT:    %p_tmp3 = getelementptr inbounds i32, i32* %polly.access.BPLoc.load, i64 %[[R]]
 ;
 ;    void f(int **BPLoc) {
 ;      for (int i = 0; i < 1024; i++)
diff --git a/polly/test/Isl/CodeGen/invariant_load_base_pointer_conditional.ll b/polly/test/Isl/CodeGen/invariant_load_base_pointer_conditional.ll
index 6ede0b4..3aaa45e 100644
--- a/polly/test/Isl/CodeGen/invariant_load_base_pointer_conditional.ll
+++ b/polly/test/Isl/CodeGen/invariant_load_base_pointer_conditional.ll
@@ -1,18 +1,18 @@
 ; RUN: opt %loadPolly  -polly-codegen -polly-ignore-aliasing -polly-process-unprofitable -S < %s | FileCheck %s
 ;
 ; CHECK-LABEL: polly.preload.begin:
-; CHECK-NEXT:    %0 = sext i32 %N to i64
-; CHECK-NEXT:    %1 = icmp sge i64 %0, 514
+; CHECK-NEXT:    %0 = icmp sge i32 %N, 514
 ; CHECK-NEXT:    br label %polly.preload.cond
 ;
 ; CHECK-LABEL: polly.preload.cond:
-; CHECK-NEXT:    br i1 %1, label %polly.preload.exec, label %polly.preload.merge
+; CHECK-NEXT:    br i1 %0, label %polly.preload.exec, label %polly.preload.merge
 ;
 ; CHECK-LABEL: polly.preload.merge:
 ; CHECK-NEXT:    %polly.preload.tmp6.merge = phi i32* [ %polly.access.BPLoc.load, %polly.preload.exec ], [ null, %polly.preload.cond ]
 ;
 ; CHECK-LABEL: polly.stmt.bb5:
-; CHECK-NEXT:    %p_tmp7 = getelementptr inbounds i32, i32* %polly.preload.tmp6.merge, i64 %polly.indvar6
+; CHECK-NEXT:    %[[R:[0-9]*]] = zext i32 %polly.indvar6 to i64
+; CHECK-NEXT:    %p_tmp7 = getelementptr inbounds i32, i32* %polly.preload.tmp6.merge, i64 %[[R]]
 ;
 ;    void f(int **BPLoc, int *A, int N) {
 ;      for (int i = 0; i < N; i++)
diff --git a/polly/test/Isl/CodeGen/invariant_load_base_pointer_conditional_2.ll b/polly/test/Isl/CodeGen/invariant_load_base_pointer_conditional_2.ll
index 8ce9afc3..67de303 100644
--- a/polly/test/Isl/CodeGen/invariant_load_base_pointer_conditional_2.ll
+++ b/polly/test/Isl/CodeGen/invariant_load_base_pointer_conditional_2.ll
@@ -14,66 +14,56 @@
 ; CHECK-NEXT:            Execution Context: [N, p, q] -> {  : N > 0 }
 ; CHECK-NEXT:    }
 ;
-; IR:      polly.preload.merge:
+; IR:  polly.preload.merge:
 ; IR-NEXT:   %polly.preload.tmp1.merge = phi i32* [ %polly.access.I.load, %polly.preload.exec ], [ null, %polly.preload.cond ]
 ; IR-NEXT:   store i32* %polly.preload.tmp1.merge, i32** %tmp1.preload.s2a
-; IR-NEXT:   %12 = sext i32 %N to i64
-; IR-NEXT:   %13 = icmp sge i64 %12, 1
-; IR-NEXT:   %14 = sext i32 %p to i64
-; IR-NEXT:   %15 = sext i32 %q to i64
-; IR-NEXT:   %16 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %14, i64 %15)
-; IR-NEXT:   %.obit4 = extractvalue { i64, i1 } %16, 1
-; IR-NEXT:   %polly.overflow.state5 = or i1 false, %.obit4
-; IR-NEXT:   %.res6 = extractvalue { i64, i1 } %16, 0
-; IR-NEXT:   %17 = icmp sle i64 %.res6, 2147483647
-; IR-NEXT:   %18 = and i1 %13, %17
-; IR-NEXT:   %19 = sext i32 %p to i64
-; IR-NEXT:   %20 = sext i32 %q to i64
-; IR-NEXT:   %21 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %19, i64 %20)
-; IR-NEXT:   %.obit7 = extractvalue { i64, i1 } %21, 1
-; IR-NEXT:   %polly.overflow.state8 = or i1 %polly.overflow.state5, %.obit7
-; IR-NEXT:   %.res9 = extractvalue { i64, i1 } %21, 0
-; IR-NEXT:   %22 = icmp sge i64 %.res9, -2147483648
-; IR-NEXT:   %23 = and i1 %18, %22
-; IR-NEXT:   %polly.preload.cond.overflown10 = xor i1 %polly.overflow.state8, true
-; IR-NEXT:   %polly.preload.cond.result11 = and i1 %23, %polly.preload.cond.overflown10
-; IR-NEXT:   br label %polly.preload.cond12
+; IR-NEXT:   %11 = icmp sge i32 %N, 1
+; IR-NEXT:   %12 = sext i32 %p to i33
+; IR-NEXT:   %13 = sext i32 %q to i33
+; IR-NEXT:   %14 = add nsw i33 %12, %13
+; IR-NEXT:   %15 = icmp sle i33 %14, 2147483647
+; IR-NEXT:   %16 = and i1 %11, %15
+; IR-NEXT:   %17 = sext i32 %p to i33
+; IR-NEXT:   %18 = sext i32 %q to i33
+; IR-NEXT:   %19 = add nsw i33 %17, %18
+; IR-NEXT:   %20 = icmp sge i33 %19, -2147483648
+; IR-NEXT:   %21 = and i1 %16, %20
+; IR-NEXT:   br label %polly.preload.cond1
 ;
-; IR:      polly.preload.cond12:
-; IR-NEXT:   br i1 %polly.preload.cond.result11
-;
-; IR:      polly.preload.exec14:
-; IR-NEXT:   %polly.access.polly.preload.tmp1.merge = getelementptr i32, i32* %polly.preload.tmp1.merge, i64 0
+; IR:       polly.preload.cond1:
+; IR-NEXT:    br i1 %21, label %polly.preload.exec3, label %polly.preload.merge2
+
+; IR:      polly.preload.exec3:
+; IR-NEXT:   %polly.access.polly.preload.tmp1.merge = getelementptr i32, i32* %polly.preload.tmp1.merge, i1 false
 ; IR-NEXT:   %polly.access.polly.preload.tmp1.merge.load = load i32, i32* %polly.access.polly.preload.tmp1.merge, align 4
 ;
 ; IRA:      polly.preload.merge:
 ; IRA-NEXT:   %polly.preload.tmp1.merge = phi i32* [ %polly.access.I.load, %polly.preload.exec ], [ null, %polly.preload.cond ]
 ; IRA-NEXT:   store i32* %polly.preload.tmp1.merge, i32** %tmp1.preload.s2a
-; IRA-NEXT:   %12 = sext i32 %N to i64
-; IRA-NEXT:   %13 = icmp sge i64 %12, 1
-; IRA-NEXT:   %14 = sext i32 %p to i64
-; IRA-NEXT:   %15 = sext i32 %q to i64
-; IRA-NEXT:   %16 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %14, i64 %15)
-; IRA-NEXT:   %.obit5 = extractvalue { i64, i1 } %16, 1
-; IRA-NEXT:   %.res6 = extractvalue { i64, i1 } %16, 0
-; IRA-NEXT:   %17 = icmp sle i64 %.res6, 2147483647
-; IRA-NEXT:   %18 = and i1 %13, %17
-; IRA-NEXT:   %19 = sext i32 %p to i64
-; IRA-NEXT:   %20 = sext i32 %q to i64
-; IRA-NEXT:   %21 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %19, i64 %20)
-; IRA-NEXT:   %.obit7 = extractvalue { i64, i1 } %21, 1
-; IRA-NEXT:   %.res8 = extractvalue { i64, i1 } %21, 0
-; IRA-NEXT:   %22 = icmp sge i64 %.res8, -2147483648
-; IRA-NEXT:   %23 = and i1 %18, %22
+; IRA-NEXT:   %11 = icmp sge i32 %N, 1
+; IRA-NEXT:   %12 = sext i32 %p to i33
+; IRA-NEXT:   %13 = sext i32 %q to i33
+; IRA-NEXT:   %14 = call { i33, i1 } @llvm.sadd.with.overflow.i33(i33 %12, i33 %13)
+; IRA-NEXT:   %.obit5 = extractvalue { i33, i1 } %14, 1
+; IRA-NEXT:   %.res6 = extractvalue { i33, i1 } %14, 0
+; IRA-NEXT:   %15 = icmp sle i33 %.res6, 2147483647
+; IRA-NEXT:   %16 = and i1 %11, %15
+; IRA-NEXT:   %17 = sext i32 %p to i33
+; IRA-NEXT:   %18 = sext i32 %q to i33
+; IRA-NEXT:   %19 = call { i33, i1 } @llvm.sadd.with.overflow.i33(i33 %17, i33 %18)
+; IRA-NEXT:   %.obit7 = extractvalue { i33, i1 } %19, 1
+; IRA-NEXT:   %.res8 = extractvalue { i33, i1 } %19, 0
+; IRA-NEXT:   %20 = icmp sge i33 %.res8, -2147483648
+; IRA-NEXT:   %21 = and i1 %16, %20
 ; IRA-NEXT:   %polly.preload.cond.overflown9 = xor i1 %.obit7, true
-; IRA-NEXT:   %polly.preload.cond.result10 = and i1 %23, %polly.preload.cond.overflown9
+; IRA-NEXT:   %polly.preload.cond.result10 = and i1 %21, %polly.preload.cond.overflown9
 ; IRA-NEXT:   br label %polly.preload.cond11
 ;
 ; IRA:      polly.preload.cond11:
 ; IRA-NEXT:   br i1 %polly.preload.cond.result10
 ;
 ; IRA:      polly.preload.exec13:
-; IRA-NEXT:   %polly.access.polly.preload.tmp1.merge = getelementptr i32, i32* %polly.preload.tmp1.merge, i64 0
+; IRA-NEXT:   %polly.access.polly.preload.tmp1.merge = getelementptr i32, i32* %polly.preload.tmp1.merge, i1 false
 ; IRA-NEXT:   %polly.access.polly.preload.tmp1.merge.load = load i32, i32* %polly.access.polly.preload.tmp1.merge, align 4
 ;
 ;    void f(int **I, int *A, int N, int p, int q) {
diff --git a/polly/test/Isl/CodeGen/invariant_load_condition.ll b/polly/test/Isl/CodeGen/invariant_load_condition.ll
index a192dd3..e50447f 100644
--- a/polly/test/Isl/CodeGen/invariant_load_condition.ll
+++ b/polly/test/Isl/CodeGen/invariant_load_condition.ll
@@ -1,17 +1,15 @@
 ; RUN: opt %loadPolly -polly-process-unprofitable -polly-codegen -S < %s | FileCheck %s
 ;
 ; CHECK-LABEL: polly.preload.begin:
-; CHECK-NEXT:     %polly.access.C = getelementptr i32, i32* %C, i64 0
+; CHECK-NEXT:     %polly.access.C = getelementptr i32, i32* %C, i1 false
 ; CHECK-NEXT:     %polly.access.C.load = load i32, i32* %polly.access.C
 ; CHECK-NOT:      %polly.access.C.load = load i32, i32* %polly.access.C
 ;
 ; CHECK: polly.cond
-; CHECK:   %[[R0:[0-9]*]] = sext i32 %polly.access.C.load to i64
-; CHECK:   %[[R1:[0-9]*]] = icmp sle i64 %[[R0]], -1
+; CHECK:   %[[R1:[0-9]*]] = icmp sle i32 %polly.access.C.load, -1
 ;
 ; CHECK: polly.cond
-; CHECK:   %[[R2:[0-9]*]] = sext i32 %polly.access.C.load to i64
-; CHECK:   %[[R3:[0-9]*]] = icmp sge i64 %[[R2]], 1
+; CHECK:   %[[R3:[0-9]*]] = icmp sge i32 %polly.access.C.load, 1
 ;
 ; CHECK-NOT:  polly.stmt.bb2
 ;
diff --git a/polly/test/Isl/CodeGen/invariant_load_different_sized_types.ll b/polly/test/Isl/CodeGen/invariant_load_different_sized_types.ll
index 969a87f..027f57a 100644
--- a/polly/test/Isl/CodeGen/invariant_load_different_sized_types.ll
+++ b/polly/test/Isl/CodeGen/invariant_load_different_sized_types.ll
@@ -5,7 +5,7 @@ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 
 ; CHECK: polly.preload.begin:  ; preds = %polly.split_new_and_old
 ; CHECK-NEXT:   %polly.access.cast.tmp2 = bitcast %struct.hoge* %tmp2 to i32*
-; CHECK-NEXT:   %polly.access.tmp2 = getelementptr i32, i32* %polly.access.cast.tmp2, i64 1
+; CHECK-NEXT:   %polly.access.tmp2 = getelementptr i32, i32* %polly.access.cast.tmp2, i2 1
 ; CHECK-NEXT:   %polly.access.tmp2.load = load i32, i32* %polly.access.tmp2, align 1
 ; CHECK-NEXT:   store i32 %polly.access.tmp2.load, i32* %tmp.preload.s2a
 
diff --git a/polly/test/Isl/CodeGen/invariant_load_escaping.ll b/polly/test/Isl/CodeGen/invariant_load_escaping.ll
index 56918bf..8b971c9 100644
--- a/polly/test/Isl/CodeGen/invariant_load_escaping.ll
+++ b/polly/test/Isl/CodeGen/invariant_load_escaping.ll
@@ -16,7 +16,7 @@
 ;    }
 ;
 ; CHECK: polly.preload.begin:
-; CHECK:   %polly.access.B = getelementptr i32, i32* %B, i64 0
+; CHECK:   %polly.access.B = getelementptr i32, i32* %B, i1 false
 ; CHECK:   %polly.access.B.load = load i32, i32* %polly.access.B
 ; CHECK:   store i32 %polly.access.B.load, i32* %tmp.preload.s2a
 ;
diff --git a/polly/test/Isl/CodeGen/invariant_load_escaping_second_scop.ll b/polly/test/Isl/CodeGen/invariant_load_escaping_second_scop.ll
index d835adf..042aaf2 100644
--- a/polly/test/Isl/CodeGen/invariant_load_escaping_second_scop.ll
+++ b/polly/test/Isl/CodeGen/invariant_load_escaping_second_scop.ll
@@ -19,7 +19,8 @@
 ;    }
 ;
 ; CHECK: polly.stmt.stmt.P:
-; CHECK:   sext i32 %tmp.merge to i64
+; CHECK:   %polly.fdiv_q.shr = ashr i32 %tmp.merge, 1
+; CHECL:   sext i32 %polly.fdiv_q.shr to i33
 ;
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 
diff --git a/polly/test/Isl/CodeGen/invariant_load_ptr_ptr_noalias.ll b/polly/test/Isl/CodeGen/invariant_load_ptr_ptr_noalias.ll
index 81b0299..aa9350a 100644
--- a/polly/test/Isl/CodeGen/invariant_load_ptr_ptr_noalias.ll
+++ b/polly/test/Isl/CodeGen/invariant_load_ptr_ptr_noalias.ll
@@ -1,13 +1,14 @@
 ; RUN: opt %loadPolly -polly-process-unprofitable -polly-codegen -polly-ignore-aliasing -S  < %s | FileCheck %s
 ;
 ; CHECK-LABEL: polly.preload.begin:
-; CHECK:   %polly.access.A = getelementptr i32**, i32*** %A, i64 42
+; CHECK:   %polly.access.A = getelementptr i32**, i32*** %A, i7 42
 ; CHECK:   %polly.access.A.load = load i32**, i32*** %polly.access.A
-; CHECK:   %polly.access.polly.access.A.load = getelementptr i32*, i32** %polly.access.A.load, i64 32
+; CHECK:   %polly.access.polly.access.A.load = getelementptr i32*, i32** %polly.access.A.load, i7 32
 ; CHECK:   %polly.access.polly.access.A.load.load = load i32*, i32** %polly.access.polly.access.A.load
 ;
 ; CHECK: polly.stmt.bb2:
-; CHECK:   %p_tmp6 = getelementptr inbounds i32, i32* %polly.access.polly.access.A.load.load, i64 %polly.indvar
+; CHECK:   %[[R:[0-9]]] = zext i11 %polly.indvar to i64
+; CHECK:   %p_tmp6 = getelementptr inbounds i32, i32* %polly.access.polly.access.A.load.load, i64 %[[R]]
 ; CHECK:   store i32 0, i32* %p_tmp6, align 4
 ;
 ;    void f(int ***A) {
diff --git a/polly/test/Isl/CodeGen/invariant_load_scalar_dep.ll b/polly/test/Isl/CodeGen/invariant_load_scalar_dep.ll
index 24bd68a..fa26899 100644
--- a/polly/test/Isl/CodeGen/invariant_load_scalar_dep.ll
+++ b/polly/test/Isl/CodeGen/invariant_load_scalar_dep.ll
@@ -1,11 +1,12 @@
 ; RUN: opt %loadPolly  -polly-codegen -polly-ignore-aliasing -polly-process-unprofitable -S < %s | FileCheck %s
 ;
 ; CHECK-LABEL: polly.preload.begin:
-; CHECK:    %polly.access.B = getelementptr i32, i32* %B, i64 0
+; CHECK:    %polly.access.B = getelementptr i32, i32* %B, i1 false
 ; CHECK:    %polly.access.B.load = load i32, i32* %polly.access.B
 ;
 ; CHECK-LABEL: polly.stmt.bb2.split:
-; CHECK:    %scevgep = getelementptr i32, i32* %A, i64 %polly.indvar
+; CHECK:    %[[R:[0-9]*]] = zext i11 %polly.indvar to i64
+; CHECK:    %scevgep = getelementptr i32, i32* %A, i64 %[[R]]
 ; CHECK:    store i32 %polly.access.B.load, i32* %scevgep, align 4
 ;
 ;    void f(int *restrict A, int *restrict B) {
diff --git a/polly/test/Isl/CodeGen/multiple-types-invariant-load.ll b/polly/test/Isl/CodeGen/multiple-types-invariant-load.ll
index 71d1be2..52201ed 100644
--- a/polly/test/Isl/CodeGen/multiple-types-invariant-load.ll
+++ b/polly/test/Isl/CodeGen/multiple-types-invariant-load.ll
@@ -1,7 +1,7 @@
 ; RUN: opt %loadPolly -polly-allow-differing-element-types -polly-codegen -S < %s | FileCheck %s
 
 ; CHECK: %polly.access.cast.global.load = bitcast %struct.hoge* %global.load to i32*
-; CHECK: %polly.access.global.load = getelementptr i32, i32* %polly.access.cast.global.load, i64 0
+; CHECK: %polly.access.global.load = getelementptr i32, i32* %polly.access.cast.global.load, i1 false
 ; CHECK: %polly.access.global.load.load = load i32, i32* %polly.access.global.load
 
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
diff --git a/polly/test/Isl/CodeGen/no-overflow-tracking.ll b/polly/test/Isl/CodeGen/no-overflow-tracking.ll
index 3a92d59..107a0df 100644
--- a/polly/test/Isl/CodeGen/no-overflow-tracking.ll
+++ b/polly/test/Isl/CodeGen/no-overflow-tracking.ll
@@ -16,25 +16,24 @@
 ; IR:      polly.preload.merge:
 ; IR-NEXT:   %polly.preload.tmp1.merge = phi i32* [ %polly.access.I.load, %polly.preload.exec ], [ null, %polly.preload.cond ]
 ; IR-NEXT:   store i32* %polly.preload.tmp1.merge, i32** %tmp1.preload.s2a
-; IR-NEXT:   %12 = sext i32 %N to i64
-; IR-NEXT:   %13 = icmp sge i64 %12, 1
-; IR-NEXT:   %14 = sext i32 %p to i64
-; IR-NEXT:   %15 = sext i32 %q to i64
-; IR-NEXT:   %16 = add nsw i64 %14, %15
-; IR-NEXT:   %17 = icmp sle i64 %16, 2147483647
-; IR-NEXT:   %18 = and i1 %13, %17
-; IR-NEXT:   %19 = sext i32 %p to i64
-; IR-NEXT:   %20 = sext i32 %q to i64
-; IR-NEXT:   %21 = add nsw i64 %19, %20
-; IR-NEXT:   %22 = icmp sge i64 %21, -2147483648
-; IR-NEXT:   %23 = and i1 %18, %22
+; IR-NEXT:   %11 = icmp sge i32 %N, 1
+; IR-NEXT:   %12 = sext i32 %p to i33
+; IR-NEXT:   %13 = sext i32 %q to i33
+; IR-NEXT:   %14 = add nsw i33 %12, %13
+; IR-NEXT:   %15 = icmp sle i33 %14, 2147483647
+; IR-NEXT:   %16 = and i1 %11, %15
+; IR-NEXT:   %17 = sext i32 %p to i33
+; IR-NEXT:   %18 = sext i32 %q to i33
+; IR-NEXT:   %19 = add nsw i33 %17, %18
+; IR-NEXT:   %20 = icmp sge i33 %19, -2147483648
+; IR-NEXT:   %21 = and i1 %16, %20
 ; IR-NEXT:   br label %polly.preload.cond1
 ;
 ; IR:      polly.preload.cond1:
-; IR-NEXT:   br i1 %23
+; IR-NEXT:   br i1 %21
 ;
 ; IR:      polly.preload.exec3:
-; IR-NEXT:   %polly.access.polly.preload.tmp1.merge = getelementptr i32, i32* %polly.preload.tmp1.merge, i64 0
+; IR-NEXT:   %polly.access.polly.preload.tmp1.merge = getelementptr i32, i32* %polly.preload.tmp1.merge, i1 false
 ; IR-NEXT:   %polly.access.polly.preload.tmp1.merge.load = load i32, i32* %polly.access.polly.preload.tmp1.merge, align 4
 ;
 ;    void f(int **I, int *A, int N, int p, int q) {
diff --git a/polly/test/Isl/CodeGen/non-affine-switch.ll b/polly/test/Isl/CodeGen/non-affine-switch.ll
index d180f51..60603c7 100644
--- a/polly/test/Isl/CodeGen/non-affine-switch.ll
+++ b/polly/test/Isl/CodeGen/non-affine-switch.ll
@@ -14,7 +14,7 @@
 ;    }
 ;
 ; CHECK: polly.stmt.for.body:
-; CHECK:   %scevgep = getelementptr i32, i32* %A, i64 %polly.indvar
+; CHECK:   %scevgep = getelementptr i32, i32* %A
 ; CHECK:   %tmp1_p_scalar_ = load i32, i32* %scevgep, align 4
 ; CHECK:   switch i32 %tmp1_p_scalar_, label %polly.stmt.sw.epilog.exit [
 ; CHECK:     i32 0, label %polly.stmt.sw.bb
diff --git a/polly/test/Isl/CodeGen/non-affine-update.ll b/polly/test/Isl/CodeGen/non-affine-update.ll
index 54c02f0..f449660 100644
--- a/polly/test/Isl/CodeGen/non-affine-update.ll
+++ b/polly/test/Isl/CodeGen/non-affine-update.ll
@@ -15,15 +15,16 @@
 ; unique within non-affine scop statements.
 
 ; CHECK: polly.stmt.bb2:
-; CHECK:   %scevgep = getelementptr double, double* %A, i64 %polly.indvar
+; CHECK:   %[[R:[0-9]*]] = zext i5 %polly.indvar to i64
+; CHECK:   %scevgep = getelementptr double, double* %A, i64 %[[R]]
 
 ; CHECK: polly.stmt.bb9:
-; CHECK:   %polly.access.C{{.*}} = getelementptr double, double* %C, i64 42
-; CHECK:   %polly.access.C{{.*}} = getelementptr double, double* %C, i64 42
+; CHECK:   %polly.access.C{{.*}} = getelementptr double, double* %C, i7 42
+; CHECK:   %polly.access.C{{.*}} = getelementptr double, double* %C, i7 42
 
 ; CHECK: polly.stmt.bb5:
-; CHECK:   %polly.access.B{{.*}} = getelementptr double, double* %B, i64 113
-; CHECK:   %polly.access.B{{.*}} = getelementptr double, double* %B, i64 113
+; CHECK:   %polly.access.B{{.*}} = getelementptr double, double* %B, i8 113
+; CHECK:   %polly.access.B{{.*}} = getelementptr double, double* %B, i8 113
 
 
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
diff --git a/polly/test/Isl/CodeGen/non_affine_float_compare.ll b/polly/test/Isl/CodeGen/non_affine_float_compare.ll
index 0b7527b..cb766c2 100644
--- a/polly/test/Isl/CodeGen/non_affine_float_compare.ll
+++ b/polly/test/Isl/CodeGen/non_affine_float_compare.ll
@@ -11,15 +11,18 @@
 ;
 ;
 ; CHECK: polly.stmt.bb2:
-; CHECK:   %scevgep[[R0:[0-9]*]] = getelementptr float, float* %A, i64 %polly.indvar
+; CHECK:   %0 = zext i11 %polly.indvar to i64
+; CHECK:   %scevgep[[R0:[0-9]*]] = getelementptr float, float* %A, i64 %0
 ; CHECK:   %tmp3_p_scalar_ = load float, float* %scevgep[[R0]], align 4, !alias.scope !0, !noalias !2
-; CHECK:   %scevgep[[R2:[0-9]*]] = getelementptr float, float* %scevgep{{[0-9]*}}, i64 %polly.indvar
+; CHECK:   %1 = zext i11 %polly.indvar to i64
+; CHECK:   %scevgep[[R2:[0-9]*]] = getelementptr float, float* %scevgep{{[0-9]*}}, i64 %1
 ; CHECK:   %tmp6_p_scalar_ = load float, float* %scevgep[[R2]], align 4, !alias.scope !0, !noalias !2
 ; CHECK:   %p_tmp7 = fcmp oeq float %tmp3_p_scalar_, %tmp6_p_scalar_
 ; CHECK:   br i1 %p_tmp7, label %polly.stmt.bb8, label %polly.stmt.bb12.[[R:[a-zA-Z_.0-9]*]]
 
 ; CHECK: polly.stmt.bb8:
-; CHECK:   %scevgep[[R3:[0-9]*]] = getelementptr float, float* %A, i64 %polly.indvar
+; CHECK:   %2 = zext i11 %polly.indvar to i64
+; CHECK:   %scevgep[[R3:[0-9]*]] = getelementptr float, float* %A, i64 %2
 ; CHECK:   %tmp10_p_scalar_ = load float, float* %scevgep[[R3]], align 4, !alias.scope !0, !noalias !2
 ; CHECK:   %p_tmp11 = fadd float %tmp10_p_scalar_, 1.000000e+00
 ; CHECK:   store float %p_tmp11, float* %scevgep[[R3]], align 4, !alias.scope !0, !noalias !2
@@ -29,12 +32,13 @@
 ; CHECK:   br label %polly.stmt.bb12
 
 ; CHECK: polly.stmt.bb12:
-; CHECK:   %scevgep[[R4:[0-9]*]] = getelementptr float, float* %A, i64 %polly.indvar
+; CHECK:   %3 = zext i11 %polly.indvar to i64
+; CHECK:   %scevgep[[R4:[0-9]*]] = getelementptr float, float* %A, i64 %3
 ; CHECK:   %tmp10b_p_scalar_ = load float, float* %scevgep[[R4]], align 4, !alias.scope !0, !noalias !2
 ; CHECK:   %p_tmp11b = fadd float %tmp10b_p_scalar_, 1.000000e+00
 ; CHECK:   store float %p_tmp11b, float* %scevgep[[R4]], align 4, !alias.scope !0, !noalias !2
-; CHECK:   %polly.indvar_next = add nsw i64 %polly.indvar, 1
-; CHECK:   %polly.loop_cond = icmp sle i64 %polly.indvar, 1022
+; CHECK:   %polly.indvar_next = add nsw i11 %polly.indvar, 1
+; CHECK:   %polly.loop_cond = icmp sle i11 %polly.indvar, 1022
 ; CHECK:   br i1 %polly.loop_cond, label %polly.loop_header, label %polly.loop_exit
 
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
diff --git a/polly/test/Isl/CodeGen/phi_conditional_simple_1.ll b/polly/test/Isl/CodeGen/phi_conditional_simple_1.ll
index 88699d3..099241d 100644
--- a/polly/test/Isl/CodeGen/phi_conditional_simple_1.ll
+++ b/polly/test/Isl/CodeGen/phi_conditional_simple_1.ll
@@ -22,8 +22,7 @@
 ; CHECK-NEXT:     %phi.phiops = alloca i32
 ; CHECK-LABEL:  polly.stmt.if.end:
 ; CHECK-NEXT:     %phi.phiops.reload = load i32, i32* %phi.phiops
-; CHECK-NEXT:     %scevgep
-; CHECK-NEXT:     store i32 %phi.phiops.reload, i32*
+; CHECK:          store i32 %phi.phiops.reload, i32*
 ; CHECK-LABEL:  polly.stmt.if.then:
 ; CHECK-NEXT:     store i32 1, i32* %phi.phiops
 ; CHECK-NEXT:     br label %polly.merge{{[.]?}}
diff --git a/polly/test/Isl/CodeGen/phi_loop_carried_float.ll b/polly/test/Isl/CodeGen/phi_loop_carried_float.ll
index cfcdb58..7938c83 100644
--- a/polly/test/Isl/CodeGen/phi_loop_carried_float.ll
+++ b/polly/test/Isl/CodeGen/phi_loop_carried_float.ll
@@ -17,7 +17,6 @@
 ; CHECK-NEXT:    ret
 
 ; CHECK-LABEL: polly.start:
-; CHECK-NEXT:    sext
 ; CHECK-NEXT:    store float 0.000000e+00, float* %tmp.0.phiops
 
 ; CHECK-LABEL: polly.exiting:
diff --git a/polly/test/Isl/CodeGen/phi_loop_carried_float_escape.ll b/polly/test/Isl/CodeGen/phi_loop_carried_float_escape.ll
index cce1112..2f99bdc 100644
--- a/polly/test/Isl/CodeGen/phi_loop_carried_float_escape.ll
+++ b/polly/test/Isl/CodeGen/phi_loop_carried_float_escape.ll
@@ -16,7 +16,6 @@
 ; CHECK-NEXT:    br label %exit
 
 ; CHECK-LABEL: polly.start:
-; CHECK-NEXT:    sext
 ; CHECK-NEXT:    store float 0.000000e+00, float* %tmp.0.phiops
 
 ; CHECK-LABEL: polly.exiting:
diff --git a/polly/test/Isl/CodeGen/phi_scalar_simple_2.ll b/polly/test/Isl/CodeGen/phi_scalar_simple_2.ll
index f0812fe..bccf0ea 100644
--- a/polly/test/Isl/CodeGen/phi_scalar_simple_2.ll
+++ b/polly/test/Isl/CodeGen/phi_scalar_simple_2.ll
@@ -28,7 +28,6 @@ entry:
 ; CHECK:         ret i32 %x.addr.0.merge
 
 ; CHECK-LABEL: polly.start:
-; CHECK-NEXT:    sext
 ; CHECK-NEXT:    store i32 %x, i32* %x.addr.0.phiops
 
 ; CHECK-LABEL: polly.merge21:
diff --git a/polly/test/Isl/CodeGen/run-time-condition-with-scev-parameters.ll b/polly/test/Isl/CodeGen/run-time-condition-with-scev-parameters.ll
index abbda0e..221576f 100644
--- a/polly/test/Isl/CodeGen/run-time-condition-with-scev-parameters.ll
+++ b/polly/test/Isl/CodeGen/run-time-condition-with-scev-parameters.ll
@@ -8,14 +8,11 @@
 ; CHECK-NEXT: %0 = zext i32 %n to i64
 
 ; CHECK: polly.split_new_and_old:
-; CHECK-NEXT:  %1 = sext i32 %n to i64
-; CHECK-NEXT:  %2 = icmp sge i64 %1, 1
-; CHECK-NEXT:  %3 = sext i32 %n to i64
-; CHECK-NEXT:  %4 = icmp sle i64 %3, -1
-; CHECK-NEXT:  %5 = sext i1 %4 to i64
-; CHECK-NEXT:  %6 = icmp eq i64 0, %5
-; CHECK-NEXT:  %7 = and i1 %2, %6
-; CHECK-NEXT:  br i1 %7, label %polly.start, label %for.body4
+; CHECK-NEXT:  %1 = icmp sge i32 %n, 1
+; CHECK-NEXT:  %2 = icmp sle i32 %n, -1
+; CHECK-NEXT:  %3 = icmp eq i1 false, %2
+; CHECK-NEXT:  %4 = and i1 %1, %3
+; CHECK-NEXT:  br i1 %4, label %polly.start, label %for.body4
 
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 
diff --git a/polly/test/Isl/CodeGen/scalar-store-from-same-bb.ll b/polly/test/Isl/CodeGen/scalar-store-from-same-bb.ll
index a3b45ae..381c9b1 100644
--- a/polly/test/Isl/CodeGen/scalar-store-from-same-bb.ll
+++ b/polly/test/Isl/CodeGen/scalar-store-from-same-bb.ll
@@ -4,8 +4,8 @@
 ; This test ensures that the expression N + 1 that is stored in the phi-node
 ; alloca, is directly computed and not incorrectly transfered through memory.
 
-; CHECK: store i64 %2, i64* %res.phiops
-; CHECK: %2 = add i64 %N, 1
+; CHECK: store i64 %3, i64* %res.phiops
+; CHECK: %3 = add i64 %N, 1
 
 define i64 @foo(float* %A, i64 %N) {
 entry:
diff --git a/polly/test/Isl/CodeGen/scev_expansion_in_nonaffine.ll b/polly/test/Isl/CodeGen/scev_expansion_in_nonaffine.ll
index 217a1d9..1828559 100644
--- a/polly/test/Isl/CodeGen/scev_expansion_in_nonaffine.ll
+++ b/polly/test/Isl/CodeGen/scev_expansion_in_nonaffine.ll
@@ -8,12 +8,14 @@
 ; whole subregion.
 
 ; CHECK-LABEL:  polly.stmt.if.then.110:
-; CHECK:          %[[R1_1:[0-9]*]] = mul i64 %polly.indvar[[R0_1:[0-9]*]], 30
+; CHECK:          %[[R1_0:[0-9]*]] = zext i32 %polly.indvar[[R0_1:[0-9]*]] to i64
+; CHECK:          %[[R1_1:[0-9]*]] = mul i64 %[[R1_0]], 30
 ; CHECK:          %scevgep[[R1_2:[0-9]*]] = getelementptr i32, i32* %scevgep{{[0-9]*}}, i64 %[[R1_1]]
 ; CHECK:          store i32 0, i32* %scevgep[[R1_2]], align 8
 
 ; CHECK-LABEL:  polly.stmt.if.else:
-; CHECK:          %[[R2_1:[0-9]*]] = mul i64 %polly.indvar[[R0_1]], 30
+; CHECK:          %[[R2_0:[0-9]*]] = zext i32 %polly.indvar[[R0_1]] to i64
+; CHECK:          %[[R2_1:[0-9]*]] = mul i64 %[[R2_0]], 30
 ; CHECK:          %scevgep[[R2_2:[0-9]*]] = getelementptr i32, i32* %scevgep{{[0-9]*}}, i64 %[[R2_1]]
 ; CHECK:          store i32 21, i32* %scevgep[[R2_2]], align 8
 
diff --git a/polly/test/Isl/CodeGen/scop_never_executed_runtime_check_location.ll b/polly/test/Isl/CodeGen/scop_never_executed_runtime_check_location.ll
index 07c92e5..47b99b0 100644
--- a/polly/test/Isl/CodeGen/scop_never_executed_runtime_check_location.ll
+++ b/polly/test/Isl/CodeGen/scop_never_executed_runtime_check_location.ll
@@ -7,8 +7,7 @@
 ; CHECK-NEXT:   %0 = zext i32 %n to i64
 ; CHECK-NEXT:   br i1 false
 ;
-; CHECK:       %[[T0:[._a-zA-Z0-9]]] = sext i32 %n to i64
-; CHECK:       %[[T1:[._a-zA-Z0-9]]] = icmp sge i64 %[[T0]], 1
+; CHECK:       %[[T1:[._a-zA-Z0-9]]] = icmp sge i32 %n, 1
 
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 
diff --git a/polly/test/Isl/CodeGen/switch-in-non-affine-region.ll b/polly/test/Isl/CodeGen/switch-in-non-affine-region.ll
index 4887f89..6d8028a 100644
--- a/polly/test/Isl/CodeGen/switch-in-non-affine-region.ll
+++ b/polly/test/Isl/CodeGen/switch-in-non-affine-region.ll
@@ -15,8 +15,7 @@
 ;    }
 ;
 ; CHECK: polly.stmt.if.then:
-; CHECK:   %1 = trunc i64 %polly.indvar to i32
-; CHECK:   %p_rem = srem i32 %1, 4
+; CHECK:   %p_rem = srem i32 %polly.indvar, 4
 ; CHECK:   switch i32 %p_rem, label %polly.stmt.sw.epilog [
 ; CHECK:     i32 0, label %polly.stmt.sw.bb
 ; CHECK:     i32 1, label %polly.stmt.sw.bb.3
diff --git a/polly/test/ScopInfo/invariant_load_access_classes_different_base_type.ll b/polly/test/ScopInfo/invariant_load_access_classes_different_base_type.ll
index 52a4f2f..a75e3a8 100644
--- a/polly/test/ScopInfo/invariant_load_access_classes_different_base_type.ll
+++ b/polly/test/ScopInfo/invariant_load_access_classes_different_base_type.ll
@@ -25,7 +25,7 @@
 ;
 ; CODEGEN:    %.load = load i32, i32* getelementptr inbounds (%struct.anon, %struct.anon* @S, i32 0, i32 0)
 ; CODEGEN:    store i32 %.load, i32* %S.a.preload.s2a
-; CODEGEN:    %.load1 = load float, float* bitcast (i32* getelementptr (i32, i32* getelementptr inbounds (%struct.anon, %struct.anon* @S, i32 0, i32 0), i64 1) to float*)
+; CODEGEN:    %.load1 = load float, float* bitcast (i32* getelementptr (i32, i32* getelementptr inbounds (%struct.anon, %struct.anon* @S, i32 0, i32 0), i2 1) to float*)
 ; CODEGEN:    store float %.load1, float* %S.b.preload.s2a
 ;
 ; CODEGEN:  polly.stmt.for.body:
diff --git a/polly/test/ScopInfo/invariant_load_access_classes_different_base_type_escaping.ll b/polly/test/ScopInfo/invariant_load_access_classes_different_base_type_escaping.ll
index 8f725fe..50146f9 100644
--- a/polly/test/ScopInfo/invariant_load_access_classes_different_base_type_escaping.ll
+++ b/polly/test/ScopInfo/invariant_load_access_classes_different_base_type_escaping.ll
@@ -44,7 +44,7 @@
 ; CODEGEN: polly.preload.begin:
 ; CODEGEN:   %.load = load i32, i32* getelementptr inbounds (%struct.anon, %struct.anon* @S, i32 0, i32 0)
 ; CODEGEN:   store i32 %.load, i32* %S.a.preload.s2a
-; CODEGEN:   %.load1 = load float, float* bitcast (i32* getelementptr (i32, i32* getelementptr inbounds (%struct.anon, %struct.anon* @S, i32 0, i32 0), i64 1) to float*)
+; CODEGEN:   %.load1 = load float, float* bitcast (i32* getelementptr (i32, i32* getelementptr inbounds (%struct.anon, %struct.anon* @S, i32 0, i32 0), i2 1) to float*)
 ; CODEGEN:   store float %.load1, float* %S.b.preload.s2a
 ;
 ; CODEGEN:     polly.merge_new_and_old:
diff --git a/polly/test/ScopInfo/invariant_load_zext_parameter.ll b/polly/test/ScopInfo/invariant_load_zext_parameter.ll
index 3ffb2a4..a554ac3 100644
--- a/polly/test/ScopInfo/invariant_load_zext_parameter.ll
+++ b/polly/test/ScopInfo/invariant_load_zext_parameter.ll
@@ -20,15 +20,14 @@
 ; CHECK-NEXT:      [loadI0] -> { Stmt_if_then[i0] : loadI0 = 0 and 0 <= i0 <= 999 };
 ;
 ; CODEGEN:      polly.preload.begin:
-; CODEGEN-NEXT:   %polly.access.I0 = getelementptr i32, i32* %I0, i64 0
+; CODEGEN-NEXT:   %polly.access.I0 = getelementptr i32, i32* %I0, i1 false
 ; CODEGEN-NEXT:   %polly.access.I0.load = load i32, i32* %polly.access.I0
 ; CODEGEN-NEXT:   store i32 %polly.access.I0.load, i32* %loadI0.preload.s2a
-; CODEGEN-NEXT:   %0 = sext i32 %polly.access.I0.load to i64
-; CODEGEN-NEXT:   %1 = icmp eq i64 %0, 0
+; CODEGEN-NEXT:   %0 = icmp eq i32 %polly.access.I0.load, 0
 ; CODEGEN-NEXT:   br label %polly.preload.cond
 ;
 ; CODEGEN:      polly.preload.cond:
-; CODEGEN-NEXT:   br i1 %1, label %polly.preload.exec, label %polly.preload.merge
+; CODEGEN-NEXT:   br i1 %0, label %polly.preload.exec, label %polly.preload.merge
 ;
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"