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path: root/sysdeps/x86/cpu-features.c
AgeCommit message (Expand)AuthorFilesLines
2024-01-15x86-64: Check if mprotect works before rewriting PLTH.J. Lu1-1/+7
2024-01-10i386: Remove CET support bitsH.J. Lu1-1/+3
2024-01-05elf: Add ELF_DYNAMIC_AFTER_RELOC to rewrite PLTH.J. Lu1-1/+20
2024-01-01Update copyright dates with scripts/update-copyrightsPaul Eggert1-1/+1
2024-01-01x86/cet: Don't set CET active by defaultH.J. Lu1-1/+1
2024-01-01x86/cet: Enable shadow stack during startupH.J. Lu1-51/+0
2024-01-01x86/cet: Sync with Linux kernel 6.6 shadow stack interfaceH.J. Lu1-5/+10
2023-09-29x86: Add support for AVX10 preset and vec size in cpu-featuresNoah Goldstein1-0/+25
2023-07-27<sys/platform/x86.h>: Add APX supportH.J. Lu1-0/+4
2023-06-19Fix misspellings -- BZ 25337Paul Pluzhnikov1-1/+1
2023-06-12x86: Make the divisor in setting `non_temporal_threshold` cpu specificNoah Goldstein1-9/+22
2023-06-12x86: Refactor Intel `init_cpu_features`Noah Goldstein1-81/+309
2023-05-30Fix misspellings in sysdeps/ -- BZ 25337Paul Pluzhnikov1-1/+1
2023-04-05<sys/platform/x86.h>: Add PREFETCHI supportH.J. Lu1-0/+1
2023-04-05<sys/platform/x86.h>: Add AMX-COMPLEX supportH.J. Lu1-0/+2
2023-04-05<sys/platform/x86.h>: Add AVX-NE-CONVERT supportH.J. Lu1-0/+2
2023-04-05<sys/platform/x86.h>: Add AVX-VNNI-INT8 supportH.J. Lu1-0/+2
2023-04-05<sys/platform/x86.h>: Add AVX-IFMA supportH.J. Lu1-0/+2
2023-04-05<sys/platform/x86.h>: Add AMX-FP16 supportH.J. Lu1-0/+2
2023-04-05<sys/platform/x86.h>: Add CMPCCXADD supportH.J. Lu1-0/+1
2023-04-05<sys/platform/x86.h>: Add RAO-INT supportH.J. Lu1-0/+1
2023-04-03x86: Set FSGSBASE to active if enabled by kernelH.J. Lu1-0/+3
2023-03-29Remove --enable-tunables configure optionAdhemerval Zanella Netto1-19/+5
2023-02-22x86-64: Add glibc.cpu.prefer_map_32bit_exec [BZ #28656]H.J. Lu1-0/+15
2023-01-06Update copyright dates with scripts/update-copyrightsJoseph Myers1-1/+1
2022-01-18x86: Black list more Intel CPUs for TSX [BZ #27398]H.J. Lu1-3/+31
2022-01-01Update copyright dates with scripts/update-copyrightsPaul Eggert1-1/+1
2021-12-06x86: Don't set Prefer_No_AVX512 for processors with AVX512 and AVX-VNNIH.J. Lu1-2/+5
2021-11-01x86-64: Remove Prefer_AVX2_STRCMPH.J. Lu1-8/+0
2021-07-28x86-64: Add Avoid_Short_Distance_REP_MOVSBH.J. Lu1-0/+5
2021-07-23x86: Install <bits/platform/x86.h> [BZ #27958]H.J. Lu1-94/+94
2021-07-01x86: Check RTM_ALWAYS_ABORT for RTM [BZ #28033]H.J. Lu1-1/+4
2021-06-23x86: Copy IBT and SHSTK usable only if CET is enabledH.J. Lu1-2/+5
2021-03-29x86: Set Prefer_No_VZEROUPPER and add Prefer_AVX2_STRCMPH.J. Lu1-2/+18
2021-03-29x86: Properly disable XSAVE related features [BZ #27605]H.J. Lu1-0/+55
2021-02-07x86: Add PTWRITE feature detection [BZ #27346]H.J. Lu1-0/+8
2021-02-01sysconf: Add _SC_MINSIGSTKSZ/_SC_SIGSTKSZ [BZ #20305]H.J. Lu1-0/+3
2021-01-29x86: Properly set usable CET feature bits [BZ #26625]H.J. Lu1-2/+9
2021-01-21<sys/platform/x86.h>: Remove the C preprocessor magicH.J. Lu1-34/+34
2021-01-14x86: Move x86 processor cache info to cpu_featuresH.J. Lu1-27/+8
2021-01-07x86: Support GNU_PROPERTY_X86_ISA_1_V[234] marker [BZ #26717]H.J. Lu1-0/+3
2021-01-02Update copyright dates with scripts/update-copyrightsPaul Eggert1-1/+1
2020-12-04x86: Set RDRAND usable if CPU supports RDRANDH.J. Lu1-0/+1
2020-10-16x86: Initialize CPU info via IFUNC relocation [BZ 26203]H.J. Lu1-1/+11
2020-10-09<sys/platform/x86.h>: Add FSRCS/FSRS/FZLRM supportH.J. Lu1-0/+3
2020-10-09<sys/platform/x86.h>: Add AVX-VNNI supportH.J. Lu1-0/+2
2020-10-09<sys/platform/x86.h>: Add AVX512_FP16 supportH.J. Lu1-0/+2
2020-09-17x86: Use HAS_CPU_FEATURE with IBT and SHSTK [BZ #26625]H.J. Lu1-2/+2
2020-09-16<sys/platform/x86.h>: Add Intel Key Locker supportH.J. Lu1-0/+14
2020-09-03x86: Set CPU usable feature bits conservatively [BZ #26552]H.J. Lu1-96/+47
generated by cgit v1.1 at 2024-07-23 10:54:24 +0000