riscv-gnu-toolchain/glibc.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Collapse)	Author	Files	Lines
2013-04-25	Move x86_64-specific audit tests to sysdeps/x86_64/.	Joseph Myers	1	-42/+0

2011-07-20	Fix check for AVX enablement	Ulrich Drepper	1	-4/+18
	The AVX bit is set if the CPU supports AVX. But this doesn't mean the kernel does. Add checks according to Intel's documentation.
2009-08-08	Support mixed SSE/AVX audit and check AVX only once.	H.J. Lu	1	-0/+28
	This patch fixes mixed SSE/AVX audit and checks AVX only once in _dl_runtime_profile. When an AVX or SSE register value in pltenter is modified, we have to make sure that the SSE part value is the same in both lr_xmm and lr_vector fields so that pltexit will get the correct value from either lr_xmm or lr_vector fields. AVX-enabled pltenter should update both lr_xmm and lr_vector fields to support stacked AVX/SSE pltenter functions.