aboutsummaryrefslogtreecommitdiff
path: root/sysdeps/unix/sysv/linux/powerpc/htm.h
diff options
context:
space:
mode:
authorTulio Magno Quites Machado Filho <tuliom@linux.vnet.ibm.com>2015-12-28 12:24:43 -0200
committerTulio Magno Quites Machado Filho <tuliom@linux.vnet.ibm.com>2016-01-08 17:47:33 -0200
commit42bf1c897170ff951c7fd0ee9da25f97ff787396 (patch)
tree3e69cd2d5201944482407b86b4854fe75ab34f12 /sysdeps/unix/sysv/linux/powerpc/htm.h
parentbc49a7afd38c1bd00f0ad9fd6592a5959d5ba72e (diff)
downloadglibc-42bf1c897170ff951c7fd0ee9da25f97ff787396.zip
glibc-42bf1c897170ff951c7fd0ee9da25f97ff787396.tar.gz
glibc-42bf1c897170ff951c7fd0ee9da25f97ff787396.tar.bz2
powerpc: Enforce compiler barriers on hardware transactions
Work around a GCC behavior with hardware transactional memory built-ins. GCC doesn't treat the PowerPC transactional built-ins as compiler barriers, moving instructions past the transaction boundaries and altering their atomicity.
Diffstat (limited to 'sysdeps/unix/sysv/linux/powerpc/htm.h')
-rw-r--r--sysdeps/unix/sysv/linux/powerpc/htm.h39
1 files changed, 35 insertions, 4 deletions
diff --git a/sysdeps/unix/sysv/linux/powerpc/htm.h b/sysdeps/unix/sysv/linux/powerpc/htm.h
index b18b47e..16b2237 100644
--- a/sysdeps/unix/sysv/linux/powerpc/htm.h
+++ b/sysdeps/unix/sysv/linux/powerpc/htm.h
@@ -118,13 +118,44 @@
__ret; \
})
-#define __builtin_tbegin(tdb) _tbegin ()
-#define __builtin_tend(nested) _tend ()
-#define __builtin_tabort(abortcode) _tabort (abortcode)
-#define __builtin_get_texasru() _texasru ()
+#define __libc_tbegin(tdb) _tbegin ()
+#define __libc_tend(nested) _tend ()
+#define __libc_tabort(abortcode) _tabort (abortcode)
+#define __builtin_get_texasru() _texasru ()
#else
# include <htmintrin.h>
+
+# ifdef __TM_FENCE__
+ /* New GCC behavior. */
+# define __libc_tbegin(R) __builtin_tbegin (R);
+# define __libc_tend(R) __builtin_tend (R);
+# define __libc_tabort(R) __builtin_tabort (R);
+# else
+ /* Workaround an old GCC behavior. Earlier releases of GCC 4.9 and 5.0,
+ didn't use to treat __builtin_tbegin, __builtin_tend and
+ __builtin_tabort as compiler barriers, moving instructions into and
+ out the transaction.
+ Remove this when glibc drops support for GCC 5.0. */
+# define __libc_tbegin(R) \
+ ({ __asm__ volatile("" ::: "memory"); \
+ unsigned int __ret = __builtin_tbegin (R); \
+ __asm__ volatile("" ::: "memory"); \
+ __ret; \
+ })
+# define __libc_tabort(R) \
+ ({ __asm__ volatile("" ::: "memory"); \
+ unsigned int __ret = __builtin_tabort (R); \
+ __asm__ volatile("" ::: "memory"); \
+ __ret; \
+ })
+# define __libc_tend(R) \
+ ({ __asm__ volatile("" ::: "memory"); \
+ unsigned int __ret = __builtin_tend (R); \
+ __asm__ volatile("" ::: "memory"); \
+ __ret; \
+ })
+# endif /* __TM_FENCE__ */
#endif /* __HTM__ */
#endif /* __ASSEMBLER__ */