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| author | Richard Earnshaw <rearnsha@arm.com> | 2020-12-21 15:03:03 +0000 |
|---|---|---|
| committer | Richard Earnshaw <rearnsha@arm.com> | 2020-12-21 15:25:25 +0000 |
| commit | bde4949b6b342641681a22cf6092dbc2f9d1d2c7 (patch) | |
| tree | b6cb43ddcf9bf866afc095863da036cae1d6003c /sysdeps/unix/sysv/linux/aarch64/cpu-features.h | |
| parent | 0d1bafdcb62187a1535618c71b840672308ba07d (diff) | |
| download | glibc-bde4949b6b342641681a22cf6092dbc2f9d1d2c7.zip glibc-bde4949b6b342641681a22cf6092dbc2f9d1d2c7.tar.gz glibc-bde4949b6b342641681a22cf6092dbc2f9d1d2c7.tar.bz2 | |
aarch64: Add sysv specific enabling code for memory tagging
Add various defines and stubs for enabling MTE on AArch64 sysv-like
systems such as Linux. The HWCAP feature bit is copied over in the
same way as other feature bits. Similarly we add a new wrapper header
for mman.h to define the PROT_MTE flag that can be used with mmap and
related functions.
We add a new field to struct cpu_features that can be used, for
example, to check whether or not certain ifunc'd routines should be
bound to MTE-safe versions.
Finally, if we detect that MTE should be enabled (ie via the glibc
tunable); we enable MTE during startup as required.
Support in the Linux kernel was added in version 5.10.
Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
Diffstat (limited to 'sysdeps/unix/sysv/linux/aarch64/cpu-features.h')
| -rw-r--r-- | sysdeps/unix/sysv/linux/aarch64/cpu-features.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/sysdeps/unix/sysv/linux/aarch64/cpu-features.h b/sysdeps/unix/sysv/linux/aarch64/cpu-features.h index 00a4d0c..bebf321 100644 --- a/sysdeps/unix/sysv/linux/aarch64/cpu-features.h +++ b/sysdeps/unix/sysv/linux/aarch64/cpu-features.h @@ -70,6 +70,8 @@ struct cpu_features uint64_t midr_el1; unsigned zva_size; bool bti; + /* Currently, the GLIBC memory tagging tunable only defines 8 bits. */ + uint8_t mte_state; }; #endif /* _CPU_FEATURES_AARCH64_H */ |