aboutsummaryrefslogtreecommitdiff
path: root/sim/ppc/vm_n.h
blob: 563cd1ca6a1d4661483648abb532839d6d79c4dc (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
/*  This file is part of the program psim.

    Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>

    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 3 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.
 
    You should have received a copy of the GNU General Public License
    along with this program; if not, see <http://www.gnu.org/licenses/>.
 
    */


#ifndef N
#error "N must be #defined"
#endif

/* NOTE: See end of file for #undef */
#define unsigned_N XCONCAT2(unsigned_,N)
#define T2H_N XCONCAT2(T2H_,N)
#define H2T_N XCONCAT2(H2T_,N)
#define vm_data_map_read_N XCONCAT2(vm_data_map_read_,N)
#define vm_data_map_write_N XCONCAT2(vm_data_map_write_,N)


INLINE_VM\
(unsigned_N)
vm_data_map_read_N(vm_data_map *map,
		   unsigned_word ea,
		   cpu *processor,
		   unsigned_word cia)
{
  if ((ea & (sizeof(unsigned_N)-1)) == 0) {
    unsigned ra = vm_real_data_addr(map, ea, 1/*is-read*/, processor, cia);
    unsigned_N val;
    if (WITH_XOR_ENDIAN)
      ra ^= map->translation.xor[sizeof(unsigned_N) - 1];
    val = XCONCAT2(core_map_read_,N)(map->read, ra, processor, cia);
    if (WITH_MON & MONITOR_LOAD_STORE_UNIT)
      mon_read(ea, ra, sizeof(unsigned_N), processor, cia);
    TRACE(trace_load_store, ("load cia=0x%lx ea=0x%lx N=%ld val=0x%lx\n",
			     (long)cia, (long)ea, (long)sizeof(unsigned_N), (long)val));
    return val;
  }
  else {
    switch (CURRENT_ALIGNMENT) {
    case STRICT_ALIGNMENT:
      alignment_interrupt(processor, cia, ea);
      return 0;
    case NONSTRICT_ALIGNMENT:
      {
	unsigned_N val;
	if (vm_data_map_read_buffer(map, &val, ea, sizeof(unsigned_N), processor, cia)
	    != sizeof(unsigned_N)) {
	  cpu_error(processor, cia, "misaligned %d byte read to 0x%lx failed",
		    sizeof(unsigned_N), (unsigned long)ea);
	}
	val = T2H_N(val);
	if (WITH_MON & MONITOR_LOAD_STORE_UNIT) {
	  /* YUCK */
	  unsigned ra = vm_real_data_addr(map, ea, 1, processor, cia);
	  mon_read(ea, ra, sizeof(unsigned_N), processor, cia);
	}
	TRACE(trace_load_store, ("load cia=0x%lx ea=0x%lx N=%ld data=0x%lx\n",
				 (long)cia, (long)ea, (long)sizeof(unsigned_N), (long)val));
	return val;
      }
    default:
      error("internal error - vm_data_map_read_N - bad switch");
      return 0;
    }
  }
}

INLINE_VM\
(void)
vm_data_map_write_N(vm_data_map *map,
		    unsigned_word ea,
		    unsigned_N val,
		    cpu *processor,
		    unsigned_word cia)
{
  if ((ea & (sizeof(unsigned_N)-1)) == 0) {
    unsigned ra = vm_real_data_addr(map, ea, 0/*is-read?*/, processor, cia);
    if (WITH_XOR_ENDIAN)
      ra ^= map->translation.xor[sizeof(unsigned_N) - 1];
    XCONCAT2(core_map_write_,N)(map->write, ra, val, processor, cia);
    if (WITH_MON & MONITOR_LOAD_STORE_UNIT)
      mon_write(ea, ra, sizeof(unsigned_N), processor, cia);
    TRACE(trace_load_store, ("store cia=0x%lx ea=0x%lx N=%ld val=0x%lx\n",
			     (long)cia, (long)ea, (long)sizeof(unsigned_N), (long)val));
  }
  else {
    switch (CURRENT_ALIGNMENT) {
    case STRICT_ALIGNMENT:
      alignment_interrupt(processor, cia, ea);
      break;
    case NONSTRICT_ALIGNMENT:
      {
	unsigned_N data = H2T_N(val);
	if (vm_data_map_write_buffer(map, &data, ea, sizeof(unsigned_N), 0, processor, cia)
	    != sizeof(unsigned_N)) {
	  cpu_error(processor, cia, "misaligned %d byte write to 0x%lx failed",
		    sizeof(unsigned_N), (unsigned long)ea);
	}
	if (WITH_MON & MONITOR_LOAD_STORE_UNIT) {
	  /* YUCK */
	  unsigned ra = vm_real_data_addr(map, ea, 1, processor, cia);
	  mon_write(ea, ra, sizeof(unsigned_N), processor, cia);
	}
	TRACE(trace_load_store, ("store cia=0x%lx ea=0x%lx N=%ld val=0x%lx\n",
				 (long)cia, (long)ea, (long)sizeof(unsigned_N), (long)val));
      }
      break;
    default:
      error("internal error - vm_data_map_write_N - bad switch");
    }
  }
}

/* NOTE: see start of file for #define */
#undef unsigned_N
#undef T2H_N
#undef H2T_N
#undef vm_data_map_read_N
#undef vm_data_map_write_N