aboutsummaryrefslogtreecommitdiff
path: root/sim/m68hc11/dv-nvram.c
blob: 2a82641b7934ee4e6506d21d91e115f65acfca93 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
/*  dv-nvram.c -- Generic driver for a non volatile ram (battery saved)
    Copyright (C) 1999, 2000, 2007, 2008, 2009 Free Software Foundation, Inc.
    Written by Stephane Carrez (stcarrez@worldnet.fr)
    (From a driver model Contributed by Cygnus Solutions.)
    
    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 3 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program.  If not, see <http://www.gnu.org/licenses/>.
    
    */


#include "sim-main.h"
#include "hw-main.h"
#include "sim-assert.h"

#include <unistd.h>
#include <fcntl.h>
#include <errno.h>


/* DEVICE

        nvram - Non Volatile Ram

   
   DESCRIPTION

        Implements a generic battery saved CMOS ram. This ram device does
        not contain any realtime clock and does not generate any interrupt.
        The ram content is loaded from a file and saved when it is changed.
        It is intended to be generic.

   
   PROPERTIES

   reg <base> <length>

        Base and size of the non-volatile ram bank.

   file <path>

        Path where the memory must be saved or loaded when we start.

   mode {map | save-modified | save-all}

        Controls how to load and save the memory content.

           map            The file is mapped in memory
           save-modified  The simulator keeps an open file descriptor to
                          the file and saves portion of memory which are
                          modified. 
           save-all       The simulator saves the complete memory each time
                          it's modified (it does not keep an open file
                          descriptor).


   PORTS

        None.


   NOTES

        This device is independent of the Motorola 68hc11.

   */



/* static functions */

/* Control of how to access the ram and save its content.  */

enum nvram_mode
{
  /* Save the complete ram block each time it's changed.
     We don't keep an open file descriptor.  This should be
     ok for small memory banks.  */
  NVRAM_SAVE_ALL,

  /* Save only the memory bytes which are modified.
     This mode means that we have to keep an open file
     descriptor (O_RDWR).  It's good for middle sized memory banks.  */
  NVRAM_SAVE_MODIFIED,

  /* Map file in memory (not yet implemented).
     This mode is suitable for large memory banks.  We don't allocate
     a buffer to represent the ram, instead it's mapped in memory
     with mmap.  */
  NVRAM_MAP_FILE
};

struct nvram 
{
  address_word    base_address; /* Base address of ram.  */
  unsigned        size;         /* Size of ram.  */
  unsigned8       *data;        /* Pointer to ram memory.  */
  const char      *file_name;   /* Path of ram file.  */
  int             fd;           /* File description of opened ram file.  */
  enum nvram_mode mode;         /* How load/save ram file.  */
};



/* Finish off the partially created hw device.  Attach our local
   callbacks.  Wire up our port names etc.  */

static hw_io_read_buffer_method  nvram_io_read_buffer;
static hw_io_write_buffer_method nvram_io_write_buffer;



static void
attach_nvram_regs (struct hw *me, struct nvram *controller)
{
  unsigned_word attach_address;
  int attach_space;
  unsigned attach_size;
  reg_property_spec reg;
  int result, oerrno;

  /* Get ram bank description (base and size).  */
  if (hw_find_property (me, "reg") == NULL)
    hw_abort (me, "Missing \"reg\" property");

  if (!hw_find_reg_array_property (me, "reg", 0, &reg))
    hw_abort (me, "\"reg\" property must contain one addr/size entry");

  hw_unit_address_to_attach_address (hw_parent (me),
				     &reg.address,
				     &attach_space,
				     &attach_address,
				     me);
  hw_unit_size_to_attach_size (hw_parent (me),
			       &reg.size,
			       &attach_size, me);

  hw_attach_address (hw_parent (me), 0,
		     attach_space, attach_address, attach_size,
		     me);

  controller->mode         = NVRAM_SAVE_ALL;
  controller->base_address = attach_address;
  controller->size         = attach_size;
  controller->fd           = -1;
  
  /* Get the file where the ram content must be loaded/saved.  */
  if(hw_find_property (me, "file") == NULL)
    hw_abort (me, "Missing \"file\" property");
  
  controller->file_name = hw_find_string_property (me, "file");

  /* Get the mode which defines how to save the memory.  */
  if(hw_find_property (me, "mode") != NULL)
    {
      const char *value = hw_find_string_property (me, "mode");

      if (strcmp (value, "map") == 0)
        controller->mode = NVRAM_MAP_FILE;
      else if (strcmp (value, "save-modified") == 0)
        controller->mode = NVRAM_SAVE_MODIFIED;
      else if (strcmp (value, "save-all") == 0)
        controller->mode = NVRAM_SAVE_ALL;
      else
	hw_abort (me, "illegal value for mode parameter `%s': "
                  "use map, save-modified or save-all", value);
    }

  /* Initialize the ram by loading/mapping the file in memory.
     If the file does not exist, create and give it some content.  */
  switch (controller->mode)
    {
    case NVRAM_MAP_FILE:
      hw_abort (me, "'map' mode is not yet implemented, use 'save-modified'");
      break;

    case NVRAM_SAVE_MODIFIED:
    case NVRAM_SAVE_ALL:
      controller->data = (char*) hw_malloc (me, attach_size);
      if (controller->data == 0)
        hw_abort (me, "Not enough memory, try to use the mode 'map'");

      memset (controller->data, 0, attach_size);
      controller->fd = open (controller->file_name, O_RDWR);
      if (controller->fd < 0)
        {
          controller->fd = open (controller->file_name,
                                 O_RDWR | O_CREAT, 0644);
          if (controller->fd < 0)
            hw_abort (me, "Cannot open or create file '%s'",
                      controller->file_name);
          result = write (controller->fd, controller->data, attach_size);
          if (result != attach_size)
            {
              oerrno = errno;
              hw_free (me, controller->data);
              close (controller->fd);
              errno = oerrno;
              hw_abort (me, "Failed to save the ram content");
            }
        }
      else
        {
          result = read (controller->fd, controller->data, attach_size);
          if (result != attach_size)
            {
              oerrno = errno;
              hw_free (me, controller->data);
              close (controller->fd);
              errno = oerrno;
              hw_abort (me, "Failed to load the ram content");
            }
        }
      if (controller->mode == NVRAM_SAVE_ALL)
        {
          close (controller->fd);
          controller->fd = -1;
        }
      break;

    default:
      break;
    }
}


static void
nvram_finish (struct hw *me)
{
  struct nvram *controller;

  controller = HW_ZALLOC (me, struct nvram);

  set_hw_data (me, controller);
  set_hw_io_read_buffer (me, nvram_io_read_buffer);
  set_hw_io_write_buffer (me, nvram_io_write_buffer);

  /* Attach ourself to our parent bus.  */
  attach_nvram_regs (me, controller);
}



/* generic read/write */

static unsigned
nvram_io_read_buffer (struct hw *me,
                      void *dest,
                      int space,
                      unsigned_word base,
                      unsigned nr_bytes)
{
  struct nvram *controller = hw_data (me);
  
  HW_TRACE ((me, "read 0x%08lx %d [%ld]",
             (long) base, (int) nr_bytes,
             (long) (base - controller->base_address)));

  base -= controller->base_address;
  if (base + nr_bytes > controller->size)
    nr_bytes = controller->size - base;
  
  memcpy (dest, &controller->data[base], nr_bytes);
  return nr_bytes;
}



static unsigned
nvram_io_write_buffer (struct hw *me,
                       const void *source,
                       int space,
                       unsigned_word base,
                       unsigned nr_bytes)
{
  struct nvram *controller = hw_data (me);

  HW_TRACE ((me, "write 0x%08lx %d [%ld]",
             (long) base, (int) nr_bytes,
             (long) (base - controller->base_address)));

  base -= controller->base_address;
  if (base + nr_bytes > controller->size)
    nr_bytes = controller->size - base;
  
  switch (controller->mode)
    {
    case NVRAM_SAVE_ALL:
      {
        int fd, result, oerrno;
        
        fd = open (controller->file_name, O_WRONLY, 0644);
        if (fd < 0)
          {
            return 0;
          }

        memcpy (&controller->data[base], source, nr_bytes);
        result = write (fd, controller->data, controller->size);
        oerrno = errno;
        close (fd);
        errno = oerrno;
  
        if (result != controller->size)
          {
            return 0;
          }
        return nr_bytes;
      }
      
    case NVRAM_SAVE_MODIFIED:
      {
        off_t pos;
        int result;

        pos = lseek (controller->fd, (off_t) base, SEEK_SET);
        if (pos != (off_t) base)
          return 0;

        result = write (controller->fd, source, nr_bytes);
        if (result < 0)
          return 0;

        nr_bytes = result;
        break;
      }

    default:
      break;
    }
  memcpy (&controller->data[base], source, nr_bytes);
  return nr_bytes;
}


const struct hw_descriptor dv_nvram_descriptor[] = {
  { "nvram", nvram_finish, },
  { NULL },
};