blob: 7c6ac4ec7049191a1e70f8cca0892fdb7c0b3d72 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
|
/* Blackfin Core Timer model.
Copyright (C) 2010-2019 Free Software Foundation, Inc.
Contributed by Analog Devices, Inc.
This file is part of simulators.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>. */
#ifndef DV_BFIN_CTIMER_H
#define DV_BFIN_CTIMER_H
/* TCNTL Masks */
#define TMPWR (1 << 0)
#define TMREN (1 << 1)
#define TAUTORLD (1 << 2)
#define TINT (1 << 3)
#endif
|