blob: 0655a06d5f2a2bb787a5cd2812a27f1ee3a02401 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
|
# Makefile template for Configure for the Blackfin simulator.
# Copyright (C) 2005-2022 Free Software Foundation, Inc.
# Written by Analog Devices, Inc.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program. If not, see <http://www.gnu.org/licenses/>.
## COMMON_PRE_CONFIG_FRAG
SIM_OBJS = \
$(SIM_NEW_COMMON_OBJS) \
bfin-sim.o \
devices.o \
gui.o \
interp.o \
machs.o \
sim-resume.o
SIM_EXTRA_HW_DEVICES = \
bfin_cec \
bfin_ctimer \
bfin_dma \
bfin_dmac \
bfin_ebiu_amc \
bfin_ebiu_ddrc \
bfin_ebiu_sdc \
bfin_emac \
bfin_eppi \
bfin_evt \
bfin_gpio \
bfin_gpio2 \
bfin_gptimer \
bfin_jtag \
bfin_mmu \
bfin_nfc \
bfin_otp \
bfin_pfmon \
bfin_pint \
bfin_pll \
bfin_ppi \
bfin_rtc \
bfin_sic \
bfin_spi \
bfin_trace \
bfin_twi \
bfin_uart \
bfin_uart2 \
bfin_wdog \
bfin_wp \
eth_phy
SIM_EXTRA_CFLAGS = $(SDL_CFLAGS)
## COMMON_POST_CONFIG_FRAG
|
