1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
|
.* file format .*
Disassembly of section \.plt:
# Only _dc (direct call from compressed code) functions should have a
# MIPS16 PLT. Note that indirect calls do not influence the choice,
# so f_ic and f_lo_ic have MIPS rather than MIPS16 PLTs.
10100000 <_PROCEDURE_LINKAGE_TABLE_>:
.*: 3c1c1020 lui \$28,0x1020
.*: 8f990000 lw \$25,0\(\$28\)
.*: 279c0000 addiu \$28,\$28,0
.*: 031cc023 subu \$24,\$24,\$28
.*: 03e07825 move \$15,\$31
.*: 0018c082 srl \$24,\$24,0x2
.*: 0320f809 jalr \$25
.*: 2718fffe addiu \$24,\$24,-2
10100020 <f_lo_iu@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90008 lw \$25,8\(\$15\)
.*: 03200008 jr \$25
.*: 25f80008 addiu \$24,\$15,8
10100030 <f_lo_iu_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9000c lw \$25,12\(\$15\)
.*: 03200008 jr \$25
.*: 25f8000c addiu \$24,\$15,12
10100040 <f_lo_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90010 lw \$25,16\(\$15\)
.*: 03200008 jr \$25
.*: 25f80010 addiu \$24,\$15,16
10100050 <f_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90014 lw \$25,20\(\$15\)
.*: 03200008 jr \$25
.*: 25f80014 addiu \$24,\$15,20
10100060 <f_iu_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9001c lw \$25,28\(\$15\)
.*: 03200008 jr \$25
.*: 25f8001c addiu \$24,\$15,28
10100070 <f_lo_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90020 lw \$25,32\(\$15\)
.*: 03200008 jr \$25
.*: 25f80020 addiu \$24,\$15,32
10100080 <f_lo_iu_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90028 lw \$25,40\(\$15\)
.*: 03200008 jr \$25
.*: 25f80028 addiu \$24,\$15,40
10100090 <f_lo_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9002c lw \$25,44\(\$15\)
.*: 03200008 jr \$25
.*: 25f8002c addiu \$24,\$15,44
101000a0 <f_lo_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90030 lw \$25,48\(\$15\)
.*: 03200008 jr \$25
.*: 25f80030 addiu \$24,\$15,48
101000b0 <f_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90034 lw \$25,52\(\$15\)
.*: 03200008 jr \$25
.*: 25f80034 addiu \$24,\$15,52
101000c0 <f_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90038 lw \$25,56\(\$15\)
.*: 03200008 jr \$25
.*: 25f80038 addiu \$24,\$15,56
101000d0 <f_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9003c lw \$25,60\(\$15\)
.*: 03200008 jr \$25
.*: 25f8003c addiu \$24,\$15,60
101000e0 <f_iu_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90040 lw \$25,64\(\$15\)
.*: 03200008 jr \$25
.*: 25f80040 addiu \$24,\$15,64
101000f0 <f_iu_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90048 lw \$25,72\(\$15\)
.*: 03200008 jr \$25
.*: 25f80048 addiu \$24,\$15,72
10100100 <f_lo_iu_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9004c lw \$25,76\(\$15\)
.*: 03200008 jr \$25
.*: 25f8004c addiu \$24,\$15,76
10100110 <f_lo_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90058 lw \$25,88\(\$15\)
.*: 03200008 jr \$25
.*: 25f80058 addiu \$24,\$15,88
10100120 <f_iu_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90060 lw \$25,96\(\$15\)
.*: 03200008 jr \$25
.*: 25f80060 addiu \$24,\$15,96
10100130 <f_lo_iu_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90068 lw \$25,104\(\$15\)
.*: 03200008 jr \$25
.*: 25f80068 addiu \$24,\$15,104
10100140 <f_lo_iu_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9006c lw \$25,108\(\$15\)
.*: 03200008 jr \$25
.*: 25f8006c addiu \$24,\$15,108
10100150 <f_lo@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90074 lw \$25,116\(\$15\)
.*: 03200008 jr \$25
.*: 25f80074 addiu \$24,\$15,116
10100160 <f_lo_iu_du_dc@mips16plt>:
.*: b203 lw \$2,1010016c <f_lo_iu_du_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x1020000c
10100170 <f_lo_du_ic_dc@mips16plt>:
.*: b203 lw \$2,1010017c <f_lo_du_ic_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200010
10100180 <f_du_dc@mips16plt>:
.*: b203 lw \$2,1010018c <f_du_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200014
10100190 <f_lo_iu_dc@mips16plt>:
.*: b203 lw \$2,1010019c <f_lo_iu_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200018
101001a0 <f_iu_dc@mips16plt>:
.*: b203 lw \$2,101001ac <f_iu_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200024
101001b0 <f_lo_du_dc@mips16plt>:
.*: b203 lw \$2,101001bc <f_lo_du_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200030
101001c0 <f_du_ic_dc@mips16plt>:
.*: b203 lw \$2,101001cc <f_du_ic_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200038
101001d0 <f_iu_du_dc@mips16plt>:
.*: b203 lw \$2,101001dc <f_iu_du_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200040
101001e0 <f_lo_dc@mips16plt>:
.*: b203 lw \$2,101001ec <f_lo_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200044
101001f0 <f_dc@mips16plt>:
.*: b203 lw \$2,101001fc <f_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200050
10100200 <f_ic_dc@mips16plt>:
.*: b203 lw \$2,1010020c <f_ic_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200054
10100210 <f_iu_ic_dc@mips16plt>:
.*: b203 lw \$2,1010021c <f_iu_ic_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x1020005c
10100220 <f_iu_du_ic_dc@mips16plt>:
.*: b203 lw \$2,1010022c <f_iu_du_ic_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200060
10100230 <f_lo_iu_ic_dc@mips16plt>:
.*: b203 lw \$2,1010023c <f_lo_iu_ic_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200064
10100240 <f_lo_iu_du_ic_dc@mips16plt>:
.*: b203 lw \$2,1010024c <f_lo_iu_du_ic_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x1020006c
10100250 <f_lo_ic_dc@mips16plt>:
.*: b203 lw \$2,1010025c <f_lo_ic_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200070
Disassembly of section \.text\.a:
10101000 <testc>:
.*: .... .... jal [0-9a-f]+ <f_dc@mips16plt>
.*: 6500 nop
.*: f070 9b50 lw \$2,-32656\(\$3\)
# ^ global GOT entry for f_ic
.*: .... .... jal [0-9a-f]+ <f_ic_dc@mips16plt>
.*: 6500 nop
.*: f010 9b58 lw \$2,-32744\(\$3\)
# ^ local GOT entry for f_ic_dc@mips16plt
.*: .... .... jal [0-9a-f]+ <f_du_dc@mips16plt>
.*: 6500 nop
.*: f010 9b5c lw \$2,-32740\(\$3\)
# ^ local GOT entry for f_du_ic@plt
.*: .... .... jal [0-9a-f]+ <f_du_ic_dc@mips16plt>
.*: 6500 nop
.*: f030 9b40 lw \$2,-32736\(\$3\)
# ^ local GOT entry for f_du_ic_dc@plt
.*: .... .... jal [0-9a-f]+ <f_iu_dc@mips16plt>
.*: 6500 nop
.*: f070 9b4c lw \$2,-32660\(\$3\)
# ^ global GOT entry for f_iu_ic
.*: .... .... jal [0-9a-f]+ <f_iu_ic_dc@mips16plt>
.*: 6500 nop
.*: f030 9b44 lw \$2,-32732\(\$3\)
# ^ local GOT entry for f_iu_ic_dc@mips16plt
.*: .... .... jal [0-9a-f]+ <f_iu_du_dc@mips16plt>
.*: 6500 nop
.*: f030 9b48 lw \$2,-32728\(\$3\)
# ^ local GOT entry for f_iu_du_ic@plt
.*: .... .... jal [0-9a-f]+ <f_iu_du_ic_dc@mips16plt>
.*: 6500 nop
.*: f030 9b4c lw \$2,-32724\(\$3\)
# ^ local GOT entry for f_iu_du_ic_dc@plt
.*: .... .... jal [0-9a-f]+ <f_lo_dc@mips16plt>
.*: 6500 nop
.*: f030 9b50 lw \$2,-32720\(\$3\)
# ^ local GOT entry for f_lo_ic@plt
.*: .... .... jal [0-9a-f]+ <f_lo_ic_dc@mips16plt>
.*: 6500 nop
.*: f030 9b54 lw \$2,-32716\(\$3\)
# ^ local GOT entry for f_lo_ic_dc@mips16plt
.*: .... .... jal [0-9a-f]+ <f_lo_du_dc@mips16plt>
.*: 6500 nop
.*: f030 9b58 lw \$2,-32712\(\$3\)
# ^ local GOT entry for f_lo_du_ic@plt
.*: .... .... jal [0-9a-f]+ <f_lo_du_ic_dc@mips16plt>
.*: 6500 nop
.*: f030 9b5c lw \$2,-32708\(\$3\)
# ^ local GOT entry for f_lo_du_ic_dc@plt
.*: .... .... jal [0-9a-f]+ <f_lo_iu_dc@mips16plt>
.*: 6500 nop
.*: f050 9b40 lw \$2,-32704\(\$3\)
# ^ local GOT entry for f_lo_iu_ic@plt
.*: .... .... jal [0-9a-f]+ <f_lo_iu_ic_dc@mips16plt>
.*: 6500 nop
.*: f050 9b44 lw \$2,-32700\(\$3\)
# ^ local GOT entry for f_lo_iu_ic_dc@mips16plt
.*: .... .... jal [0-9a-f]+ <f_lo_iu_du_dc@mips16plt>
.*: 6500 nop
.*: f050 9b48 lw \$2,-32696\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic@plt
.*: .... .... jal [0-9a-f]+ <f_lo_iu_du_ic_dc@mips16plt>
.*: 6500 nop
.*: f050 9b4c lw \$2,-32692\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic_dc@plt
.*: e820 jr \$31
Disassembly of section \.text\.b:
10102000 <testu>:
.*: ........ jal [0-9a-f]+ <f_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du_dc@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du_ic@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c628074 lw \$2,-32652\(\$3\)
# ^ global GOT entry for f_iu
.*: 8c628050 lw \$2,-32688\(\$3\)
# ^ local GOT entry for f_iu_dc@mips16plt
.*: 8c62806c lw \$2,-32660\(\$3\)
# ^ global GOT entry for f_iu_ic
.*: 8c628024 lw \$2,-32732\(\$3\)
# ^ local GOT entry for f_iu_ic_dc@mips16plt
.*: ........ jal [0-9a-f]+ <f_iu_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du@plt>
.*: 00000000 nop
.*: 8c628054 lw \$2,-32684\(\$3\)
# ^ local GOT entry for f_iu_du@plt
.*: ........ jal [0-9a-f]+ <f_iu_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du_dc@plt>
.*: 00000000 nop
.*: 8c628058 lw \$2,-32680\(\$3\)
# ^ local GOT entry for f_iu_du_dc@plt
.*: ........ jal [0-9a-f]+ <f_iu_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du_ic@plt>
.*: 00000000 nop
.*: 8c628028 lw \$2,-32728\(\$3\)
# ^ local GOT entry for f_iu_du_ic@plt
.*: ........ jal [0-9a-f]+ <f_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c62802c lw \$2,-32724\(\$3\)
# ^ local GOT entry for f_iu_du_ic_dc@plt
.*: ........ jal [0-9a-f]+ <f_lo_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_lo_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du_dc@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_lo_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du_ic@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_lo_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c62805c lw \$2,-32676\(\$3\)
# ^ local GOT entry for f_lo_iu@plt
.*: 8c628060 lw \$2,-32672\(\$3\)
# ^ local GOT entry for f_lo_iu_dc@mips16plt
.*: 8c628040 lw \$2,-32704\(\$3\)
# ^ local GOT entry for f_lo_iu_ic@plt
.*: 8c628044 lw \$2,-32700\(\$3\)
# ^ local GOT entry for f_lo_iu_ic_dc@mips16plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du@plt>
.*: 00000000 nop
.*: 8c628064 lw \$2,-32668\(\$3\)
# ^ local GOT entry for f_lo_iu_du@plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du_dc@plt>
.*: 00000000 nop
.*: 8c628068 lw \$2,-32664\(\$3\)
# ^ local GOT entry for f_lo_iu_du_dc@plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du_ic@plt>
.*: 00000000 nop
.*: 8c628048 lw \$2,-32696\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic@plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c62804c lw \$2,-32692\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic_dc@plt
.*: 03e00008 jr \$31
Disassembly of section \.text\.c:
10103000 <testlo>:
.*: 24020150 li \$2,336
# ^ low 16 bits of f_lo@plt
.*: 240201e1 li \$2,481
# ^ low 16 bits of f_lo_dc@mips16plt
.*: 24020090 li \$2,144
# ^ low 16 bits of f_lo_ic@plt
.*: 24020251 li \$2,593
# ^ low 16 bits of f_lo_ic_dc@mips16plt
.*: 24020110 li \$2,272
# ^ low 16 bits of f_lo_du@plt
.*: 240200a0 li \$2,160
# ^ low 16 bits of f_lo_du_dc@plt
.*: 24020070 li \$2,112
# ^ low 16 bits of f_lo_du_ic@plt
.*: 24020040 li \$2,64
# ^ low 16 bits of f_lo_du_ic_dc@plt
.*: 24020020 li \$2,32
# ^ low 16 bits of f_lo_iu@plt
.*: 24020191 li \$2,401
# ^ low 16 bits of f_lo_iu_dc@mips16plt
.*: 24020080 li \$2,128
# ^ low 16 bits of f_lo_iu_ic@plt
.*: 24020231 li \$2,561
# ^ low 16 bits of f_lo_iu_ic_dc@mips16plt
.*: 24020100 li \$2,256
# ^ low 16 bits of f_lo_iu_du@plt
.*: 24020030 li \$2,48
# ^ low 16 bits of f_lo_iu_du_dc@plt
.*: 24020130 li \$2,304
# ^ low 16 bits of f_lo_iu_du_ic@plt
.*: 24020140 li \$2,320
# ^ low 16 bits of f_lo_iu_du_ic_dc@plt
|