aboutsummaryrefslogtreecommitdiff
path: root/gdb/mn10300-tdep.h
blob: 683a6ec2e145387d2caf81542d177aed8d3f4f96 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
/* Target-dependent interface for Matsushita MN10300 for GDB, the GNU debugger.

   Copyright (C) 1996-2024 Free Software Foundation, Inc.

   This file is part of GDB.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */

#ifndef MN10300_TDEP_H
#define MN10300_TDEP_H

#include "gdbarch.h"

enum {
  E_D0_REGNUM = 0,
  E_D1_REGNUM = 1,
  E_D2_REGNUM = 2,
  E_D3_REGNUM = 3,
  E_A0_REGNUM = 4,
  E_A1_REGNUM = 5,
  E_A2_REGNUM = 6,
  E_A3_REGNUM = 7,
  E_SP_REGNUM = 8,
  E_PC_REGNUM = 9,
  E_MDR_REGNUM = 10,
  E_PSW_REGNUM = 11,
  E_LIR_REGNUM = 12,
  E_LAR_REGNUM = 13,
  E_MDRQ_REGNUM = 14,
  E_E0_REGNUM = 15,
  E_E1_REGNUM = 16,
  E_E2_REGNUM = 17,
  E_E3_REGNUM = 18,
  E_E4_REGNUM = 19,
  E_E5_REGNUM = 20,
  E_E6_REGNUM = 21,
  E_E7_REGNUM = 22,
  E_E8_REGNUM = 23,
  E_E9_REGNUM = 24,
  E_E10_REGNUM = 25,
  E_MCRH_REGNUM = 26,
  E_MCRL_REGNUM = 27,
  E_MCVF_REGNUM = 28,
  E_FPCR_REGNUM = 29,
  E_FS0_REGNUM = 32
};

enum movm_register_bits {
  movm_exother_bit = 0x01,
  movm_exreg1_bit  = 0x02,
  movm_exreg0_bit  = 0x04,
  movm_other_bit   = 0x08,
  movm_a3_bit      = 0x10,
  movm_a2_bit      = 0x20,
  movm_d3_bit      = 0x40,
  movm_d2_bit      = 0x80
};

/* Values for frame_info.status.  */

enum frame_kind {
  MY_FRAME_IN_SP = 0x1,
  MY_FRAME_IN_FP = 0x2,
  NO_MORE_FRAMES = 0x4
};

/* mn10300 private data.  */
struct mn10300_gdbarch_tdep : gdbarch_tdep_base
{
  int am33_mode;
};

static inline int
get_am33_mode (gdbarch *arch)
{
  mn10300_gdbarch_tdep *tdep = gdbarch_tdep<mn10300_gdbarch_tdep> (arch);
  return tdep->am33_mode;
}

#endif /* MN10300_TDEP_H */