1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613
1614
1615
1616
1617
1618
1619
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629
1630
1631
1632
1633
1634
1635
1636
1637
1638
1639
1640
1641
1642
1643
1644
1645
1646
1647
1648
1649
1650
1651
1652
1653
1654
1655
1656
1657
1658
1659
1660
1661
1662
1663
1664
1665
1666
1667
1668
1669
1670
1671
1672
1673
1674
1675
1676
1677
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688
1689
1690
1691
1692
1693
1694
1695
1696
1697
1698
1699
1700
1701
1702
1703
1704
1705
1706
1707
1708
1709
1710
1711
1712
1713
1714
1715
1716
1717
1718
1719
1720
1721
1722
1723
1724
1725
1726
1727
1728
1729
1730
1731
1732
1733
1734
1735
1736
1737
1738
1739
1740
1741
1742
1743
1744
1745
1746
1747
1748
1749
1750
1751
1752
1753
1754
1755
1756
1757
1758
1759
1760
1761
1762
1763
1764
1765
1766
1767
1768
1769
1770
1771
1772
1773
1774
1775
1776
1777
1778
1779
1780
1781
1782
1783
1784
1785
1786
1787
1788
1789
1790
1791
1792
1793
1794
1795
1796
1797
1798
1799
1800
1801
1802
1803
1804
1805
1806
1807
1808
1809
1810
1811
1812
1813
1814
1815
1816
1817
1818
1819
1820
1821
1822
1823
1824
1825
1826
1827
1828
1829
1830
1831
1832
1833
1834
1835
1836
1837
1838
1839
1840
1841
1842
1843
1844
1845
1846
1847
1848
1849
1850
1851
1852
1853
1854
1855
1856
1857
1858
1859
1860
1861
1862
1863
1864
1865
1866
1867
1868
1869
1870
1871
1872
1873
1874
1875
1876
1877
1878
1879
1880
1881
1882
1883
1884
1885
1886
1887
1888
1889
1890
1891
1892
1893
1894
1895
1896
1897
1898
1899
1900
1901
1902
1903
1904
1905
1906
1907
1908
1909
1910
1911
1912
1913
1914
1915
1916
1917
1918
1919
1920
1921
1922
1923
1924
1925
1926
1927
1928
1929
1930
1931
1932
1933
1934
1935
1936
1937
1938
1939
1940
1941
1942
1943
1944
1945
1946
1947
1948
1949
1950
1951
1952
1953
1954
1955
1956
1957
1958
1959
1960
1961
1962
1963
1964
1965
1966
1967
1968
1969
1970
1971
1972
1973
1974
1975
1976
1977
1978
1979
1980
1981
1982
1983
1984
1985
1986
1987
1988
1989
1990
1991
1992
1993
1994
1995
1996
1997
1998
1999
2000
2001
2002
2003
2004
2005
2006
2007
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
2020
2021
2022
2023
2024
2025
2026
2027
2028
2029
2030
2031
2032
2033
2034
2035
2036
2037
2038
2039
2040
2041
2042
2043
2044
2045
2046
2047
2048
2049
2050
2051
2052
2053
2054
2055
2056
2057
2058
2059
2060
2061
2062
2063
2064
2065
2066
2067
2068
2069
2070
2071
2072
2073
2074
2075
2076
2077
2078
2079
2080
2081
2082
2083
2084
2085
2086
2087
2088
2089
2090
2091
2092
2093
2094
2095
2096
2097
2098
2099
2100
2101
2102
2103
2104
2105
2106
2107
2108
2109
2110
2111
2112
2113
2114
2115
2116
2117
2118
2119
2120
2121
2122
2123
2124
2125
2126
2127
2128
2129
2130
2131
2132
2133
2134
2135
2136
2137
2138
2139
2140
2141
2142
2143
2144
2145
2146
2147
2148
2149
2150
2151
2152
2153
2154
2155
2156
2157
2158
2159
2160
2161
2162
2163
2164
2165
2166
2167
2168
2169
2170
2171
2172
2173
2174
2175
2176
2177
2178
2179
2180
2181
2182
2183
2184
2185
2186
2187
2188
2189
2190
2191
2192
2193
2194
2195
2196
2197
2198
2199
2200
2201
2202
2203
2204
2205
2206
2207
2208
2209
2210
2211
2212
2213
2214
2215
2216
2217
2218
2219
2220
2221
2222
2223
2224
2225
2226
2227
2228
2229
2230
2231
2232
2233
2234
2235
2236
2237
2238
2239
2240
2241
2242
2243
2244
2245
2246
2247
2248
2249
2250
2251
2252
2253
2254
2255
2256
2257
2258
2259
2260
2261
2262
2263
2264
2265
2266
2267
2268
2269
2270
2271
2272
2273
2274
2275
2276
2277
2278
2279
2280
2281
2282
2283
2284
2285
2286
2287
2288
2289
2290
2291
2292
2293
2294
2295
2296
2297
2298
2299
2300
2301
2302
2303
2304
2305
2306
2307
2308
2309
2310
2311
2312
2313
2314
2315
2316
2317
2318
2319
2320
2321
2322
2323
2324
2325
2326
2327
2328
2329
2330
2331
2332
2333
2334
2335
2336
2337
2338
2339
2340
2341
2342
2343
2344
2345
2346
2347
2348
2349
2350
2351
2352
2353
2354
2355
2356
2357
2358
2359
2360
2361
2362
2363
2364
2365
2366
2367
2368
2369
2370
2371
2372
2373
2374
2375
2376
2377
2378
2379
2380
2381
2382
2383
2384
2385
2386
2387
2388
2389
2390
2391
2392
2393
2394
2395
2396
2397
2398
2399
2400
2401
2402
2403
2404
2405
2406
2407
2408
2409
2410
2411
2412
2413
2414
2415
2416
2417
2418
2419
2420
2421
2422
2423
2424
2425
2426
2427
2428
2429
2430
2431
2432
2433
2434
2435
2436
2437
2438
2439
2440
2441
2442
2443
2444
2445
2446
2447
2448
2449
2450
2451
2452
2453
2454
2455
2456
2457
2458
2459
2460
2461
2462
2463
2464
2465
2466
2467
2468
2469
2470
2471
2472
2473
2474
2475
2476
2477
2478
2479
2480
2481
2482
2483
2484
2485
2486
2487
2488
2489
2490
2491
2492
2493
2494
2495
2496
2497
2498
2499
2500
2501
2502
2503
2504
2505
2506
2507
2508
2509
2510
2511
2512
2513
2514
2515
2516
2517
2518
2519
2520
2521
2522
2523
2524
2525
2526
2527
2528
2529
2530
2531
2532
2533
2534
2535
2536
2537
2538
2539
2540
2541
2542
2543
2544
2545
2546
2547
2548
2549
2550
2551
2552
2553
2554
2555
2556
2557
2558
2559
2560
2561
2562
2563
2564
2565
2566
2567
2568
2569
2570
2571
2572
2573
2574
2575
2576
2577
2578
2579
2580
2581
2582
2583
2584
2585
2586
2587
2588
2589
2590
2591
2592
2593
2594
2595
2596
2597
2598
2599
2600
2601
2602
2603
2604
2605
2606
2607
2608
2609
2610
2611
2612
2613
2614
2615
2616
2617
2618
2619
2620
2621
2622
2623
2624
2625
2626
2627
2628
2629
2630
2631
2632
2633
2634
2635
2636
2637
2638
2639
2640
2641
2642
2643
2644
2645
2646
2647
2648
2649
2650
2651
2652
2653
2654
2655
2656
2657
2658
2659
2660
2661
2662
2663
2664
2665
2666
2667
2668
2669
2670
2671
2672
2673
2674
2675
2676
2677
2678
2679
2680
2681
2682
2683
2684
2685
2686
2687
2688
2689
2690
2691
2692
2693
2694
2695
2696
2697
2698
2699
2700
2701
2702
2703
2704
2705
2706
2707
2708
2709
2710
2711
2712
2713
2714
2715
2716
2717
2718
2719
2720
2721
2722
2723
2724
2725
2726
2727
2728
2729
2730
2731
2732
2733
2734
2735
2736
2737
2738
2739
2740
2741
2742
2743
2744
2745
2746
2747
2748
2749
2750
2751
2752
2753
2754
2755
2756
2757
2758
2759
2760
2761
2762
2763
2764
2765
2766
2767
2768
2769
2770
2771
2772
2773
2774
2775
2776
2777
2778
2779
2780
2781
2782
2783
2784
2785
2786
2787
2788
2789
2790
2791
2792
2793
2794
2795
2796
2797
2798
2799
2800
2801
2802
2803
2804
2805
2806
2807
2808
2809
2810
2811
2812
2813
2814
2815
2816
2817
2818
2819
2820
2821
2822
2823
2824
2825
2826
2827
2828
2829
2830
2831
2832
2833
2834
2835
2836
2837
2838
2839
2840
2841
2842
2843
2844
2845
2846
2847
2848
2849
2850
2851
2852
2853
2854
2855
2856
2857
2858
2859
2860
2861
2862
2863
2864
2865
2866
2867
2868
2869
2870
2871
2872
2873
2874
2875
2876
2877
2878
2879
2880
2881
2882
2883
2884
2885
2886
2887
2888
2889
2890
2891
2892
2893
2894
2895
2896
2897
2898
2899
2900
2901
2902
2903
2904
2905
2906
2907
2908
2909
2910
2911
2912
2913
2914
2915
2916
2917
2918
2919
2920
2921
2922
2923
2924
2925
2926
2927
2928
2929
2930
2931
2932
2933
2934
2935
2936
2937
2938
2939
2940
2941
2942
2943
2944
2945
2946
2947
2948
2949
2950
2951
2952
2953
2954
2955
2956
2957
2958
2959
2960
2961
2962
2963
2964
2965
2966
2967
2968
2969
2970
2971
2972
2973
2974
2975
2976
2977
2978
2979
2980
2981
2982
2983
2984
2985
2986
2987
2988
2989
2990
2991
2992
2993
2994
2995
2996
2997
2998
2999
3000
3001
3002
3003
3004
3005
3006
3007
3008
3009
3010
3011
3012
3013
3014
3015
3016
3017
3018
3019
3020
3021
3022
3023
3024
3025
3026
3027
3028
3029
3030
3031
3032
3033
3034
3035
3036
3037
3038
3039
3040
3041
3042
3043
3044
3045
3046
3047
3048
3049
3050
3051
3052
3053
3054
3055
3056
3057
3058
3059
3060
3061
3062
3063
3064
3065
3066
3067
3068
3069
3070
3071
3072
3073
3074
3075
3076
3077
3078
3079
3080
3081
3082
3083
3084
3085
3086
3087
3088
3089
3090
3091
3092
3093
3094
3095
3096
3097
3098
3099
3100
3101
3102
3103
3104
3105
3106
3107
3108
3109
3110
3111
3112
3113
3114
3115
3116
3117
3118
3119
3120
3121
3122
3123
3124
3125
3126
3127
3128
3129
3130
3131
3132
3133
3134
3135
3136
3137
3138
3139
3140
3141
3142
3143
3144
3145
3146
3147
3148
3149
3150
3151
3152
3153
3154
3155
3156
3157
3158
3159
3160
3161
3162
3163
3164
3165
3166
3167
3168
3169
3170
3171
3172
3173
3174
3175
3176
3177
3178
3179
3180
3181
3182
3183
3184
3185
3186
3187
3188
3189
3190
3191
3192
3193
3194
3195
3196
3197
3198
3199
3200
3201
3202
3203
3204
3205
3206
3207
3208
3209
3210
3211
3212
3213
3214
3215
3216
3217
3218
3219
3220
3221
3222
3223
3224
3225
3226
3227
3228
3229
3230
3231
3232
3233
3234
3235
3236
3237
3238
3239
3240
3241
3242
3243
3244
3245
3246
3247
3248
3249
3250
3251
3252
3253
3254
3255
3256
3257
3258
3259
3260
3261
3262
3263
3264
3265
3266
3267
3268
3269
3270
3271
3272
3273
3274
3275
3276
3277
3278
3279
3280
3281
3282
3283
3284
3285
3286
3287
3288
3289
3290
3291
3292
3293
3294
3295
3296
3297
3298
3299
3300
3301
3302
3303
3304
3305
3306
3307
3308
3309
3310
3311
3312
3313
3314
3315
3316
3317
3318
3319
3320
3321
3322
3323
3324
3325
3326
3327
3328
3329
3330
3331
3332
3333
3334
3335
3336
3337
3338
3339
3340
3341
3342
3343
3344
3345
3346
3347
3348
3349
3350
3351
3352
3353
3354
3355
3356
3357
3358
3359
3360
3361
3362
3363
3364
3365
3366
3367
3368
3369
3370
3371
3372
3373
3374
3375
3376
3377
3378
3379
3380
3381
3382
3383
3384
3385
3386
3387
3388
3389
3390
3391
3392
3393
3394
3395
3396
3397
3398
3399
3400
3401
3402
3403
3404
3405
3406
3407
3408
3409
3410
3411
3412
3413
3414
3415
3416
3417
3418
3419
3420
3421
3422
3423
3424
3425
3426
3427
3428
3429
3430
3431
3432
3433
3434
3435
3436
3437
3438
3439
3440
3441
3442
3443
3444
3445
3446
3447
3448
3449
3450
3451
3452
3453
3454
3455
3456
3457
3458
3459
3460
3461
3462
3463
3464
3465
3466
3467
3468
3469
3470
3471
3472
3473
3474
3475
3476
3477
3478
3479
3480
3481
3482
3483
3484
3485
3486
3487
3488
3489
3490
3491
3492
3493
3494
3495
3496
3497
3498
3499
3500
3501
3502
3503
3504
3505
3506
3507
3508
3509
3510
3511
3512
3513
3514
3515
3516
3517
3518
3519
3520
3521
3522
3523
3524
3525
3526
3527
3528
3529
3530
3531
3532
3533
3534
3535
3536
3537
3538
3539
3540
3541
3542
3543
3544
3545
3546
3547
3548
3549
3550
3551
3552
3553
3554
3555
3556
3557
3558
3559
3560
3561
3562
3563
3564
3565
3566
3567
3568
3569
3570
3571
3572
3573
3574
3575
3576
3577
3578
3579
3580
3581
3582
3583
3584
3585
3586
3587
3588
3589
3590
3591
3592
3593
3594
3595
3596
3597
3598
3599
3600
3601
3602
3603
3604
3605
3606
3607
3608
3609
3610
3611
3612
3613
3614
3615
3616
3617
3618
3619
3620
3621
3622
3623
3624
3625
3626
3627
3628
3629
3630
3631
3632
3633
3634
3635
3636
3637
3638
3639
3640
3641
3642
3643
3644
3645
3646
3647
3648
3649
3650
3651
3652
3653
3654
3655
3656
3657
3658
3659
3660
3661
3662
3663
3664
3665
3666
3667
3668
3669
3670
3671
3672
3673
3674
3675
3676
3677
3678
3679
3680
3681
3682
3683
3684
3685
3686
3687
3688
3689
3690
3691
3692
3693
3694
3695
3696
3697
3698
3699
3700
3701
3702
3703
3704
3705
3706
3707
3708
3709
3710
3711
3712
3713
3714
3715
3716
3717
3718
3719
3720
3721
3722
3723
3724
3725
3726
3727
3728
3729
3730
3731
3732
3733
3734
3735
3736
3737
3738
3739
3740
3741
3742
3743
3744
3745
3746
3747
3748
3749
3750
3751
3752
3753
3754
3755
3756
3757
3758
3759
3760
3761
3762
3763
3764
3765
3766
3767
3768
3769
3770
3771
3772
3773
3774
3775
3776
3777
3778
3779
3780
3781
3782
3783
3784
3785
3786
3787
3788
3789
3790
3791
3792
3793
3794
3795
3796
3797
3798
3799
3800
3801
3802
3803
3804
3805
3806
3807
3808
3809
3810
3811
3812
3813
3814
3815
3816
3817
3818
3819
3820
3821
3822
3823
3824
3825
3826
3827
3828
3829
3830
3831
3832
3833
3834
3835
3836
3837
3838
3839
3840
3841
3842
3843
3844
3845
3846
3847
3848
3849
3850
3851
3852
3853
3854
3855
3856
3857
3858
3859
3860
3861
3862
3863
3864
3865
3866
3867
3868
3869
3870
3871
3872
3873
3874
3875
3876
3877
3878
3879
3880
3881
3882
3883
3884
3885
3886
3887
3888
3889
3890
3891
3892
3893
3894
3895
3896
3897
3898
3899
3900
3901
3902
3903
3904
3905
3906
3907
3908
3909
3910
3911
3912
3913
3914
3915
3916
3917
3918
3919
3920
3921
3922
3923
3924
3925
3926
3927
3928
3929
3930
3931
3932
3933
3934
3935
3936
3937
3938
3939
3940
3941
3942
3943
3944
3945
3946
3947
3948
3949
3950
3951
3952
3953
3954
3955
3956
3957
3958
3959
3960
3961
3962
3963
3964
3965
3966
3967
3968
3969
3970
3971
3972
3973
3974
3975
3976
3977
3978
3979
3980
3981
3982
3983
3984
3985
3986
3987
3988
3989
3990
3991
3992
3993
3994
3995
3996
3997
3998
3999
4000
4001
4002
4003
4004
4005
4006
4007
4008
4009
4010
4011
4012
4013
4014
4015
4016
4017
4018
4019
4020
4021
4022
4023
4024
4025
4026
4027
4028
4029
4030
4031
4032
4033
4034
4035
4036
4037
4038
4039
4040
4041
4042
4043
4044
4045
4046
4047
4048
4049
4050
4051
4052
4053
4054
4055
4056
4057
4058
4059
4060
4061
4062
4063
4064
4065
4066
4067
4068
4069
4070
4071
4072
4073
4074
4075
4076
4077
4078
4079
4080
4081
4082
4083
4084
4085
4086
4087
4088
4089
4090
4091
4092
4093
4094
4095
4096
4097
4098
4099
4100
4101
4102
4103
4104
4105
4106
4107
4108
4109
4110
4111
4112
4113
4114
4115
4116
4117
4118
4119
4120
4121
4122
4123
4124
4125
4126
4127
4128
4129
4130
4131
4132
4133
4134
4135
4136
4137
4138
4139
4140
4141
4142
4143
4144
4145
4146
4147
4148
4149
4150
4151
4152
4153
4154
4155
4156
4157
4158
4159
4160
4161
4162
4163
4164
4165
4166
4167
4168
4169
4170
4171
4172
4173
4174
4175
4176
4177
4178
4179
4180
4181
4182
4183
4184
4185
4186
4187
4188
4189
4190
4191
4192
4193
4194
4195
4196
4197
4198
4199
4200
4201
4202
4203
4204
4205
4206
4207
4208
4209
4210
4211
4212
4213
4214
4215
4216
4217
4218
4219
4220
4221
4222
4223
4224
4225
4226
4227
4228
4229
4230
4231
4232
4233
4234
4235
4236
4237
4238
4239
4240
4241
4242
4243
4244
4245
4246
4247
4248
4249
4250
4251
4252
4253
4254
4255
4256
4257
4258
4259
4260
4261
4262
4263
4264
4265
4266
4267
4268
4269
4270
4271
4272
4273
4274
4275
4276
4277
4278
4279
4280
4281
4282
4283
4284
4285
4286
4287
4288
4289
4290
4291
4292
4293
4294
4295
4296
4297
4298
4299
4300
4301
4302
4303
4304
4305
4306
4307
4308
4309
4310
4311
4312
4313
4314
4315
4316
4317
4318
4319
4320
4321
4322
4323
4324
4325
4326
4327
4328
4329
4330
4331
4332
4333
4334
4335
4336
4337
4338
4339
4340
4341
4342
4343
4344
4345
4346
4347
4348
4349
4350
4351
4352
4353
4354
4355
4356
4357
4358
4359
4360
4361
4362
4363
4364
4365
4366
4367
4368
4369
4370
4371
4372
4373
4374
4375
4376
4377
4378
4379
4380
4381
4382
4383
4384
4385
4386
4387
4388
4389
4390
4391
4392
4393
4394
4395
4396
4397
4398
4399
4400
4401
4402
4403
4404
4405
4406
4407
4408
4409
4410
4411
4412
4413
4414
4415
4416
4417
4418
4419
4420
4421
4422
4423
4424
4425
4426
4427
4428
4429
4430
4431
4432
4433
4434
4435
4436
4437
4438
4439
4440
4441
4442
4443
4444
4445
4446
4447
4448
4449
4450
4451
4452
4453
4454
4455
4456
4457
4458
4459
4460
4461
4462
4463
4464
4465
4466
4467
4468
4469
4470
4471
4472
4473
4474
4475
4476
4477
4478
4479
4480
4481
4482
4483
4484
4485
4486
4487
4488
4489
4490
4491
4492
4493
4494
4495
4496
4497
4498
4499
4500
4501
4502
4503
4504
4505
4506
4507
4508
4509
4510
4511
4512
4513
4514
4515
4516
4517
4518
4519
4520
4521
4522
4523
4524
4525
4526
4527
4528
4529
4530
4531
4532
4533
4534
4535
4536
4537
4538
4539
4540
4541
4542
4543
4544
4545
4546
4547
4548
4549
4550
4551
4552
4553
4554
4555
4556
4557
4558
4559
4560
4561
4562
4563
4564
4565
4566
4567
4568
4569
4570
4571
4572
4573
4574
4575
4576
4577
4578
4579
4580
4581
4582
4583
4584
4585
4586
4587
4588
4589
4590
4591
4592
4593
4594
4595
4596
4597
4598
4599
4600
4601
4602
4603
4604
4605
4606
4607
4608
4609
4610
4611
4612
4613
4614
4615
4616
4617
4618
4619
4620
4621
4622
4623
4624
4625
4626
4627
4628
4629
4630
4631
4632
4633
4634
4635
4636
4637
4638
4639
4640
4641
4642
4643
4644
4645
4646
4647
4648
4649
4650
4651
4652
4653
4654
4655
4656
4657
4658
4659
4660
4661
4662
4663
4664
4665
4666
4667
4668
4669
4670
4671
4672
4673
4674
4675
4676
4677
4678
4679
4680
4681
4682
4683
4684
4685
4686
4687
4688
4689
4690
4691
4692
4693
4694
4695
4696
4697
4698
4699
4700
4701
4702
4703
4704
4705
4706
4707
4708
4709
4710
4711
4712
4713
4714
4715
4716
4717
4718
4719
4720
4721
4722
4723
4724
4725
4726
4727
4728
4729
4730
4731
4732
4733
4734
4735
4736
4737
4738
4739
4740
4741
4742
4743
4744
4745
4746
4747
4748
4749
4750
4751
4752
4753
4754
4755
4756
4757
4758
4759
4760
4761
4762
4763
4764
4765
4766
4767
4768
4769
4770
4771
4772
4773
4774
4775
4776
4777
4778
4779
4780
4781
4782
4783
4784
4785
4786
4787
4788
4789
4790
4791
4792
4793
4794
4795
4796
4797
4798
4799
4800
4801
4802
4803
4804
4805
4806
4807
4808
4809
4810
4811
4812
4813
4814
4815
4816
4817
4818
4819
4820
4821
4822
4823
4824
4825
4826
4827
4828
4829
4830
4831
4832
4833
4834
4835
4836
4837
4838
4839
4840
4841
4842
4843
4844
4845
4846
4847
4848
4849
4850
4851
4852
4853
4854
4855
4856
4857
4858
4859
4860
4861
4862
4863
4864
4865
4866
4867
4868
4869
4870
4871
4872
4873
4874
4875
4876
4877
4878
4879
4880
4881
4882
4883
4884
4885
4886
4887
4888
4889
4890
4891
4892
4893
4894
4895
4896
4897
4898
4899
4900
4901
4902
4903
4904
4905
4906
4907
4908
4909
4910
4911
4912
4913
4914
4915
4916
4917
4918
4919
4920
4921
4922
4923
4924
4925
4926
4927
4928
4929
4930
4931
4932
4933
4934
4935
4936
4937
4938
4939
4940
4941
4942
4943
4944
4945
4946
4947
4948
4949
4950
4951
4952
4953
4954
4955
4956
4957
4958
4959
4960
4961
4962
4963
4964
4965
4966
4967
4968
4969
4970
4971
4972
4973
4974
4975
4976
4977
4978
4979
4980
4981
4982
4983
4984
4985
4986
4987
4988
4989
4990
4991
4992
4993
4994
4995
4996
4997
4998
4999
5000
5001
5002
5003
5004
5005
5006
5007
5008
5009
5010
5011
5012
5013
5014
5015
5016
5017
5018
5019
5020
5021
5022
5023
5024
5025
5026
5027
5028
5029
5030
5031
5032
5033
5034
5035
5036
5037
5038
5039
5040
5041
5042
5043
5044
5045
5046
5047
5048
5049
5050
5051
5052
5053
5054
5055
5056
5057
5058
5059
5060
5061
5062
5063
5064
5065
5066
5067
5068
5069
5070
5071
5072
5073
5074
5075
5076
5077
5078
5079
5080
5081
5082
5083
5084
5085
5086
5087
5088
5089
5090
5091
5092
5093
5094
5095
5096
5097
5098
5099
5100
5101
5102
5103
5104
5105
5106
5107
5108
5109
5110
5111
5112
5113
5114
5115
5116
5117
5118
5119
5120
5121
5122
5123
5124
5125
5126
5127
5128
5129
5130
5131
5132
5133
5134
5135
5136
5137
5138
5139
5140
5141
5142
5143
5144
5145
5146
5147
5148
5149
5150
5151
5152
5153
5154
5155
5156
5157
5158
5159
5160
5161
5162
5163
5164
5165
5166
5167
5168
5169
5170
5171
5172
5173
5174
5175
5176
5177
5178
5179
5180
5181
5182
5183
5184
5185
5186
5187
5188
5189
5190
5191
5192
5193
5194
5195
5196
5197
5198
5199
5200
5201
5202
5203
5204
5205
5206
5207
5208
5209
5210
5211
5212
5213
5214
5215
5216
5217
5218
5219
5220
5221
5222
5223
5224
5225
5226
5227
5228
5229
5230
5231
5232
5233
5234
5235
5236
5237
5238
5239
5240
5241
5242
5243
5244
5245
5246
5247
5248
5249
5250
5251
5252
5253
5254
5255
5256
5257
5258
5259
5260
5261
5262
5263
5264
5265
5266
5267
5268
5269
5270
5271
5272
5273
5274
5275
5276
5277
5278
5279
5280
5281
5282
5283
5284
5285
5286
5287
5288
5289
5290
5291
5292
5293
5294
5295
5296
5297
5298
5299
5300
5301
5302
5303
5304
5305
5306
5307
5308
5309
5310
5311
5312
5313
5314
5315
5316
5317
5318
5319
5320
5321
5322
5323
5324
5325
5326
5327
5328
5329
5330
5331
5332
5333
5334
5335
5336
5337
5338
5339
5340
5341
5342
5343
5344
5345
5346
5347
5348
5349
5350
5351
5352
5353
5354
5355
5356
5357
5358
5359
5360
5361
5362
5363
5364
5365
5366
5367
5368
5369
5370
5371
5372
5373
5374
5375
5376
5377
5378
5379
5380
5381
5382
5383
5384
5385
5386
5387
5388
5389
5390
5391
5392
5393
5394
5395
5396
5397
5398
5399
5400
5401
5402
5403
5404
5405
5406
5407
5408
5409
5410
5411
5412
5413
5414
5415
5416
5417
5418
5419
5420
5421
5422
5423
5424
5425
5426
5427
5428
5429
5430
5431
5432
5433
5434
5435
5436
5437
5438
5439
5440
5441
5442
5443
5444
5445
5446
5447
5448
5449
5450
5451
5452
5453
5454
5455
5456
5457
5458
5459
5460
5461
5462
5463
5464
5465
5466
5467
5468
5469
5470
5471
5472
5473
5474
5475
5476
5477
5478
5479
5480
5481
5482
5483
5484
5485
5486
5487
5488
5489
5490
5491
5492
5493
5494
5495
5496
5497
5498
5499
5500
5501
5502
5503
5504
5505
5506
5507
5508
5509
5510
5511
5512
5513
5514
5515
5516
5517
5518
5519
5520
5521
5522
5523
5524
5525
5526
5527
5528
5529
5530
5531
5532
5533
5534
5535
5536
5537
5538
5539
5540
5541
5542
5543
5544
5545
5546
5547
5548
5549
5550
5551
5552
5553
5554
5555
5556
5557
5558
5559
5560
5561
5562
5563
5564
5565
5566
5567
5568
5569
5570
5571
5572
5573
5574
5575
5576
5577
5578
5579
5580
5581
5582
5583
5584
5585
5586
5587
5588
5589
5590
5591
5592
5593
5594
5595
5596
5597
5598
5599
5600
5601
5602
5603
5604
5605
5606
5607
5608
5609
5610
5611
5612
5613
5614
5615
5616
5617
5618
5619
5620
5621
5622
5623
5624
5625
5626
5627
5628
5629
5630
5631
5632
5633
5634
5635
5636
5637
5638
5639
5640
5641
5642
5643
5644
5645
5646
5647
5648
5649
5650
5651
5652
5653
5654
5655
5656
5657
5658
5659
5660
5661
5662
5663
5664
5665
5666
5667
5668
5669
5670
5671
5672
5673
5674
5675
5676
5677
5678
5679
5680
5681
5682
5683
5684
5685
5686
5687
5688
5689
5690
5691
5692
5693
5694
5695
5696
5697
5698
5699
5700
5701
5702
5703
5704
5705
5706
5707
5708
5709
5710
5711
5712
5713
5714
5715
5716
5717
5718
5719
5720
5721
5722
5723
5724
5725
5726
5727
5728
5729
5730
5731
5732
5733
5734
5735
5736
5737
5738
5739
5740
5741
5742
5743
5744
5745
5746
5747
5748
5749
5750
5751
5752
5753
5754
5755
5756
5757
5758
5759
5760
5761
5762
5763
5764
5765
5766
5767
5768
5769
5770
5771
5772
5773
5774
5775
5776
5777
5778
5779
5780
5781
5782
5783
5784
5785
5786
5787
5788
5789
5790
5791
5792
5793
5794
5795
5796
5797
5798
5799
5800
5801
5802
5803
5804
5805
5806
5807
5808
5809
5810
5811
5812
5813
5814
5815
5816
5817
5818
5819
5820
5821
5822
5823
5824
5825
5826
5827
5828
5829
5830
5831
5832
5833
5834
5835
5836
5837
5838
5839
5840
5841
5842
5843
5844
5845
5846
5847
5848
5849
5850
5851
5852
5853
5854
5855
5856
5857
5858
5859
5860
5861
5862
5863
5864
5865
5866
5867
5868
5869
5870
5871
5872
5873
5874
5875
5876
5877
5878
5879
5880
5881
5882
5883
5884
5885
5886
5887
5888
5889
5890
5891
5892
5893
5894
5895
5896
5897
5898
5899
5900
5901
5902
5903
5904
5905
5906
5907
5908
5909
5910
5911
5912
5913
5914
5915
5916
5917
5918
5919
5920
5921
5922
5923
5924
5925
5926
5927
5928
5929
5930
5931
5932
5933
5934
5935
5936
5937
5938
5939
5940
5941
5942
5943
5944
5945
5946
5947
5948
5949
5950
5951
5952
5953
5954
5955
5956
5957
5958
5959
5960
5961
5962
5963
5964
5965
5966
5967
5968
5969
5970
5971
5972
5973
5974
5975
5976
5977
5978
5979
5980
5981
5982
5983
5984
5985
5986
5987
5988
5989
5990
5991
5992
5993
5994
5995
5996
5997
5998
5999
6000
6001
6002
6003
6004
6005
6006
6007
6008
6009
6010
6011
6012
6013
6014
6015
6016
6017
6018
6019
6020
6021
6022
6023
6024
6025
6026
6027
6028
6029
6030
6031
6032
6033
6034
6035
6036
6037
6038
6039
6040
6041
6042
6043
6044
6045
6046
6047
6048
6049
6050
6051
6052
6053
6054
6055
6056
6057
6058
6059
6060
6061
6062
6063
6064
6065
6066
6067
6068
6069
6070
6071
6072
6073
6074
6075
6076
6077
6078
6079
6080
6081
6082
6083
6084
6085
6086
6087
6088
6089
6090
6091
6092
6093
6094
6095
6096
6097
6098
6099
6100
6101
6102
6103
6104
6105
6106
6107
6108
6109
6110
6111
6112
6113
6114
6115
6116
6117
6118
6119
6120
6121
6122
6123
6124
6125
6126
6127
6128
6129
6130
6131
6132
6133
6134
6135
6136
6137
6138
6139
6140
6141
6142
6143
6144
6145
6146
6147
6148
6149
6150
6151
6152
6153
6154
6155
6156
6157
6158
6159
6160
6161
6162
6163
6164
6165
6166
6167
6168
6169
6170
6171
6172
6173
6174
6175
6176
6177
6178
6179
6180
6181
6182
6183
6184
6185
6186
6187
6188
6189
6190
6191
6192
6193
6194
6195
6196
6197
6198
6199
6200
6201
6202
6203
6204
6205
6206
6207
6208
6209
6210
6211
6212
6213
6214
6215
6216
6217
6218
6219
6220
6221
6222
6223
6224
6225
6226
6227
6228
6229
6230
6231
6232
6233
6234
6235
6236
6237
6238
6239
6240
6241
6242
6243
6244
6245
6246
6247
6248
6249
6250
6251
6252
6253
6254
6255
6256
6257
6258
6259
6260
6261
6262
6263
6264
6265
6266
6267
6268
6269
6270
6271
6272
6273
6274
6275
6276
6277
6278
6279
6280
6281
6282
6283
6284
6285
6286
6287
6288
6289
6290
6291
6292
6293
6294
6295
6296
6297
6298
6299
6300
6301
6302
6303
6304
6305
6306
6307
6308
6309
6310
6311
6312
6313
6314
6315
6316
6317
6318
6319
6320
6321
6322
6323
6324
6325
6326
6327
6328
6329
6330
6331
6332
6333
6334
6335
6336
6337
6338
6339
6340
6341
6342
6343
6344
6345
6346
6347
6348
6349
6350
6351
6352
6353
6354
6355
6356
6357
6358
6359
6360
6361
6362
6363
6364
6365
6366
6367
6368
6369
6370
6371
6372
6373
6374
6375
6376
6377
6378
6379
6380
6381
6382
6383
6384
6385
6386
6387
6388
6389
6390
6391
6392
6393
6394
6395
6396
6397
6398
6399
6400
6401
6402
6403
6404
6405
6406
6407
6408
6409
6410
6411
6412
6413
6414
6415
6416
6417
6418
6419
6420
6421
6422
6423
6424
6425
6426
6427
6428
6429
6430
6431
6432
6433
6434
6435
6436
6437
6438
6439
6440
6441
6442
6443
6444
6445
6446
6447
6448
6449
6450
6451
6452
6453
6454
6455
6456
6457
6458
6459
6460
6461
6462
6463
6464
6465
6466
6467
6468
6469
6470
6471
6472
6473
6474
6475
6476
6477
6478
6479
6480
6481
6482
6483
6484
6485
6486
6487
6488
6489
6490
6491
6492
6493
6494
6495
6496
6497
6498
6499
6500
6501
6502
6503
6504
6505
6506
6507
6508
6509
6510
6511
6512
6513
6514
6515
6516
6517
6518
6519
6520
6521
6522
6523
6524
6525
6526
6527
6528
6529
6530
6531
6532
6533
6534
6535
6536
6537
6538
6539
6540
6541
6542
6543
6544
6545
6546
6547
6548
6549
6550
6551
6552
6553
6554
6555
6556
6557
6558
6559
6560
6561
6562
6563
6564
6565
6566
6567
6568
6569
6570
6571
6572
6573
6574
6575
6576
6577
6578
6579
6580
6581
6582
6583
6584
6585
6586
6587
6588
6589
6590
6591
6592
6593
6594
6595
6596
6597
6598
6599
6600
6601
6602
6603
6604
6605
6606
6607
6608
6609
6610
6611
6612
6613
6614
6615
6616
6617
6618
6619
6620
6621
6622
6623
6624
6625
6626
6627
6628
6629
6630
6631
6632
6633
6634
6635
6636
6637
6638
6639
6640
6641
6642
6643
6644
6645
6646
6647
6648
6649
6650
6651
6652
6653
6654
6655
6656
6657
6658
6659
6660
6661
6662
6663
6664
6665
6666
6667
6668
6669
6670
6671
6672
6673
6674
6675
6676
6677
6678
6679
6680
6681
6682
6683
6684
6685
6686
6687
6688
6689
6690
6691
6692
6693
6694
6695
6696
6697
6698
6699
6700
6701
6702
6703
6704
6705
6706
6707
6708
6709
6710
6711
6712
6713
6714
6715
6716
6717
6718
6719
6720
6721
6722
6723
6724
6725
6726
6727
6728
6729
6730
6731
6732
6733
6734
6735
6736
6737
6738
6739
6740
6741
6742
6743
6744
6745
6746
6747
6748
6749
6750
6751
6752
6753
6754
6755
6756
6757
6758
6759
6760
6761
6762
6763
6764
6765
6766
6767
6768
6769
6770
6771
6772
6773
6774
6775
6776
6777
6778
6779
6780
6781
6782
6783
6784
6785
6786
6787
6788
6789
6790
6791
6792
6793
6794
6795
6796
6797
6798
6799
6800
6801
6802
6803
6804
6805
6806
6807
6808
6809
6810
6811
6812
6813
6814
6815
6816
6817
6818
6819
6820
6821
6822
6823
6824
6825
6826
6827
6828
6829
6830
6831
6832
6833
6834
6835
6836
6837
6838
6839
6840
6841
6842
6843
6844
6845
6846
6847
6848
6849
6850
6851
6852
6853
6854
6855
6856
6857
6858
6859
6860
6861
6862
6863
6864
6865
6866
6867
6868
6869
6870
6871
6872
6873
6874
6875
6876
6877
6878
6879
6880
6881
6882
6883
6884
6885
6886
6887
6888
6889
6890
6891
6892
6893
6894
6895
6896
6897
6898
6899
6900
6901
6902
6903
6904
6905
6906
6907
6908
6909
6910
6911
6912
6913
6914
6915
6916
6917
6918
6919
6920
6921
6922
6923
6924
6925
6926
6927
6928
6929
6930
6931
6932
6933
6934
6935
6936
6937
6938
6939
6940
6941
6942
6943
6944
6945
6946
6947
6948
6949
6950
6951
6952
6953
6954
6955
6956
6957
6958
6959
6960
6961
6962
6963
6964
6965
6966
6967
6968
6969
6970
6971
6972
6973
6974
6975
6976
6977
6978
6979
6980
6981
6982
6983
6984
6985
6986
6987
6988
6989
6990
6991
6992
6993
6994
6995
6996
6997
6998
6999
7000
7001
7002
7003
7004
7005
7006
7007
7008
7009
7010
7011
7012
7013
7014
7015
7016
7017
7018
7019
7020
7021
7022
7023
7024
7025
7026
7027
7028
7029
7030
7031
7032
7033
7034
7035
7036
7037
7038
7039
7040
7041
7042
7043
7044
7045
7046
7047
7048
7049
7050
7051
7052
7053
7054
7055
7056
7057
7058
7059
7060
7061
7062
7063
7064
7065
7066
7067
7068
7069
7070
7071
7072
7073
7074
7075
7076
7077
7078
7079
7080
7081
7082
7083
7084
7085
7086
7087
7088
7089
7090
7091
7092
7093
7094
7095
7096
7097
7098
7099
7100
7101
7102
7103
7104
7105
7106
7107
7108
7109
7110
7111
7112
7113
7114
7115
7116
7117
7118
7119
7120
7121
7122
7123
7124
7125
7126
7127
7128
7129
7130
7131
7132
7133
7134
7135
7136
7137
7138
7139
7140
7141
7142
7143
7144
7145
7146
7147
7148
7149
7150
7151
7152
7153
7154
7155
7156
7157
7158
7159
7160
7161
7162
7163
7164
7165
7166
7167
7168
7169
7170
7171
7172
7173
7174
7175
7176
7177
7178
7179
7180
7181
7182
7183
7184
7185
7186
7187
7188
7189
7190
7191
7192
7193
7194
7195
7196
7197
7198
7199
7200
7201
7202
7203
7204
7205
7206
7207
7208
7209
7210
7211
7212
7213
7214
7215
7216
7217
7218
7219
7220
7221
7222
7223
7224
7225
7226
7227
7228
7229
7230
7231
7232
7233
7234
7235
7236
7237
7238
7239
7240
7241
7242
7243
7244
7245
7246
7247
7248
7249
7250
7251
7252
7253
7254
7255
7256
7257
7258
7259
7260
7261
7262
7263
7264
7265
7266
7267
7268
7269
7270
7271
7272
7273
7274
7275
7276
7277
7278
7279
7280
7281
7282
7283
7284
7285
7286
7287
7288
7289
7290
7291
7292
7293
7294
7295
7296
7297
7298
7299
7300
7301
7302
7303
7304
7305
7306
7307
7308
7309
7310
7311
7312
7313
7314
7315
7316
7317
7318
7319
7320
7321
7322
7323
7324
7325
7326
7327
7328
7329
7330
7331
7332
7333
7334
7335
7336
7337
7338
7339
7340
7341
7342
7343
7344
7345
7346
7347
7348
7349
7350
7351
7352
7353
7354
7355
7356
7357
7358
7359
7360
7361
7362
7363
7364
7365
7366
7367
7368
7369
7370
7371
7372
7373
7374
7375
7376
7377
7378
7379
7380
7381
7382
7383
7384
7385
7386
7387
7388
7389
7390
7391
7392
7393
7394
7395
7396
7397
7398
7399
7400
7401
7402
7403
7404
7405
7406
7407
7408
7409
7410
7411
7412
7413
7414
7415
7416
7417
7418
7419
7420
7421
7422
7423
7424
7425
7426
7427
7428
7429
7430
7431
7432
7433
7434
7435
7436
7437
7438
7439
7440
7441
7442
7443
7444
7445
7446
7447
7448
7449
7450
7451
7452
7453
7454
7455
7456
7457
7458
7459
7460
7461
7462
7463
7464
7465
7466
7467
7468
7469
7470
7471
7472
7473
7474
7475
7476
7477
7478
7479
7480
7481
7482
7483
7484
7485
7486
7487
7488
7489
7490
7491
7492
7493
7494
7495
7496
7497
7498
7499
7500
7501
7502
7503
7504
7505
7506
7507
7508
7509
7510
7511
7512
7513
7514
7515
7516
7517
7518
7519
7520
7521
7522
7523
7524
7525
7526
7527
7528
7529
7530
7531
7532
7533
7534
7535
7536
7537
7538
7539
7540
7541
7542
7543
7544
7545
7546
7547
7548
7549
7550
7551
7552
7553
7554
7555
7556
7557
7558
7559
7560
7561
7562
7563
7564
7565
7566
7567
7568
7569
7570
7571
7572
7573
7574
7575
7576
7577
7578
7579
7580
7581
7582
7583
7584
7585
7586
7587
7588
7589
7590
7591
7592
7593
7594
7595
7596
7597
7598
7599
7600
7601
7602
7603
7604
7605
7606
7607
7608
7609
7610
7611
7612
7613
7614
7615
7616
7617
7618
7619
7620
7621
7622
7623
7624
7625
7626
7627
7628
7629
7630
7631
7632
7633
7634
7635
7636
7637
7638
7639
7640
7641
7642
7643
7644
7645
7646
7647
7648
7649
7650
7651
7652
7653
7654
7655
7656
7657
7658
7659
7660
7661
7662
7663
7664
7665
7666
7667
7668
7669
7670
7671
7672
7673
7674
7675
7676
7677
7678
7679
7680
7681
7682
7683
7684
7685
7686
7687
7688
7689
7690
7691
7692
7693
7694
7695
7696
7697
7698
7699
7700
7701
7702
7703
7704
7705
7706
7707
7708
7709
7710
7711
7712
7713
7714
7715
7716
7717
7718
7719
7720
7721
7722
7723
7724
7725
7726
7727
7728
7729
7730
7731
7732
7733
7734
7735
7736
7737
7738
7739
7740
7741
7742
7743
7744
7745
7746
7747
7748
7749
7750
7751
7752
7753
7754
7755
7756
7757
7758
7759
7760
7761
7762
7763
7764
7765
7766
7767
7768
7769
7770
7771
7772
7773
7774
7775
7776
7777
7778
7779
7780
7781
7782
7783
7784
7785
7786
7787
7788
7789
7790
7791
7792
7793
7794
7795
7796
7797
7798
7799
7800
7801
7802
7803
7804
7805
7806
7807
7808
7809
7810
7811
7812
7813
7814
7815
7816
7817
7818
7819
7820
7821
7822
7823
7824
7825
7826
7827
7828
7829
7830
7831
7832
7833
7834
7835
7836
7837
7838
7839
7840
7841
7842
7843
7844
7845
7846
7847
7848
7849
7850
7851
7852
7853
7854
7855
7856
7857
7858
7859
7860
7861
7862
7863
7864
7865
7866
7867
7868
7869
7870
7871
7872
7873
7874
7875
7876
7877
7878
7879
7880
7881
7882
7883
7884
7885
7886
7887
7888
7889
7890
7891
7892
7893
7894
7895
7896
7897
7898
7899
7900
7901
7902
7903
7904
7905
7906
7907
7908
7909
7910
7911
7912
7913
7914
7915
7916
7917
7918
7919
7920
7921
7922
7923
7924
7925
7926
7927
7928
7929
7930
7931
7932
7933
7934
7935
7936
7937
7938
7939
7940
7941
7942
7943
7944
7945
7946
7947
7948
7949
7950
7951
7952
7953
7954
7955
7956
7957
7958
7959
7960
7961
7962
7963
7964
7965
7966
7967
7968
7969
7970
7971
7972
7973
7974
7975
7976
7977
7978
7979
7980
7981
7982
7983
7984
7985
7986
7987
7988
7989
7990
7991
7992
7993
7994
7995
7996
7997
7998
7999
8000
8001
8002
8003
8004
8005
8006
8007
8008
8009
8010
8011
8012
8013
8014
8015
8016
8017
8018
8019
8020
8021
8022
8023
8024
8025
8026
8027
8028
8029
8030
8031
8032
8033
8034
8035
8036
8037
8038
8039
8040
8041
8042
8043
8044
8045
8046
8047
8048
8049
8050
8051
8052
8053
8054
8055
8056
8057
8058
8059
8060
8061
8062
8063
8064
8065
8066
8067
8068
8069
8070
8071
8072
8073
8074
8075
8076
8077
8078
8079
8080
8081
8082
8083
8084
8085
8086
8087
8088
8089
8090
8091
8092
8093
8094
8095
8096
8097
8098
8099
8100
8101
8102
8103
8104
8105
8106
8107
8108
8109
8110
8111
8112
8113
8114
8115
8116
8117
8118
8119
8120
8121
8122
8123
8124
8125
8126
8127
8128
8129
8130
8131
8132
8133
8134
8135
8136
8137
8138
8139
8140
8141
8142
8143
8144
8145
8146
8147
8148
8149
8150
8151
8152
8153
8154
8155
8156
8157
8158
8159
8160
8161
8162
8163
8164
8165
8166
8167
8168
8169
8170
8171
8172
8173
8174
8175
8176
8177
8178
8179
8180
8181
8182
8183
8184
8185
8186
8187
8188
8189
8190
8191
8192
8193
8194
8195
8196
8197
8198
8199
8200
8201
8202
8203
8204
8205
8206
8207
8208
8209
8210
8211
8212
8213
8214
8215
8216
8217
8218
8219
8220
8221
8222
8223
8224
8225
8226
8227
8228
8229
8230
8231
8232
8233
8234
8235
8236
8237
8238
8239
8240
8241
8242
8243
8244
8245
8246
8247
8248
8249
8250
8251
8252
8253
8254
8255
8256
8257
8258
8259
8260
8261
8262
8263
8264
8265
8266
8267
8268
8269
8270
8271
8272
8273
8274
8275
8276
8277
8278
8279
8280
8281
8282
8283
8284
8285
8286
8287
8288
8289
8290
8291
8292
8293
8294
8295
8296
8297
8298
8299
8300
8301
8302
8303
8304
8305
8306
8307
8308
8309
8310
8311
8312
8313
8314
8315
8316
8317
8318
8319
8320
8321
8322
8323
8324
8325
8326
8327
8328
8329
8330
8331
8332
8333
8334
8335
8336
8337
8338
8339
8340
8341
8342
8343
8344
8345
8346
8347
8348
8349
8350
8351
8352
8353
8354
8355
8356
8357
8358
8359
8360
8361
8362
8363
8364
8365
8366
8367
8368
8369
8370
8371
8372
8373
8374
8375
8376
8377
8378
8379
8380
8381
8382
8383
8384
8385
8386
8387
8388
8389
8390
8391
8392
8393
8394
8395
8396
8397
8398
8399
8400
8401
8402
8403
8404
8405
8406
8407
8408
8409
8410
8411
8412
8413
8414
8415
8416
8417
8418
8419
8420
8421
8422
8423
8424
8425
8426
8427
8428
8429
8430
8431
8432
8433
8434
8435
8436
8437
8438
8439
8440
8441
8442
8443
8444
8445
8446
8447
8448
8449
8450
8451
8452
8453
8454
8455
8456
8457
8458
8459
8460
8461
8462
8463
8464
8465
8466
8467
8468
8469
8470
8471
8472
8473
8474
8475
8476
8477
8478
8479
8480
8481
8482
8483
8484
8485
8486
8487
8488
8489
8490
8491
8492
8493
8494
8495
8496
8497
8498
8499
8500
8501
8502
8503
8504
8505
8506
8507
8508
8509
8510
8511
8512
8513
8514
8515
8516
8517
8518
8519
8520
8521
8522
8523
8524
8525
8526
8527
8528
8529
8530
8531
8532
8533
8534
8535
8536
8537
8538
8539
8540
8541
8542
8543
8544
8545
8546
8547
8548
8549
8550
8551
8552
8553
8554
8555
8556
8557
8558
8559
8560
8561
8562
8563
8564
8565
8566
8567
8568
8569
8570
8571
8572
8573
8574
8575
8576
8577
8578
8579
8580
8581
8582
8583
8584
8585
8586
8587
8588
8589
8590
8591
8592
8593
8594
8595
8596
8597
8598
8599
8600
8601
8602
8603
8604
8605
8606
8607
8608
8609
8610
8611
8612
8613
8614
8615
8616
8617
8618
8619
8620
8621
8622
8623
8624
8625
8626
8627
8628
8629
8630
8631
8632
8633
8634
8635
8636
8637
8638
8639
8640
8641
8642
8643
8644
8645
8646
8647
8648
8649
8650
8651
8652
8653
8654
8655
8656
8657
8658
8659
8660
8661
8662
8663
8664
8665
8666
8667
8668
8669
8670
8671
8672
8673
8674
8675
8676
8677
8678
8679
8680
8681
8682
8683
8684
8685
8686
8687
8688
8689
8690
8691
8692
8693
8694
8695
8696
8697
8698
8699
8700
8701
8702
8703
8704
8705
8706
8707
8708
8709
8710
8711
8712
8713
8714
8715
8716
8717
8718
8719
8720
8721
8722
8723
8724
8725
8726
8727
8728
8729
8730
8731
8732
8733
8734
8735
8736
8737
8738
8739
8740
8741
8742
8743
8744
8745
8746
8747
8748
8749
8750
8751
8752
8753
8754
8755
8756
8757
8758
8759
8760
8761
8762
8763
8764
8765
8766
8767
8768
8769
8770
8771
8772
8773
8774
8775
8776
8777
8778
8779
8780
8781
8782
8783
8784
8785
8786
8787
8788
8789
8790
8791
8792
8793
8794
8795
8796
8797
8798
8799
8800
8801
8802
8803
8804
8805
8806
8807
8808
8809
8810
8811
8812
8813
8814
8815
8816
8817
8818
8819
8820
8821
8822
8823
8824
8825
8826
8827
8828
8829
8830
8831
8832
8833
8834
8835
8836
8837
8838
8839
8840
8841
8842
8843
8844
8845
8846
8847
8848
8849
8850
8851
8852
8853
8854
8855
8856
8857
8858
8859
8860
8861
8862
8863
8864
8865
8866
8867
8868
8869
8870
8871
8872
8873
8874
8875
8876
8877
8878
8879
8880
8881
8882
8883
8884
8885
8886
8887
8888
8889
8890
8891
8892
8893
8894
8895
8896
8897
8898
8899
8900
8901
8902
8903
8904
8905
8906
8907
8908
8909
8910
8911
8912
8913
8914
8915
8916
8917
8918
8919
8920
8921
8922
8923
8924
8925
8926
8927
8928
8929
8930
8931
8932
8933
8934
8935
8936
8937
8938
8939
8940
8941
8942
8943
8944
8945
8946
8947
8948
8949
8950
8951
8952
8953
8954
8955
8956
8957
8958
8959
8960
8961
8962
8963
8964
8965
8966
8967
8968
8969
8970
8971
8972
8973
8974
8975
8976
8977
8978
8979
8980
8981
8982
8983
8984
8985
8986
8987
8988
8989
8990
8991
8992
8993
8994
8995
8996
8997
8998
8999
9000
9001
9002
9003
9004
9005
9006
9007
9008
9009
9010
9011
9012
9013
9014
9015
9016
9017
9018
9019
9020
9021
9022
9023
9024
9025
9026
9027
9028
9029
9030
9031
9032
9033
9034
9035
9036
9037
9038
9039
9040
9041
9042
9043
9044
9045
9046
9047
9048
9049
9050
9051
9052
9053
9054
9055
9056
9057
9058
9059
9060
9061
9062
9063
9064
9065
9066
9067
9068
9069
9070
9071
9072
9073
9074
9075
9076
9077
9078
9079
9080
9081
9082
9083
9084
9085
9086
9087
9088
9089
9090
9091
9092
9093
9094
9095
9096
9097
9098
9099
9100
9101
9102
9103
9104
9105
9106
9107
9108
9109
9110
9111
9112
9113
9114
9115
9116
9117
9118
9119
9120
9121
9122
9123
9124
9125
9126
9127
9128
9129
9130
9131
9132
9133
9134
9135
9136
9137
9138
9139
9140
9141
9142
9143
9144
9145
9146
9147
9148
9149
9150
9151
9152
9153
9154
9155
9156
9157
9158
9159
9160
9161
9162
9163
9164
9165
9166
9167
9168
9169
9170
9171
9172
9173
9174
9175
9176
9177
9178
9179
9180
9181
9182
9183
9184
9185
9186
9187
9188
9189
9190
9191
9192
9193
9194
9195
9196
9197
9198
9199
9200
9201
9202
9203
9204
9205
9206
9207
9208
9209
9210
9211
9212
9213
9214
9215
9216
9217
9218
9219
9220
9221
9222
9223
9224
9225
9226
9227
9228
9229
9230
9231
9232
9233
9234
9235
9236
9237
9238
9239
9240
9241
9242
9243
9244
9245
9246
9247
9248
9249
9250
9251
9252
9253
9254
9255
9256
9257
9258
9259
9260
9261
9262
9263
9264
9265
9266
9267
9268
9269
9270
9271
9272
9273
9274
9275
9276
9277
9278
9279
9280
9281
9282
9283
9284
9285
9286
9287
9288
9289
9290
9291
9292
9293
9294
9295
9296
9297
9298
9299
9300
9301
9302
9303
9304
9305
9306
9307
9308
9309
9310
9311
9312
9313
9314
9315
9316
9317
9318
9319
9320
9321
9322
9323
9324
9325
9326
9327
9328
9329
9330
9331
9332
9333
9334
9335
9336
9337
9338
9339
9340
9341
9342
9343
9344
9345
9346
9347
9348
9349
9350
9351
9352
9353
9354
9355
9356
9357
9358
9359
9360
9361
9362
9363
9364
9365
9366
9367
9368
9369
9370
9371
9372
9373
9374
9375
9376
9377
9378
9379
9380
9381
9382
9383
9384
9385
9386
9387
9388
9389
9390
9391
9392
9393
9394
9395
9396
9397
9398
9399
9400
9401
9402
9403
9404
9405
9406
9407
9408
9409
9410
9411
9412
9413
9414
9415
9416
9417
9418
9419
9420
9421
9422
9423
9424
9425
9426
9427
9428
9429
9430
9431
9432
9433
9434
9435
9436
9437
9438
9439
9440
9441
9442
9443
9444
9445
9446
9447
9448
9449
9450
9451
9452
9453
9454
9455
9456
9457
9458
9459
9460
9461
9462
9463
9464
9465
9466
9467
9468
9469
9470
9471
9472
9473
9474
9475
9476
9477
9478
9479
9480
9481
9482
9483
9484
9485
9486
9487
9488
9489
9490
9491
9492
9493
9494
9495
9496
9497
9498
9499
9500
9501
9502
9503
9504
9505
9506
9507
9508
9509
9510
9511
9512
9513
9514
9515
9516
9517
9518
9519
9520
9521
9522
9523
9524
9525
9526
9527
9528
9529
9530
9531
9532
9533
9534
9535
9536
9537
9538
9539
9540
9541
9542
9543
9544
9545
9546
9547
9548
9549
9550
9551
9552
9553
9554
9555
9556
9557
9558
9559
9560
9561
9562
9563
9564
9565
9566
9567
9568
9569
9570
9571
9572
9573
9574
9575
9576
9577
9578
9579
9580
9581
9582
9583
9584
9585
9586
9587
9588
9589
9590
9591
9592
9593
9594
9595
9596
9597
9598
9599
9600
9601
9602
9603
9604
9605
9606
9607
9608
9609
9610
9611
9612
9613
9614
9615
9616
9617
9618
9619
9620
9621
9622
9623
9624
9625
9626
9627
9628
9629
9630
9631
9632
9633
9634
9635
9636
9637
9638
9639
9640
9641
9642
9643
9644
9645
9646
9647
9648
9649
9650
9651
9652
9653
9654
9655
9656
9657
9658
9659
9660
9661
9662
9663
9664
9665
9666
9667
9668
9669
9670
9671
9672
9673
9674
9675
9676
9677
9678
9679
9680
9681
9682
9683
9684
9685
9686
9687
9688
9689
9690
9691
9692
9693
9694
9695
9696
9697
9698
9699
9700
9701
9702
9703
9704
9705
9706
9707
9708
9709
9710
9711
9712
9713
9714
9715
9716
9717
9718
9719
9720
9721
9722
9723
9724
9725
9726
9727
9728
9729
9730
9731
9732
9733
9734
9735
9736
9737
9738
9739
9740
9741
9742
9743
9744
9745
9746
9747
9748
9749
9750
9751
9752
9753
9754
9755
9756
9757
9758
9759
9760
9761
9762
9763
9764
9765
9766
9767
9768
9769
9770
9771
9772
9773
9774
9775
9776
9777
9778
9779
9780
9781
9782
9783
9784
9785
9786
9787
9788
9789
9790
9791
9792
9793
9794
9795
9796
9797
9798
9799
9800
9801
9802
9803
9804
9805
9806
9807
9808
9809
9810
9811
9812
9813
9814
9815
9816
9817
9818
9819
9820
9821
9822
9823
9824
9825
9826
9827
9828
9829
9830
9831
9832
9833
9834
9835
9836
9837
9838
9839
9840
9841
9842
9843
9844
9845
9846
9847
9848
9849
9850
9851
9852
9853
9854
9855
9856
9857
9858
9859
9860
9861
9862
9863
9864
9865
9866
9867
9868
9869
9870
9871
9872
9873
9874
9875
9876
9877
9878
9879
9880
9881
9882
9883
9884
9885
9886
9887
9888
9889
9890
9891
9892
9893
9894
9895
9896
9897
9898
9899
9900
9901
9902
9903
9904
9905
9906
9907
9908
9909
9910
9911
9912
9913
9914
9915
9916
9917
9918
9919
9920
9921
9922
9923
9924
9925
9926
9927
9928
9929
9930
9931
9932
9933
9934
9935
9936
9937
9938
9939
9940
9941
9942
9943
9944
9945
9946
9947
9948
9949
9950
9951
9952
9953
9954
9955
9956
9957
9958
9959
9960
9961
9962
9963
9964
9965
9966
9967
9968
9969
9970
9971
9972
9973
9974
9975
9976
9977
9978
9979
9980
9981
9982
9983
9984
9985
9986
9987
9988
9989
9990
9991
9992
9993
9994
9995
9996
9997
9998
9999
10000
10001
10002
10003
10004
10005
10006
10007
10008
10009
10010
10011
10012
10013
10014
10015
10016
10017
10018
10019
10020
10021
10022
10023
10024
10025
10026
10027
10028
10029
10030
10031
10032
10033
10034
10035
10036
10037
10038
10039
10040
10041
10042
10043
10044
10045
10046
10047
10048
10049
10050
10051
10052
10053
10054
10055
10056
10057
10058
10059
10060
10061
10062
10063
10064
10065
10066
10067
10068
10069
10070
10071
10072
10073
10074
10075
10076
10077
10078
10079
10080
10081
10082
10083
10084
10085
10086
10087
10088
10089
10090
10091
10092
10093
10094
10095
10096
10097
10098
10099
10100
10101
10102
10103
10104
10105
10106
10107
10108
10109
10110
10111
10112
10113
10114
10115
10116
10117
10118
10119
10120
10121
10122
10123
10124
10125
10126
10127
10128
10129
10130
10131
10132
10133
10134
10135
10136
10137
10138
10139
10140
10141
10142
10143
10144
10145
10146
10147
10148
10149
10150
10151
10152
10153
10154
10155
10156
10157
10158
10159
10160
10161
10162
10163
10164
10165
10166
10167
10168
10169
10170
10171
10172
10173
10174
10175
10176
10177
10178
10179
10180
10181
10182
10183
10184
10185
10186
10187
10188
10189
10190
10191
10192
10193
10194
10195
10196
10197
10198
10199
10200
10201
10202
10203
10204
10205
10206
10207
10208
10209
10210
10211
10212
10213
10214
10215
10216
10217
10218
10219
10220
10221
10222
10223
10224
10225
10226
10227
10228
10229
10230
10231
10232
10233
10234
10235
10236
10237
10238
10239
10240
10241
10242
10243
10244
10245
10246
10247
10248
10249
10250
10251
10252
10253
10254
10255
10256
10257
10258
10259
10260
10261
10262
10263
10264
10265
10266
10267
10268
10269
10270
10271
10272
10273
10274
10275
10276
10277
10278
10279
10280
10281
10282
10283
10284
10285
10286
10287
10288
10289
10290
10291
10292
10293
10294
10295
10296
10297
10298
10299
10300
10301
10302
10303
10304
10305
10306
10307
10308
10309
10310
10311
10312
10313
10314
10315
10316
10317
10318
10319
10320
10321
10322
10323
10324
10325
10326
10327
10328
10329
10330
10331
10332
10333
10334
10335
10336
10337
10338
10339
10340
10341
10342
10343
10344
10345
10346
10347
10348
10349
10350
10351
10352
10353
10354
10355
10356
10357
10358
10359
10360
10361
10362
10363
10364
10365
10366
10367
10368
10369
10370
10371
10372
10373
10374
10375
10376
10377
10378
10379
10380
10381
10382
10383
10384
10385
10386
10387
10388
10389
10390
10391
10392
10393
10394
10395
10396
10397
10398
10399
10400
10401
10402
10403
10404
10405
10406
10407
10408
10409
10410
10411
10412
10413
10414
10415
10416
10417
10418
10419
10420
10421
10422
10423
10424
10425
10426
10427
10428
10429
10430
10431
10432
10433
10434
10435
10436
10437
10438
10439
10440
10441
10442
10443
10444
10445
10446
10447
10448
10449
10450
10451
10452
10453
10454
10455
10456
10457
10458
10459
10460
10461
10462
10463
10464
10465
10466
10467
10468
10469
10470
10471
10472
10473
10474
10475
10476
10477
10478
10479
10480
10481
10482
10483
10484
10485
10486
10487
10488
10489
10490
10491
10492
10493
10494
10495
10496
10497
10498
10499
10500
10501
10502
10503
10504
10505
10506
10507
10508
10509
10510
10511
10512
10513
10514
10515
10516
10517
10518
10519
10520
10521
10522
10523
10524
10525
10526
10527
10528
10529
10530
10531
10532
10533
10534
10535
10536
10537
10538
10539
10540
10541
10542
10543
10544
10545
10546
10547
10548
10549
10550
10551
10552
10553
10554
10555
10556
10557
10558
10559
10560
10561
10562
10563
10564
10565
10566
10567
10568
10569
10570
10571
10572
10573
10574
10575
10576
10577
10578
10579
10580
10581
10582
10583
10584
10585
10586
10587
10588
10589
10590
10591
10592
10593
10594
10595
10596
10597
10598
10599
10600
10601
10602
10603
10604
10605
10606
10607
10608
10609
10610
10611
10612
10613
10614
10615
10616
10617
10618
10619
10620
10621
10622
10623
10624
10625
10626
10627
10628
10629
10630
10631
10632
10633
10634
10635
10636
10637
10638
10639
10640
10641
10642
10643
10644
10645
10646
10647
10648
10649
10650
10651
10652
10653
10654
10655
10656
10657
10658
10659
10660
10661
10662
10663
10664
10665
10666
10667
10668
10669
10670
10671
10672
10673
10674
10675
10676
10677
10678
10679
10680
10681
10682
10683
10684
10685
10686
10687
10688
10689
10690
10691
10692
10693
10694
10695
10696
10697
10698
10699
10700
10701
10702
10703
10704
10705
10706
10707
10708
10709
10710
10711
10712
10713
10714
10715
10716
10717
10718
10719
10720
10721
10722
10723
10724
10725
10726
10727
10728
10729
10730
10731
10732
10733
10734
10735
10736
10737
10738
10739
10740
10741
10742
10743
10744
10745
10746
10747
10748
10749
10750
10751
10752
10753
10754
10755
10756
10757
10758
10759
10760
10761
10762
10763
10764
10765
10766
10767
10768
10769
10770
10771
10772
10773
10774
10775
10776
10777
10778
10779
10780
10781
10782
10783
10784
10785
10786
10787
10788
10789
10790
10791
10792
10793
10794
10795
10796
10797
10798
10799
10800
10801
10802
10803
10804
10805
10806
10807
10808
10809
10810
10811
10812
10813
10814
10815
10816
10817
10818
10819
10820
10821
10822
10823
10824
10825
10826
10827
10828
10829
10830
10831
10832
10833
10834
10835
10836
10837
10838
10839
10840
10841
10842
10843
10844
10845
10846
10847
10848
10849
10850
10851
10852
10853
10854
10855
10856
10857
10858
10859
10860
10861
10862
10863
10864
10865
10866
10867
10868
10869
10870
10871
10872
10873
10874
10875
10876
10877
10878
10879
10880
10881
10882
10883
10884
10885
10886
10887
10888
10889
10890
10891
10892
10893
10894
10895
10896
10897
10898
10899
10900
10901
10902
10903
10904
10905
10906
10907
10908
10909
10910
10911
10912
10913
10914
10915
10916
10917
10918
10919
10920
10921
10922
10923
10924
10925
10926
10927
10928
10929
10930
10931
10932
10933
10934
10935
10936
10937
10938
10939
10940
10941
10942
10943
10944
10945
10946
10947
10948
10949
10950
10951
10952
10953
10954
10955
10956
10957
10958
10959
10960
10961
10962
10963
10964
10965
10966
10967
10968
10969
10970
10971
10972
10973
10974
10975
10976
10977
10978
10979
10980
10981
10982
10983
10984
10985
10986
10987
10988
10989
10990
10991
10992
10993
10994
10995
10996
10997
10998
10999
11000
11001
11002
11003
11004
11005
11006
11007
11008
11009
11010
11011
11012
11013
11014
11015
11016
11017
11018
11019
11020
11021
11022
11023
11024
11025
11026
11027
11028
11029
11030
11031
11032
11033
11034
11035
11036
11037
11038
11039
11040
11041
11042
11043
11044
11045
11046
11047
11048
11049
11050
11051
11052
11053
11054
11055
11056
11057
11058
11059
11060
11061
11062
11063
11064
11065
11066
11067
11068
11069
11070
11071
11072
11073
11074
11075
11076
11077
11078
11079
11080
11081
11082
11083
11084
11085
11086
11087
11088
11089
11090
11091
11092
11093
11094
11095
11096
11097
11098
11099
11100
11101
11102
11103
11104
11105
11106
11107
11108
11109
11110
11111
11112
11113
11114
11115
11116
11117
11118
11119
11120
11121
11122
11123
11124
11125
11126
11127
11128
11129
11130
11131
11132
11133
11134
11135
11136
11137
11138
11139
11140
11141
11142
11143
11144
11145
11146
11147
11148
11149
11150
11151
11152
11153
11154
11155
11156
11157
11158
11159
11160
11161
11162
11163
11164
11165
11166
11167
11168
11169
11170
11171
11172
11173
11174
11175
11176
11177
11178
11179
11180
11181
11182
11183
11184
11185
11186
11187
11188
11189
11190
11191
11192
11193
11194
11195
11196
11197
11198
11199
11200
11201
11202
11203
11204
11205
11206
11207
11208
11209
11210
11211
11212
11213
11214
11215
11216
11217
11218
11219
11220
11221
11222
11223
11224
11225
11226
11227
11228
11229
11230
11231
11232
11233
11234
11235
11236
11237
11238
11239
11240
11241
11242
11243
11244
11245
11246
11247
11248
11249
11250
11251
11252
11253
11254
11255
11256
11257
11258
11259
11260
11261
11262
11263
11264
11265
11266
11267
11268
11269
11270
11271
11272
11273
11274
11275
11276
11277
11278
11279
11280
11281
11282
11283
11284
11285
11286
11287
11288
11289
11290
11291
11292
11293
11294
11295
11296
11297
11298
11299
11300
11301
11302
11303
11304
11305
11306
11307
11308
11309
11310
11311
11312
11313
11314
11315
11316
11317
11318
11319
11320
11321
11322
11323
11324
11325
11326
11327
11328
11329
11330
11331
11332
11333
11334
11335
11336
11337
11338
11339
11340
11341
11342
11343
11344
11345
11346
11347
11348
11349
11350
11351
11352
11353
11354
11355
11356
11357
11358
11359
11360
11361
11362
11363
11364
11365
11366
11367
11368
11369
11370
11371
11372
11373
11374
11375
11376
11377
11378
11379
11380
11381
11382
11383
11384
11385
11386
11387
11388
11389
11390
11391
11392
11393
11394
11395
11396
11397
11398
11399
11400
11401
11402
11403
11404
11405
11406
11407
11408
11409
11410
11411
11412
11413
11414
11415
11416
11417
11418
11419
11420
11421
11422
11423
11424
11425
11426
11427
11428
11429
11430
11431
11432
11433
11434
11435
11436
11437
11438
11439
11440
11441
11442
11443
11444
11445
11446
11447
11448
11449
11450
11451
11452
11453
11454
11455
11456
11457
11458
11459
11460
11461
11462
11463
11464
11465
11466
11467
11468
11469
11470
11471
11472
11473
11474
11475
11476
11477
11478
11479
11480
11481
11482
11483
11484
11485
11486
11487
11488
11489
11490
11491
11492
11493
11494
11495
11496
11497
11498
11499
11500
11501
11502
11503
11504
11505
11506
11507
11508
11509
11510
11511
11512
11513
11514
11515
11516
11517
11518
11519
11520
11521
11522
11523
11524
11525
11526
11527
11528
11529
11530
11531
11532
11533
11534
11535
11536
11537
11538
11539
11540
11541
11542
11543
11544
11545
11546
11547
11548
11549
11550
11551
11552
11553
11554
11555
11556
11557
11558
11559
11560
11561
11562
11563
11564
11565
11566
11567
11568
11569
11570
11571
11572
11573
11574
11575
11576
11577
11578
11579
11580
11581
11582
11583
11584
11585
11586
11587
11588
11589
11590
11591
11592
11593
11594
11595
11596
11597
11598
11599
11600
11601
11602
11603
11604
11605
11606
11607
11608
11609
11610
11611
11612
11613
11614
11615
11616
11617
11618
11619
11620
11621
11622
11623
11624
11625
11626
11627
11628
11629
11630
11631
11632
11633
11634
11635
11636
11637
11638
11639
11640
11641
11642
11643
11644
11645
11646
11647
11648
11649
11650
11651
11652
11653
11654
11655
11656
11657
11658
11659
11660
11661
11662
11663
11664
11665
11666
11667
11668
11669
11670
11671
11672
11673
11674
11675
11676
11677
11678
11679
11680
11681
11682
11683
11684
11685
11686
11687
11688
11689
11690
11691
11692
11693
11694
11695
11696
11697
11698
11699
11700
11701
11702
11703
11704
11705
11706
11707
11708
11709
11710
11711
11712
11713
11714
11715
11716
11717
11718
11719
11720
11721
11722
11723
11724
11725
11726
11727
11728
11729
11730
11731
11732
11733
11734
11735
11736
11737
11738
11739
11740
11741
11742
11743
11744
11745
11746
11747
11748
11749
11750
11751
11752
11753
11754
11755
11756
11757
11758
11759
11760
11761
11762
11763
11764
11765
11766
11767
11768
11769
11770
11771
11772
11773
11774
11775
11776
11777
11778
11779
11780
11781
11782
11783
11784
11785
11786
11787
11788
11789
11790
11791
11792
11793
11794
11795
11796
11797
11798
11799
11800
11801
11802
11803
11804
11805
11806
11807
11808
11809
11810
11811
11812
11813
11814
11815
11816
11817
11818
11819
11820
11821
11822
11823
11824
11825
11826
11827
11828
11829
11830
11831
11832
11833
11834
11835
11836
11837
11838
11839
11840
11841
11842
11843
11844
11845
11846
11847
11848
11849
11850
11851
11852
11853
11854
11855
11856
11857
11858
11859
11860
11861
11862
11863
11864
11865
11866
11867
11868
11869
11870
11871
11872
11873
11874
11875
11876
11877
11878
11879
11880
11881
11882
11883
11884
11885
11886
11887
11888
11889
11890
11891
11892
11893
11894
11895
11896
11897
11898
11899
11900
11901
11902
11903
11904
11905
11906
11907
11908
11909
11910
11911
11912
11913
11914
11915
11916
11917
11918
11919
11920
11921
11922
11923
11924
11925
11926
11927
11928
11929
11930
11931
11932
11933
11934
11935
11936
11937
11938
11939
11940
11941
11942
11943
11944
11945
11946
11947
11948
11949
11950
11951
11952
11953
11954
11955
11956
11957
11958
11959
11960
11961
11962
11963
11964
11965
11966
11967
11968
11969
11970
11971
11972
11973
11974
11975
11976
11977
11978
11979
11980
11981
11982
11983
11984
11985
11986
11987
11988
11989
11990
11991
11992
11993
11994
11995
11996
11997
11998
11999
12000
12001
12002
12003
12004
12005
12006
12007
12008
12009
12010
12011
12012
12013
12014
12015
12016
12017
12018
12019
12020
12021
12022
12023
12024
12025
12026
12027
12028
12029
12030
12031
12032
12033
12034
12035
12036
12037
12038
12039
12040
12041
12042
12043
12044
12045
12046
12047
12048
12049
12050
12051
12052
12053
12054
12055
12056
12057
12058
12059
12060
12061
12062
12063
12064
12065
12066
12067
12068
12069
12070
12071
12072
12073
12074
12075
12076
12077
12078
12079
12080
12081
12082
12083
12084
12085
12086
12087
12088
12089
12090
12091
12092
12093
12094
12095
12096
12097
12098
12099
12100
12101
12102
12103
12104
12105
12106
12107
12108
12109
12110
12111
12112
12113
12114
12115
12116
12117
12118
12119
12120
12121
12122
12123
12124
12125
12126
12127
12128
12129
12130
12131
12132
12133
12134
12135
12136
12137
12138
12139
12140
12141
12142
12143
12144
12145
12146
12147
12148
12149
12150
12151
12152
12153
12154
12155
12156
12157
12158
12159
12160
12161
12162
12163
12164
12165
12166
12167
12168
12169
12170
12171
12172
12173
12174
12175
12176
12177
12178
12179
12180
12181
12182
12183
12184
12185
12186
12187
12188
12189
12190
12191
12192
12193
12194
12195
12196
12197
12198
12199
12200
12201
12202
12203
12204
12205
12206
12207
12208
12209
12210
12211
12212
12213
12214
12215
12216
12217
12218
12219
12220
12221
12222
12223
12224
12225
12226
12227
12228
12229
12230
12231
12232
12233
12234
12235
12236
12237
12238
12239
12240
12241
12242
12243
12244
12245
12246
12247
12248
12249
12250
12251
12252
12253
12254
12255
12256
12257
12258
12259
12260
12261
12262
12263
12264
12265
12266
12267
12268
12269
12270
12271
12272
12273
12274
12275
12276
12277
12278
12279
12280
12281
12282
12283
12284
12285
12286
12287
12288
12289
12290
12291
12292
12293
12294
12295
12296
12297
12298
12299
12300
12301
12302
12303
12304
12305
12306
12307
12308
12309
12310
12311
12312
12313
12314
12315
12316
12317
12318
12319
12320
12321
12322
12323
12324
12325
12326
12327
12328
12329
12330
12331
12332
12333
12334
12335
12336
12337
12338
12339
12340
12341
12342
12343
12344
12345
12346
12347
12348
12349
12350
12351
12352
12353
12354
12355
12356
12357
12358
12359
12360
12361
12362
12363
12364
12365
12366
12367
12368
12369
12370
12371
12372
12373
12374
12375
12376
12377
12378
12379
12380
12381
12382
12383
12384
12385
12386
12387
12388
12389
12390
12391
12392
12393
12394
12395
12396
12397
12398
12399
12400
12401
12402
12403
12404
12405
12406
12407
12408
12409
12410
12411
12412
12413
12414
12415
12416
12417
12418
12419
12420
12421
12422
12423
12424
12425
12426
12427
12428
12429
12430
12431
12432
12433
12434
12435
12436
12437
12438
12439
12440
12441
12442
12443
12444
12445
12446
12447
12448
12449
12450
12451
12452
12453
12454
12455
12456
12457
12458
12459
12460
12461
12462
12463
12464
12465
12466
12467
12468
12469
12470
12471
12472
12473
12474
12475
12476
12477
12478
12479
12480
12481
12482
12483
12484
12485
12486
12487
12488
12489
12490
12491
12492
12493
12494
12495
12496
12497
12498
12499
12500
12501
12502
12503
12504
12505
12506
12507
12508
12509
12510
12511
12512
12513
12514
12515
12516
12517
12518
12519
12520
12521
12522
12523
12524
12525
12526
12527
12528
12529
12530
12531
12532
12533
12534
12535
12536
12537
12538
12539
12540
12541
12542
12543
12544
12545
12546
12547
12548
12549
12550
12551
12552
12553
12554
12555
12556
12557
12558
12559
12560
12561
12562
12563
12564
12565
12566
12567
12568
12569
12570
12571
12572
12573
12574
12575
12576
12577
12578
12579
12580
12581
12582
12583
12584
12585
12586
12587
12588
12589
12590
12591
12592
12593
12594
12595
12596
12597
12598
12599
12600
12601
12602
12603
12604
12605
12606
12607
12608
12609
12610
12611
12612
12613
12614
12615
12616
12617
12618
12619
12620
12621
12622
12623
12624
12625
12626
12627
12628
12629
12630
12631
12632
12633
12634
12635
12636
12637
12638
12639
12640
12641
12642
12643
12644
12645
12646
12647
12648
12649
12650
12651
12652
12653
12654
12655
12656
12657
12658
12659
12660
12661
12662
12663
12664
12665
12666
12667
12668
12669
12670
12671
12672
12673
12674
12675
12676
12677
12678
12679
12680
12681
12682
12683
12684
12685
12686
12687
12688
12689
12690
12691
12692
12693
12694
12695
12696
12697
12698
12699
12700
12701
12702
12703
12704
12705
12706
12707
12708
12709
12710
12711
12712
12713
12714
12715
12716
12717
12718
12719
12720
12721
12722
12723
12724
12725
12726
12727
12728
12729
12730
12731
12732
12733
12734
12735
12736
12737
12738
12739
12740
12741
12742
12743
12744
12745
12746
12747
12748
12749
12750
12751
12752
12753
12754
12755
12756
12757
12758
12759
12760
12761
12762
12763
12764
12765
12766
12767
12768
12769
12770
12771
12772
12773
12774
12775
12776
12777
12778
12779
12780
12781
12782
12783
12784
12785
12786
12787
12788
12789
12790
12791
12792
12793
12794
12795
12796
12797
12798
12799
12800
12801
12802
12803
12804
12805
12806
12807
12808
12809
12810
12811
12812
12813
12814
12815
12816
12817
12818
12819
12820
12821
12822
12823
12824
12825
12826
12827
12828
12829
12830
12831
12832
12833
12834
12835
12836
12837
12838
12839
12840
12841
12842
12843
12844
12845
12846
12847
12848
12849
12850
12851
12852
12853
12854
12855
12856
12857
12858
12859
12860
12861
12862
12863
12864
12865
12866
12867
12868
12869
12870
12871
12872
12873
12874
12875
12876
12877
12878
12879
12880
12881
12882
12883
12884
12885
12886
12887
12888
12889
12890
12891
12892
12893
12894
12895
12896
12897
12898
12899
12900
12901
12902
12903
12904
12905
12906
12907
12908
12909
12910
12911
12912
12913
12914
12915
12916
12917
12918
12919
12920
12921
12922
12923
12924
12925
12926
12927
12928
12929
12930
12931
12932
12933
12934
12935
12936
12937
12938
12939
12940
12941
12942
12943
12944
12945
12946
12947
12948
12949
12950
12951
12952
12953
12954
12955
12956
12957
12958
12959
12960
12961
12962
12963
12964
12965
12966
12967
12968
12969
12970
12971
12972
12973
12974
12975
12976
12977
12978
12979
12980
12981
12982
12983
12984
12985
12986
12987
12988
12989
12990
12991
12992
12993
12994
12995
12996
12997
12998
12999
13000
13001
13002
13003
13004
13005
13006
13007
13008
13009
13010
13011
13012
13013
13014
13015
13016
13017
13018
13019
13020
13021
13022
13023
13024
13025
13026
13027
13028
13029
13030
13031
13032
13033
13034
13035
13036
13037
13038
13039
13040
13041
13042
13043
13044
13045
13046
13047
13048
13049
13050
13051
13052
13053
13054
13055
13056
13057
13058
13059
13060
13061
13062
13063
13064
13065
13066
13067
13068
13069
13070
13071
13072
13073
13074
13075
13076
13077
13078
13079
13080
13081
13082
13083
13084
13085
13086
13087
13088
13089
13090
13091
13092
13093
13094
13095
13096
13097
13098
13099
13100
13101
13102
13103
13104
13105
13106
13107
13108
13109
13110
13111
13112
13113
13114
13115
13116
13117
13118
13119
13120
13121
13122
13123
13124
13125
13126
13127
13128
13129
13130
13131
13132
13133
13134
13135
13136
13137
13138
13139
13140
13141
13142
13143
13144
13145
13146
13147
13148
13149
13150
13151
13152
13153
13154
13155
13156
13157
13158
13159
13160
13161
13162
13163
13164
13165
13166
13167
13168
13169
13170
13171
13172
13173
13174
13175
13176
13177
13178
13179
13180
13181
13182
13183
13184
13185
13186
13187
13188
13189
13190
13191
13192
13193
13194
13195
13196
13197
13198
13199
13200
13201
13202
13203
13204
13205
13206
13207
13208
13209
13210
13211
13212
13213
13214
13215
13216
13217
13218
13219
13220
13221
13222
13223
13224
13225
13226
13227
13228
13229
13230
13231
13232
13233
13234
13235
13236
13237
13238
13239
13240
13241
13242
13243
13244
13245
13246
13247
13248
13249
13250
13251
13252
13253
13254
13255
13256
13257
13258
13259
13260
13261
13262
13263
13264
13265
13266
13267
13268
13269
13270
13271
13272
13273
13274
13275
13276
13277
13278
13279
13280
13281
13282
13283
13284
13285
13286
13287
13288
13289
13290
13291
13292
13293
13294
13295
13296
13297
13298
13299
13300
13301
13302
13303
13304
13305
13306
13307
13308
13309
13310
13311
13312
13313
13314
13315
13316
13317
13318
13319
13320
13321
13322
13323
13324
13325
13326
13327
13328
13329
13330
13331
13332
13333
13334
13335
13336
13337
13338
13339
13340
13341
13342
13343
13344
13345
13346
13347
13348
13349
13350
13351
13352
13353
13354
13355
13356
13357
13358
13359
13360
13361
13362
13363
13364
13365
13366
13367
13368
13369
13370
13371
13372
13373
13374
13375
13376
13377
13378
13379
13380
13381
13382
13383
13384
13385
13386
13387
13388
13389
13390
13391
13392
13393
13394
13395
13396
13397
13398
13399
13400
13401
13402
13403
13404
13405
13406
13407
13408
13409
13410
13411
13412
13413
13414
13415
13416
13417
13418
13419
13420
13421
13422
13423
13424
13425
13426
13427
13428
13429
13430
13431
13432
13433
13434
13435
13436
13437
13438
13439
13440
13441
13442
13443
13444
13445
13446
13447
13448
13449
13450
13451
13452
13453
13454
13455
13456
13457
13458
13459
13460
13461
13462
13463
13464
13465
13466
13467
13468
13469
13470
13471
13472
13473
13474
13475
13476
13477
13478
13479
13480
13481
13482
13483
13484
13485
13486
13487
13488
13489
13490
13491
13492
13493
13494
13495
13496
13497
13498
13499
13500
13501
13502
13503
13504
13505
13506
13507
13508
13509
13510
13511
13512
13513
13514
13515
13516
13517
13518
13519
13520
13521
13522
13523
13524
13525
13526
13527
13528
13529
13530
13531
13532
13533
13534
13535
13536
13537
13538
13539
13540
13541
13542
13543
13544
13545
13546
13547
13548
13549
13550
13551
13552
13553
13554
13555
13556
13557
13558
13559
13560
13561
13562
13563
13564
13565
13566
13567
13568
13569
13570
13571
13572
13573
13574
13575
13576
13577
13578
13579
13580
13581
13582
13583
13584
13585
13586
13587
13588
13589
13590
13591
13592
13593
13594
13595
13596
13597
13598
13599
13600
13601
13602
13603
13604
13605
13606
13607
13608
13609
13610
13611
13612
13613
13614
13615
13616
13617
13618
13619
13620
13621
13622
13623
13624
13625
13626
13627
13628
13629
13630
13631
13632
13633
13634
13635
13636
13637
13638
13639
13640
13641
13642
13643
13644
13645
13646
13647
13648
13649
13650
13651
13652
13653
13654
13655
13656
13657
13658
13659
13660
13661
13662
13663
13664
13665
13666
13667
13668
13669
13670
13671
13672
13673
13674
13675
13676
13677
13678
13679
13680
13681
13682
13683
13684
13685
13686
13687
13688
13689
13690
13691
13692
13693
13694
13695
13696
13697
13698
13699
13700
13701
13702
13703
13704
13705
13706
13707
13708
13709
13710
13711
13712
13713
13714
13715
13716
13717
13718
13719
13720
13721
13722
13723
13724
13725
13726
13727
13728
13729
13730
13731
13732
13733
13734
13735
13736
13737
13738
13739
13740
13741
13742
13743
13744
13745
13746
13747
13748
13749
13750
13751
13752
13753
13754
13755
13756
13757
13758
13759
13760
13761
13762
13763
13764
13765
13766
13767
13768
13769
13770
13771
13772
13773
13774
13775
13776
13777
13778
13779
13780
13781
13782
13783
13784
13785
13786
13787
13788
13789
13790
13791
13792
13793
13794
13795
13796
13797
13798
13799
13800
13801
13802
13803
13804
13805
13806
13807
13808
13809
13810
13811
13812
13813
13814
13815
13816
13817
13818
13819
13820
13821
13822
13823
13824
13825
13826
13827
13828
13829
13830
13831
13832
13833
13834
13835
13836
13837
13838
13839
13840
13841
13842
13843
13844
13845
13846
13847
13848
13849
13850
13851
13852
13853
13854
13855
13856
13857
13858
13859
13860
13861
13862
13863
13864
13865
13866
13867
13868
13869
13870
13871
13872
13873
13874
13875
13876
13877
13878
13879
13880
13881
13882
13883
13884
13885
13886
13887
13888
13889
13890
13891
13892
13893
13894
13895
13896
13897
13898
13899
13900
13901
13902
13903
13904
13905
13906
13907
13908
13909
13910
13911
13912
13913
13914
13915
13916
13917
13918
13919
13920
13921
13922
13923
13924
13925
13926
13927
13928
13929
13930
13931
13932
13933
13934
13935
13936
13937
13938
13939
13940
13941
13942
13943
13944
13945
13946
13947
13948
13949
13950
13951
13952
13953
13954
13955
13956
13957
13958
13959
13960
13961
13962
13963
13964
13965
13966
13967
13968
13969
13970
13971
13972
13973
13974
13975
13976
13977
13978
13979
13980
13981
13982
13983
13984
13985
13986
13987
13988
13989
13990
13991
13992
13993
13994
13995
13996
13997
13998
13999
14000
14001
14002
14003
14004
14005
14006
14007
14008
14009
14010
14011
14012
14013
14014
14015
14016
14017
14018
14019
14020
14021
14022
14023
14024
14025
14026
14027
14028
14029
14030
14031
14032
14033
14034
14035
14036
14037
14038
14039
14040
14041
14042
14043
14044
14045
14046
14047
14048
14049
14050
14051
14052
14053
14054
14055
14056
14057
14058
14059
14060
14061
14062
14063
14064
14065
14066
14067
14068
14069
14070
14071
14072
14073
14074
14075
14076
14077
14078
14079
14080
14081
14082
14083
14084
14085
14086
14087
14088
14089
14090
14091
14092
14093
14094
14095
14096
14097
14098
14099
14100
14101
14102
14103
14104
14105
14106
14107
14108
14109
14110
14111
14112
14113
14114
14115
14116
14117
14118
14119
14120
14121
14122
14123
14124
14125
14126
14127
14128
14129
14130
14131
14132
14133
14134
14135
14136
14137
14138
14139
14140
14141
14142
14143
14144
14145
14146
14147
14148
14149
14150
14151
14152
14153
14154
14155
14156
14157
14158
14159
14160
14161
14162
14163
14164
14165
14166
14167
14168
14169
14170
14171
14172
14173
14174
14175
14176
14177
14178
14179
14180
14181
14182
14183
14184
14185
14186
14187
14188
14189
14190
14191
14192
14193
14194
14195
14196
14197
14198
14199
14200
14201
14202
14203
14204
14205
14206
14207
14208
14209
14210
14211
14212
14213
14214
14215
14216
14217
14218
14219
14220
14221
14222
14223
14224
14225
14226
14227
14228
14229
14230
14231
14232
14233
14234
14235
14236
14237
14238
14239
14240
14241
14242
14243
14244
14245
14246
14247
14248
14249
14250
14251
14252
14253
14254
14255
14256
14257
14258
14259
14260
14261
14262
14263
14264
14265
14266
14267
14268
14269
14270
14271
14272
14273
14274
14275
14276
14277
14278
14279
14280
14281
14282
14283
14284
14285
14286
14287
14288
14289
14290
14291
14292
14293
14294
14295
14296
14297
14298
14299
14300
14301
14302
14303
14304
14305
14306
14307
14308
14309
14310
14311
14312
14313
14314
14315
14316
14317
14318
14319
14320
14321
14322
14323
14324
14325
14326
14327
14328
14329
14330
14331
14332
14333
14334
14335
14336
14337
14338
14339
14340
14341
14342
14343
14344
14345
14346
14347
14348
14349
14350
14351
14352
14353
14354
14355
14356
14357
14358
14359
14360
14361
14362
14363
14364
14365
14366
14367
14368
14369
14370
14371
14372
14373
14374
14375
14376
14377
14378
14379
14380
14381
14382
14383
14384
14385
14386
14387
14388
14389
14390
14391
14392
14393
14394
14395
14396
14397
14398
14399
14400
14401
14402
14403
14404
14405
14406
14407
14408
14409
14410
14411
14412
14413
14414
14415
14416
14417
14418
14419
14420
14421
14422
14423
14424
14425
14426
14427
14428
14429
14430
14431
14432
14433
14434
14435
14436
14437
14438
14439
14440
14441
14442
14443
14444
14445
14446
14447
14448
14449
14450
14451
14452
14453
14454
14455
14456
14457
14458
14459
14460
14461
14462
14463
14464
14465
14466
14467
14468
14469
14470
14471
14472
14473
14474
14475
14476
14477
14478
14479
14480
14481
14482
14483
14484
14485
14486
14487
14488
14489
14490
14491
14492
14493
14494
14495
14496
14497
14498
14499
14500
14501
14502
14503
14504
14505
14506
14507
14508
14509
14510
14511
14512
14513
14514
14515
14516
14517
14518
14519
14520
14521
14522
14523
14524
14525
14526
14527
14528
14529
14530
14531
14532
14533
14534
14535
14536
14537
14538
14539
14540
14541
14542
14543
14544
14545
14546
14547
14548
14549
14550
14551
14552
14553
14554
14555
14556
14557
14558
14559
14560
14561
14562
14563
14564
14565
14566
14567
14568
14569
14570
14571
14572
14573
14574
14575
14576
14577
14578
14579
14580
14581
14582
14583
14584
14585
14586
14587
14588
14589
14590
14591
14592
14593
14594
14595
14596
14597
14598
14599
14600
14601
14602
14603
14604
14605
14606
14607
14608
14609
14610
14611
14612
14613
14614
14615
14616
14617
14618
14619
14620
14621
14622
14623
14624
14625
14626
14627
14628
14629
14630
14631
14632
14633
14634
14635
14636
14637
14638
14639
14640
14641
14642
14643
14644
14645
14646
14647
14648
14649
14650
14651
14652
14653
14654
14655
14656
14657
14658
14659
14660
14661
14662
14663
14664
14665
14666
14667
14668
14669
14670
14671
14672
14673
14674
14675
14676
14677
14678
14679
14680
14681
14682
14683
14684
14685
14686
14687
14688
14689
14690
14691
14692
14693
14694
14695
14696
14697
14698
14699
14700
14701
14702
14703
14704
14705
14706
14707
14708
14709
14710
14711
14712
14713
14714
14715
14716
14717
14718
14719
14720
14721
14722
14723
14724
14725
14726
14727
14728
14729
14730
14731
14732
14733
14734
14735
14736
14737
14738
14739
14740
14741
14742
14743
14744
14745
14746
14747
14748
14749
14750
14751
14752
14753
14754
14755
14756
14757
14758
14759
14760
14761
14762
14763
14764
14765
14766
14767
14768
14769
14770
14771
14772
14773
14774
14775
14776
14777
14778
14779
14780
14781
14782
14783
14784
14785
14786
14787
14788
14789
14790
14791
14792
14793
14794
14795
14796
14797
14798
14799
14800
14801
14802
14803
14804
14805
14806
14807
14808
14809
14810
14811
14812
14813
14814
14815
14816
14817
14818
14819
14820
14821
14822
14823
14824
14825
14826
14827
14828
14829
14830
14831
14832
14833
14834
14835
14836
14837
14838
14839
14840
14841
14842
14843
14844
14845
14846
14847
14848
14849
14850
14851
14852
14853
14854
14855
14856
14857
14858
14859
14860
14861
14862
14863
14864
14865
14866
14867
14868
14869
14870
14871
14872
14873
14874
14875
14876
14877
14878
14879
14880
14881
14882
14883
14884
14885
14886
14887
14888
14889
14890
14891
14892
14893
14894
14895
14896
14897
14898
14899
14900
14901
14902
14903
14904
14905
14906
14907
14908
14909
14910
14911
14912
14913
14914
14915
14916
14917
14918
14919
14920
14921
14922
14923
14924
14925
14926
14927
14928
14929
14930
14931
14932
14933
14934
14935
14936
14937
14938
14939
14940
14941
14942
14943
14944
14945
14946
14947
14948
14949
14950
14951
14952
14953
14954
14955
14956
14957
14958
14959
14960
14961
14962
14963
14964
14965
14966
14967
14968
14969
14970
14971
14972
14973
14974
14975
14976
14977
14978
14979
14980
14981
14982
14983
14984
14985
14986
14987
14988
14989
14990
14991
14992
14993
14994
14995
14996
14997
14998
14999
15000
15001
15002
15003
15004
15005
15006
15007
15008
15009
15010
15011
15012
15013
15014
15015
15016
15017
15018
15019
15020
15021
15022
15023
15024
15025
15026
15027
15028
15029
15030
15031
15032
15033
15034
15035
15036
15037
15038
15039
15040
15041
15042
15043
15044
15045
15046
15047
15048
15049
15050
15051
15052
15053
15054
15055
15056
15057
15058
15059
15060
15061
15062
15063
15064
15065
15066
15067
15068
15069
15070
15071
15072
15073
15074
15075
15076
15077
15078
15079
15080
15081
15082
15083
15084
15085
15086
15087
15088
15089
15090
15091
15092
15093
15094
15095
15096
15097
15098
15099
15100
15101
15102
15103
15104
15105
15106
15107
15108
15109
15110
15111
15112
15113
15114
15115
15116
15117
15118
15119
15120
15121
15122
15123
15124
15125
15126
15127
15128
15129
15130
15131
15132
15133
15134
15135
15136
15137
15138
15139
15140
15141
15142
15143
15144
15145
15146
15147
15148
15149
15150
15151
15152
15153
15154
15155
15156
15157
15158
15159
15160
15161
15162
15163
15164
15165
15166
15167
15168
15169
15170
15171
15172
15173
15174
15175
15176
15177
15178
15179
15180
15181
15182
15183
15184
15185
15186
15187
15188
15189
15190
15191
15192
15193
15194
15195
15196
15197
15198
15199
15200
15201
15202
15203
15204
15205
15206
15207
15208
15209
15210
15211
15212
15213
15214
15215
15216
15217
15218
15219
15220
15221
15222
15223
15224
15225
15226
15227
15228
15229
15230
15231
15232
15233
15234
15235
15236
15237
15238
15239
15240
15241
15242
15243
15244
15245
15246
15247
15248
15249
15250
15251
15252
15253
15254
15255
15256
15257
15258
15259
15260
15261
15262
15263
15264
15265
15266
15267
15268
15269
15270
15271
15272
15273
15274
15275
15276
15277
15278
15279
15280
15281
15282
15283
15284
15285
15286
15287
15288
15289
15290
15291
15292
15293
15294
15295
15296
15297
15298
15299
15300
15301
15302
15303
15304
15305
15306
15307
15308
15309
15310
15311
15312
15313
15314
15315
15316
15317
15318
15319
15320
15321
15322
15323
15324
15325
15326
15327
15328
15329
15330
15331
15332
15333
15334
15335
15336
15337
15338
15339
15340
15341
15342
15343
15344
15345
15346
15347
15348
15349
15350
15351
15352
15353
15354
15355
15356
15357
15358
15359
15360
15361
15362
15363
15364
15365
15366
15367
15368
15369
15370
15371
15372
15373
15374
15375
15376
15377
15378
15379
15380
15381
15382
15383
15384
15385
15386
15387
15388
15389
15390
15391
15392
15393
15394
15395
15396
15397
15398
15399
15400
15401
15402
15403
15404
15405
15406
15407
15408
15409
15410
15411
15412
15413
15414
15415
15416
15417
15418
15419
15420
15421
15422
15423
15424
15425
15426
15427
15428
15429
15430
15431
15432
15433
15434
15435
15436
15437
15438
15439
15440
15441
15442
15443
15444
15445
15446
15447
15448
15449
15450
15451
15452
15453
15454
15455
15456
15457
15458
15459
15460
15461
15462
15463
15464
15465
15466
15467
15468
15469
15470
15471
15472
15473
15474
15475
15476
15477
15478
15479
15480
15481
15482
15483
15484
15485
15486
15487
15488
15489
15490
15491
15492
15493
15494
15495
15496
15497
15498
15499
15500
15501
15502
15503
15504
15505
15506
15507
15508
15509
15510
15511
15512
15513
15514
15515
15516
15517
15518
15519
15520
15521
15522
15523
15524
15525
15526
15527
15528
15529
15530
15531
15532
15533
15534
15535
15536
15537
15538
15539
15540
15541
15542
15543
15544
15545
15546
15547
15548
15549
15550
15551
15552
15553
15554
15555
15556
15557
15558
15559
15560
15561
15562
15563
15564
15565
15566
15567
15568
15569
15570
15571
15572
15573
15574
15575
15576
15577
15578
15579
15580
15581
15582
15583
15584
15585
15586
15587
15588
15589
15590
15591
15592
15593
15594
15595
15596
15597
15598
15599
15600
15601
15602
15603
15604
15605
15606
15607
15608
15609
15610
15611
15612
15613
15614
15615
15616
15617
15618
15619
15620
15621
15622
15623
15624
15625
15626
15627
15628
15629
15630
15631
15632
15633
15634
15635
15636
15637
15638
15639
15640
15641
15642
15643
15644
15645
15646
15647
15648
15649
15650
15651
15652
15653
15654
15655
15656
15657
15658
15659
15660
15661
15662
15663
15664
15665
15666
15667
15668
15669
15670
15671
15672
15673
15674
15675
15676
15677
15678
15679
15680
15681
15682
15683
15684
15685
15686
15687
15688
15689
15690
15691
15692
15693
15694
15695
15696
15697
15698
15699
15700
15701
15702
15703
15704
15705
15706
15707
15708
15709
15710
15711
15712
15713
15714
15715
15716
15717
15718
15719
15720
15721
15722
15723
15724
15725
15726
15727
15728
15729
15730
15731
15732
15733
15734
15735
15736
15737
15738
15739
15740
15741
15742
15743
15744
15745
15746
15747
15748
15749
15750
15751
15752
15753
15754
15755
15756
15757
15758
15759
15760
15761
15762
15763
15764
15765
15766
15767
15768
15769
15770
15771
15772
15773
15774
15775
15776
15777
15778
15779
15780
15781
15782
15783
15784
15785
15786
15787
15788
15789
15790
15791
15792
15793
15794
15795
15796
15797
15798
15799
15800
15801
15802
15803
15804
15805
15806
15807
15808
15809
15810
15811
15812
15813
15814
15815
15816
15817
15818
15819
15820
15821
15822
15823
15824
15825
15826
15827
15828
15829
15830
15831
15832
15833
15834
15835
15836
15837
15838
15839
15840
15841
15842
15843
15844
15845
15846
15847
15848
15849
15850
15851
15852
15853
15854
15855
15856
15857
15858
15859
15860
15861
15862
15863
15864
15865
15866
15867
15868
15869
15870
15871
15872
15873
15874
15875
15876
15877
15878
15879
15880
15881
15882
15883
15884
15885
15886
15887
15888
15889
15890
15891
15892
15893
15894
15895
15896
15897
15898
15899
15900
15901
15902
15903
15904
15905
15906
15907
15908
15909
15910
15911
15912
15913
15914
15915
15916
15917
15918
15919
15920
15921
15922
15923
15924
15925
15926
15927
15928
15929
15930
15931
15932
15933
15934
15935
15936
15937
15938
15939
15940
15941
15942
15943
15944
15945
15946
15947
15948
15949
15950
15951
15952
15953
15954
15955
15956
15957
15958
15959
15960
15961
15962
15963
15964
15965
15966
15967
15968
15969
15970
15971
15972
15973
15974
15975
15976
15977
15978
15979
15980
15981
15982
15983
15984
15985
15986
15987
15988
15989
15990
15991
15992
15993
15994
15995
15996
15997
15998
15999
16000
16001
16002
16003
16004
16005
16006
16007
16008
16009
16010
16011
16012
16013
16014
16015
16016
16017
16018
16019
16020
16021
16022
16023
16024
16025
16026
16027
16028
16029
16030
16031
16032
16033
16034
16035
16036
16037
16038
16039
16040
16041
16042
16043
16044
16045
16046
16047
16048
16049
16050
16051
16052
16053
16054
16055
16056
16057
16058
16059
16060
16061
16062
16063
16064
16065
16066
16067
16068
16069
16070
16071
16072
16073
16074
16075
16076
16077
16078
16079
16080
16081
16082
16083
16084
16085
16086
16087
16088
16089
16090
16091
16092
16093
16094
16095
16096
16097
16098
16099
16100
16101
16102
16103
16104
16105
16106
16107
16108
16109
16110
16111
16112
16113
16114
16115
16116
16117
16118
16119
16120
16121
16122
16123
16124
16125
16126
16127
16128
16129
16130
16131
16132
16133
16134
16135
16136
16137
16138
16139
16140
16141
16142
16143
16144
16145
16146
16147
16148
16149
16150
16151
16152
16153
16154
16155
16156
16157
16158
16159
16160
16161
16162
16163
16164
16165
16166
16167
16168
16169
16170
16171
16172
16173
16174
16175
16176
16177
16178
16179
16180
16181
16182
16183
16184
16185
16186
16187
16188
16189
16190
16191
16192
16193
16194
16195
16196
16197
16198
16199
16200
16201
16202
16203
16204
16205
16206
16207
16208
16209
16210
16211
16212
16213
16214
16215
16216
16217
16218
16219
16220
16221
16222
16223
16224
16225
16226
16227
16228
16229
16230
16231
16232
16233
16234
16235
16236
16237
16238
16239
16240
16241
16242
16243
16244
16245
16246
16247
16248
16249
16250
16251
16252
16253
16254
16255
16256
16257
16258
16259
16260
16261
16262
16263
16264
16265
16266
16267
16268
16269
16270
16271
16272
16273
16274
16275
16276
16277
16278
16279
16280
16281
16282
16283
16284
16285
16286
16287
16288
16289
16290
16291
16292
16293
16294
16295
16296
16297
16298
16299
16300
16301
16302
16303
16304
16305
16306
16307
16308
16309
16310
16311
16312
16313
16314
16315
16316
16317
16318
16319
16320
16321
16322
16323
16324
16325
16326
16327
16328
16329
16330
16331
16332
16333
16334
16335
16336
16337
16338
16339
16340
16341
16342
16343
16344
16345
16346
16347
16348
16349
16350
16351
16352
16353
16354
16355
16356
16357
16358
16359
16360
16361
16362
16363
16364
16365
16366
16367
16368
16369
16370
16371
16372
16373
16374
16375
16376
16377
16378
16379
16380
16381
16382
16383
16384
16385
16386
16387
16388
16389
16390
16391
16392
16393
16394
16395
16396
16397
16398
16399
16400
16401
16402
16403
16404
16405
16406
16407
16408
16409
16410
16411
16412
16413
16414
16415
16416
16417
16418
16419
16420
16421
16422
16423
16424
16425
16426
16427
16428
16429
16430
16431
16432
16433
16434
16435
16436
16437
16438
16439
16440
16441
16442
16443
16444
16445
16446
16447
16448
16449
16450
16451
16452
16453
16454
16455
16456
16457
16458
16459
16460
16461
16462
16463
16464
16465
16466
16467
16468
16469
16470
16471
16472
16473
16474
16475
16476
16477
16478
16479
16480
16481
16482
16483
16484
16485
16486
16487
16488
16489
16490
16491
16492
16493
16494
16495
16496
16497
16498
16499
16500
16501
16502
16503
16504
16505
16506
16507
16508
16509
16510
16511
16512
16513
16514
16515
16516
16517
16518
16519
16520
16521
16522
16523
16524
16525
16526
16527
16528
16529
16530
16531
16532
16533
16534
16535
16536
16537
16538
16539
16540
16541
16542
16543
16544
16545
16546
16547
16548
16549
16550
16551
16552
16553
16554
16555
16556
16557
16558
16559
16560
16561
16562
16563
16564
16565
16566
16567
16568
16569
16570
16571
16572
16573
16574
16575
16576
16577
16578
16579
16580
16581
16582
16583
16584
16585
16586
16587
16588
16589
16590
16591
16592
16593
16594
16595
16596
16597
16598
16599
16600
16601
16602
16603
16604
16605
16606
16607
16608
16609
16610
16611
16612
16613
16614
16615
16616
16617
16618
16619
16620
16621
16622
16623
16624
16625
16626
16627
16628
16629
16630
16631
16632
16633
16634
16635
16636
16637
16638
16639
16640
16641
16642
16643
16644
16645
16646
16647
16648
16649
16650
16651
16652
16653
16654
16655
16656
16657
16658
16659
16660
16661
16662
16663
16664
16665
16666
16667
16668
16669
16670
16671
16672
16673
16674
16675
16676
16677
16678
16679
16680
16681
16682
16683
16684
16685
16686
16687
16688
16689
16690
16691
16692
16693
16694
16695
16696
16697
16698
16699
16700
16701
16702
16703
16704
16705
16706
16707
16708
16709
16710
16711
16712
16713
16714
16715
16716
16717
16718
16719
16720
16721
16722
16723
16724
16725
16726
16727
16728
16729
16730
16731
16732
16733
16734
16735
16736
16737
16738
16739
16740
16741
16742
16743
16744
16745
16746
16747
16748
16749
|
/* MIPS-specific support for ELF
Copyright (C) 1993-2021 Free Software Foundation, Inc.
Most of the information added by Ian Lance Taylor, Cygnus Support,
<ian@cygnus.com>.
N32/64 ABI support added by Mark Mitchell, CodeSourcery, LLC.
<mark@codesourcery.com>
Traditional MIPS targets support added by Koundinya.K, Dansk Data
Elektronik & Operations Research Group. <kk@ddeorg.soft.net>
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
/* This file handles functionality common to the different MIPS ABI's. */
#include "sysdep.h"
#include "bfd.h"
#include "libbfd.h"
#include "libiberty.h"
#include "elf-bfd.h"
#include "ecoff-bfd.h"
#include "elfxx-mips.h"
#include "elf/mips.h"
#include "elf-vxworks.h"
#include "dwarf2.h"
/* Get the ECOFF swapping routines. */
#include "coff/sym.h"
#include "coff/symconst.h"
#include "coff/ecoff.h"
#include "coff/mips.h"
#include "hashtab.h"
/* Types of TLS GOT entry. */
enum mips_got_tls_type {
GOT_TLS_NONE,
GOT_TLS_GD,
GOT_TLS_LDM,
GOT_TLS_IE
};
/* This structure is used to hold information about one GOT entry.
There are four types of entry:
(1) an absolute address
requires: abfd == NULL
fields: d.address
(2) a SYMBOL + OFFSET address, where SYMBOL is local to an input bfd
requires: abfd != NULL, symndx >= 0, tls_type != GOT_TLS_LDM
fields: abfd, symndx, d.addend, tls_type
(3) a SYMBOL address, where SYMBOL is not local to an input bfd
requires: abfd != NULL, symndx == -1
fields: d.h, tls_type
(4) a TLS LDM slot
requires: abfd != NULL, symndx == 0, tls_type == GOT_TLS_LDM
fields: none; there's only one of these per GOT. */
struct mips_got_entry
{
/* One input bfd that needs the GOT entry. */
bfd *abfd;
/* The index of the symbol, as stored in the relocation r_info, if
we have a local symbol; -1 otherwise. */
long symndx;
union
{
/* If abfd == NULL, an address that must be stored in the got. */
bfd_vma address;
/* If abfd != NULL && symndx != -1, the addend of the relocation
that should be added to the symbol value. */
bfd_vma addend;
/* If abfd != NULL && symndx == -1, the hash table entry
corresponding to a symbol in the GOT. The symbol's entry
is in the local area if h->global_got_area is GGA_NONE,
otherwise it is in the global area. */
struct mips_elf_link_hash_entry *h;
} d;
/* The TLS type of this GOT entry. An LDM GOT entry will be a local
symbol entry with r_symndx == 0. */
unsigned char tls_type;
/* True if we have filled in the GOT contents for a TLS entry,
and created the associated relocations. */
unsigned char tls_initialized;
/* The offset from the beginning of the .got section to the entry
corresponding to this symbol+addend. If it's a global symbol
whose offset is yet to be decided, it's going to be -1. */
long gotidx;
};
/* This structure represents a GOT page reference from an input bfd.
Each instance represents a symbol + ADDEND, where the representation
of the symbol depends on whether it is local to the input bfd.
If it is, then SYMNDX >= 0, and the symbol has index SYMNDX in U.ABFD.
Otherwise, SYMNDX < 0 and U.H points to the symbol's hash table entry.
Page references with SYMNDX >= 0 always become page references
in the output. Page references with SYMNDX < 0 only become page
references if the symbol binds locally; in other cases, the page
reference decays to a global GOT reference. */
struct mips_got_page_ref
{
long symndx;
union
{
struct mips_elf_link_hash_entry *h;
bfd *abfd;
} u;
bfd_vma addend;
};
/* This structure describes a range of addends: [MIN_ADDEND, MAX_ADDEND].
The structures form a non-overlapping list that is sorted by increasing
MIN_ADDEND. */
struct mips_got_page_range
{
struct mips_got_page_range *next;
bfd_signed_vma min_addend;
bfd_signed_vma max_addend;
};
/* This structure describes the range of addends that are applied to page
relocations against a given section. */
struct mips_got_page_entry
{
/* The section that these entries are based on. */
asection *sec;
/* The ranges for this page entry. */
struct mips_got_page_range *ranges;
/* The maximum number of page entries needed for RANGES. */
bfd_vma num_pages;
};
/* This structure is used to hold .got information when linking. */
struct mips_got_info
{
/* The number of global .got entries. */
unsigned int global_gotno;
/* The number of global .got entries that are in the GGA_RELOC_ONLY area. */
unsigned int reloc_only_gotno;
/* The number of .got slots used for TLS. */
unsigned int tls_gotno;
/* The first unused TLS .got entry. Used only during
mips_elf_initialize_tls_index. */
unsigned int tls_assigned_gotno;
/* The number of local .got entries, eventually including page entries. */
unsigned int local_gotno;
/* The maximum number of page entries needed. */
unsigned int page_gotno;
/* The number of relocations needed for the GOT entries. */
unsigned int relocs;
/* The first unused local .got entry. */
unsigned int assigned_low_gotno;
/* The last unused local .got entry. */
unsigned int assigned_high_gotno;
/* A hash table holding members of the got. */
struct htab *got_entries;
/* A hash table holding mips_got_page_ref structures. */
struct htab *got_page_refs;
/* A hash table of mips_got_page_entry structures. */
struct htab *got_page_entries;
/* In multi-got links, a pointer to the next got (err, rather, most
of the time, it points to the previous got). */
struct mips_got_info *next;
};
/* Structure passed when merging bfds' gots. */
struct mips_elf_got_per_bfd_arg
{
/* The output bfd. */
bfd *obfd;
/* The link information. */
struct bfd_link_info *info;
/* A pointer to the primary got, i.e., the one that's going to get
the implicit relocations from DT_MIPS_LOCAL_GOTNO and
DT_MIPS_GOTSYM. */
struct mips_got_info *primary;
/* A non-primary got we're trying to merge with other input bfd's
gots. */
struct mips_got_info *current;
/* The maximum number of got entries that can be addressed with a
16-bit offset. */
unsigned int max_count;
/* The maximum number of page entries needed by each got. */
unsigned int max_pages;
/* The total number of global entries which will live in the
primary got and be automatically relocated. This includes
those not referenced by the primary GOT but included in
the "master" GOT. */
unsigned int global_count;
};
/* A structure used to pass information to htab_traverse callbacks
when laying out the GOT. */
struct mips_elf_traverse_got_arg
{
struct bfd_link_info *info;
struct mips_got_info *g;
int value;
};
struct _mips_elf_section_data
{
struct bfd_elf_section_data elf;
union
{
bfd_byte *tdata;
} u;
};
#define mips_elf_section_data(sec) \
((struct _mips_elf_section_data *) elf_section_data (sec))
#define is_mips_elf(bfd) \
(bfd_get_flavour (bfd) == bfd_target_elf_flavour \
&& elf_tdata (bfd) != NULL \
&& elf_object_id (bfd) == MIPS_ELF_DATA)
/* The ABI says that every symbol used by dynamic relocations must have
a global GOT entry. Among other things, this provides the dynamic
linker with a free, directly-indexed cache. The GOT can therefore
contain symbols that are not referenced by GOT relocations themselves
(in other words, it may have symbols that are not referenced by things
like R_MIPS_GOT16 and R_MIPS_GOT_PAGE).
GOT relocations are less likely to overflow if we put the associated
GOT entries towards the beginning. We therefore divide the global
GOT entries into two areas: "normal" and "reloc-only". Entries in
the first area can be used for both dynamic relocations and GP-relative
accesses, while those in the "reloc-only" area are for dynamic
relocations only.
These GGA_* ("Global GOT Area") values are organised so that lower
values are more general than higher values. Also, non-GGA_NONE
values are ordered by the position of the area in the GOT. */
#define GGA_NORMAL 0
#define GGA_RELOC_ONLY 1
#define GGA_NONE 2
/* Information about a non-PIC interface to a PIC function. There are
two ways of creating these interfaces. The first is to add:
lui $25,%hi(func)
addiu $25,$25,%lo(func)
immediately before a PIC function "func". The second is to add:
lui $25,%hi(func)
j func
addiu $25,$25,%lo(func)
to a separate trampoline section.
Stubs of the first kind go in a new section immediately before the
target function. Stubs of the second kind go in a single section
pointed to by the hash table's "strampoline" field. */
struct mips_elf_la25_stub {
/* The generated section that contains this stub. */
asection *stub_section;
/* The offset of the stub from the start of STUB_SECTION. */
bfd_vma offset;
/* One symbol for the original function. Its location is available
in H->root.root.u.def. */
struct mips_elf_link_hash_entry *h;
};
/* Macros for populating a mips_elf_la25_stub. */
#define LA25_LUI(VAL) (0x3c190000 | (VAL)) /* lui t9,VAL */
#define LA25_J(VAL) (0x08000000 | (((VAL) >> 2) & 0x3ffffff)) /* j VAL */
#define LA25_BC(VAL) (0xc8000000 | (((VAL) >> 2) & 0x3ffffff)) /* bc VAL */
#define LA25_ADDIU(VAL) (0x27390000 | (VAL)) /* addiu t9,t9,VAL */
#define LA25_LUI_MICROMIPS(VAL) \
(0x41b90000 | (VAL)) /* lui t9,VAL */
#define LA25_J_MICROMIPS(VAL) \
(0xd4000000 | (((VAL) >> 1) & 0x3ffffff)) /* j VAL */
#define LA25_ADDIU_MICROMIPS(VAL) \
(0x33390000 | (VAL)) /* addiu t9,t9,VAL */
/* This structure is passed to mips_elf_sort_hash_table_f when sorting
the dynamic symbols. */
struct mips_elf_hash_sort_data
{
/* The symbol in the global GOT with the lowest dynamic symbol table
index. */
struct elf_link_hash_entry *low;
/* The least dynamic symbol table index corresponding to a non-TLS
symbol with a GOT entry. */
bfd_size_type min_got_dynindx;
/* The greatest dynamic symbol table index corresponding to a symbol
with a GOT entry that is not referenced (e.g., a dynamic symbol
with dynamic relocations pointing to it from non-primary GOTs). */
bfd_size_type max_unref_got_dynindx;
/* The greatest dynamic symbol table index corresponding to a local
symbol. */
bfd_size_type max_local_dynindx;
/* The greatest dynamic symbol table index corresponding to an external
symbol without a GOT entry. */
bfd_size_type max_non_got_dynindx;
/* If non-NULL, output BFD for .MIPS.xhash finalization. */
bfd *output_bfd;
/* If non-NULL, pointer to contents of .MIPS.xhash for filling in
real final dynindx. */
bfd_byte *mipsxhash;
};
/* We make up to two PLT entries if needed, one for standard MIPS code
and one for compressed code, either a MIPS16 or microMIPS one. We
keep a separate record of traditional lazy-binding stubs, for easier
processing. */
struct plt_entry
{
/* Traditional SVR4 stub offset, or -1 if none. */
bfd_vma stub_offset;
/* Standard PLT entry offset, or -1 if none. */
bfd_vma mips_offset;
/* Compressed PLT entry offset, or -1 if none. */
bfd_vma comp_offset;
/* The corresponding .got.plt index, or -1 if none. */
bfd_vma gotplt_index;
/* Whether we need a standard PLT entry. */
unsigned int need_mips : 1;
/* Whether we need a compressed PLT entry. */
unsigned int need_comp : 1;
};
/* The MIPS ELF linker needs additional information for each symbol in
the global hash table. */
struct mips_elf_link_hash_entry
{
struct elf_link_hash_entry root;
/* External symbol information. */
EXTR esym;
/* The la25 stub we have created for ths symbol, if any. */
struct mips_elf_la25_stub *la25_stub;
/* Number of R_MIPS_32, R_MIPS_REL32, or R_MIPS_64 relocs against
this symbol. */
unsigned int possibly_dynamic_relocs;
/* If there is a stub that 32 bit functions should use to call this
16 bit function, this points to the section containing the stub. */
asection *fn_stub;
/* If there is a stub that 16 bit functions should use to call this
32 bit function, this points to the section containing the stub. */
asection *call_stub;
/* This is like the call_stub field, but it is used if the function
being called returns a floating point value. */
asection *call_fp_stub;
/* If non-zero, location in .MIPS.xhash to write real final dynindx. */
bfd_vma mipsxhash_loc;
/* The highest GGA_* value that satisfies all references to this symbol. */
unsigned int global_got_area : 2;
/* True if all GOT relocations against this symbol are for calls. This is
a looser condition than no_fn_stub below, because there may be other
non-call non-GOT relocations against the symbol. */
unsigned int got_only_for_calls : 1;
/* True if one of the relocations described by possibly_dynamic_relocs
is against a readonly section. */
unsigned int readonly_reloc : 1;
/* True if there is a relocation against this symbol that must be
resolved by the static linker (in other words, if the relocation
cannot possibly be made dynamic). */
unsigned int has_static_relocs : 1;
/* True if we must not create a .MIPS.stubs entry for this symbol.
This is set, for example, if there are relocations related to
taking the function's address, i.e. any but R_MIPS_CALL*16 ones.
See "MIPS ABI Supplement, 3rd Edition", p. 4-20. */
unsigned int no_fn_stub : 1;
/* Whether we need the fn_stub; this is true if this symbol appears
in any relocs other than a 16 bit call. */
unsigned int need_fn_stub : 1;
/* True if this symbol is referenced by branch relocations from
any non-PIC input file. This is used to determine whether an
la25 stub is required. */
unsigned int has_nonpic_branches : 1;
/* Does this symbol need a traditional MIPS lazy-binding stub
(as opposed to a PLT entry)? */
unsigned int needs_lazy_stub : 1;
/* Does this symbol resolve to a PLT entry? */
unsigned int use_plt_entry : 1;
};
/* MIPS ELF linker hash table. */
struct mips_elf_link_hash_table
{
struct elf_link_hash_table root;
/* The number of .rtproc entries. */
bfd_size_type procedure_count;
/* The size of the .compact_rel section (if SGI_COMPAT). */
bfd_size_type compact_rel_size;
/* This flag indicates that the value of DT_MIPS_RLD_MAP dynamic entry
is set to the address of __rld_obj_head as in IRIX5 and IRIX6. */
bfd_boolean use_rld_obj_head;
/* The __rld_map or __rld_obj_head symbol. */
struct elf_link_hash_entry *rld_symbol;
/* This is set if we see any mips16 stub sections. */
bfd_boolean mips16_stubs_seen;
/* True if we can generate copy relocs and PLTs. */
bfd_boolean use_plts_and_copy_relocs;
/* True if we can only use 32-bit microMIPS instructions. */
bfd_boolean insn32;
/* True if we suppress checks for invalid branches between ISA modes. */
bfd_boolean ignore_branch_isa;
/* True if we are targetting R6 compact branches. */
bfd_boolean compact_branches;
/* True if we already reported the small-data section overflow. */
bfd_boolean small_data_overflow_reported;
/* True if we use the special `__gnu_absolute_zero' symbol. */
bfd_boolean use_absolute_zero;
/* True if we have been configured for a GNU target. */
bfd_boolean gnu_target;
/* Shortcuts to some dynamic sections, or NULL if they are not
being used. */
asection *srelplt2;
asection *sstubs;
/* The master GOT information. */
struct mips_got_info *got_info;
/* The global symbol in the GOT with the lowest index in the dynamic
symbol table. */
struct elf_link_hash_entry *global_gotsym;
/* The size of the PLT header in bytes. */
bfd_vma plt_header_size;
/* The size of a standard PLT entry in bytes. */
bfd_vma plt_mips_entry_size;
/* The size of a compressed PLT entry in bytes. */
bfd_vma plt_comp_entry_size;
/* The offset of the next standard PLT entry to create. */
bfd_vma plt_mips_offset;
/* The offset of the next compressed PLT entry to create. */
bfd_vma plt_comp_offset;
/* The index of the next .got.plt entry to create. */
bfd_vma plt_got_index;
/* The number of functions that need a lazy-binding stub. */
bfd_vma lazy_stub_count;
/* The size of a function stub entry in bytes. */
bfd_vma function_stub_size;
/* The number of reserved entries at the beginning of the GOT. */
unsigned int reserved_gotno;
/* The section used for mips_elf_la25_stub trampolines.
See the comment above that structure for details. */
asection *strampoline;
/* A table of mips_elf_la25_stubs, indexed by (input_section, offset)
pairs. */
htab_t la25_stubs;
/* A function FN (NAME, IS, OS) that creates a new input section
called NAME and links it to output section OS. If IS is nonnull,
the new section should go immediately before it, otherwise it
should go at the (current) beginning of OS.
The function returns the new section on success, otherwise it
returns null. */
asection *(*add_stub_section) (const char *, asection *, asection *);
/* Is the PLT header compressed? */
unsigned int plt_header_is_comp : 1;
};
/* Get the MIPS ELF linker hash table from a link_info structure. */
#define mips_elf_hash_table(p) \
((is_elf_hash_table ((p)->hash) \
&& elf_hash_table_id (elf_hash_table (p)) == MIPS_ELF_DATA) \
? (struct mips_elf_link_hash_table *) (p)->hash : NULL)
/* A structure used to communicate with htab_traverse callbacks. */
struct mips_htab_traverse_info
{
/* The usual link-wide information. */
struct bfd_link_info *info;
bfd *output_bfd;
/* Starts off FALSE and is set to TRUE if the link should be aborted. */
bfd_boolean error;
};
/* MIPS ELF private object data. */
struct mips_elf_obj_tdata
{
/* Generic ELF private object data. */
struct elf_obj_tdata root;
/* Input BFD providing Tag_GNU_MIPS_ABI_FP attribute for output. */
bfd *abi_fp_bfd;
/* Input BFD providing Tag_GNU_MIPS_ABI_MSA attribute for output. */
bfd *abi_msa_bfd;
/* The abiflags for this object. */
Elf_Internal_ABIFlags_v0 abiflags;
bfd_boolean abiflags_valid;
/* The GOT requirements of input bfds. */
struct mips_got_info *got;
/* Used by _bfd_mips_elf_find_nearest_line. The structure could be
included directly in this one, but there's no point to wasting
the memory just for the infrequently called find_nearest_line. */
struct mips_elf_find_line *find_line_info;
/* An array of stub sections indexed by symbol number. */
asection **local_stubs;
asection **local_call_stubs;
/* The Irix 5 support uses two virtual sections, which represent
text/data symbols defined in dynamic objects. */
asymbol *elf_data_symbol;
asymbol *elf_text_symbol;
asection *elf_data_section;
asection *elf_text_section;
};
/* Get MIPS ELF private object data from BFD's tdata. */
#define mips_elf_tdata(bfd) \
((struct mips_elf_obj_tdata *) (bfd)->tdata.any)
#define TLS_RELOC_P(r_type) \
(r_type == R_MIPS_TLS_DTPMOD32 \
|| r_type == R_MIPS_TLS_DTPMOD64 \
|| r_type == R_MIPS_TLS_DTPREL32 \
|| r_type == R_MIPS_TLS_DTPREL64 \
|| r_type == R_MIPS_TLS_GD \
|| r_type == R_MIPS_TLS_LDM \
|| r_type == R_MIPS_TLS_DTPREL_HI16 \
|| r_type == R_MIPS_TLS_DTPREL_LO16 \
|| r_type == R_MIPS_TLS_GOTTPREL \
|| r_type == R_MIPS_TLS_TPREL32 \
|| r_type == R_MIPS_TLS_TPREL64 \
|| r_type == R_MIPS_TLS_TPREL_HI16 \
|| r_type == R_MIPS_TLS_TPREL_LO16 \
|| r_type == R_MIPS16_TLS_GD \
|| r_type == R_MIPS16_TLS_LDM \
|| r_type == R_MIPS16_TLS_DTPREL_HI16 \
|| r_type == R_MIPS16_TLS_DTPREL_LO16 \
|| r_type == R_MIPS16_TLS_GOTTPREL \
|| r_type == R_MIPS16_TLS_TPREL_HI16 \
|| r_type == R_MIPS16_TLS_TPREL_LO16 \
|| r_type == R_MICROMIPS_TLS_GD \
|| r_type == R_MICROMIPS_TLS_LDM \
|| r_type == R_MICROMIPS_TLS_DTPREL_HI16 \
|| r_type == R_MICROMIPS_TLS_DTPREL_LO16 \
|| r_type == R_MICROMIPS_TLS_GOTTPREL \
|| r_type == R_MICROMIPS_TLS_TPREL_HI16 \
|| r_type == R_MICROMIPS_TLS_TPREL_LO16)
/* Structure used to pass information to mips_elf_output_extsym. */
struct extsym_info
{
bfd *abfd;
struct bfd_link_info *info;
struct ecoff_debug_info *debug;
const struct ecoff_debug_swap *swap;
bfd_boolean failed;
};
/* The names of the runtime procedure table symbols used on IRIX5. */
static const char * const mips_elf_dynsym_rtproc_names[] =
{
"_procedure_table",
"_procedure_string_table",
"_procedure_table_size",
NULL
};
/* These structures are used to generate the .compact_rel section on
IRIX5. */
typedef struct
{
unsigned long id1; /* Always one? */
unsigned long num; /* Number of compact relocation entries. */
unsigned long id2; /* Always two? */
unsigned long offset; /* The file offset of the first relocation. */
unsigned long reserved0; /* Zero? */
unsigned long reserved1; /* Zero? */
} Elf32_compact_rel;
typedef struct
{
bfd_byte id1[4];
bfd_byte num[4];
bfd_byte id2[4];
bfd_byte offset[4];
bfd_byte reserved0[4];
bfd_byte reserved1[4];
} Elf32_External_compact_rel;
typedef struct
{
unsigned int ctype : 1; /* 1: long 0: short format. See below. */
unsigned int rtype : 4; /* Relocation types. See below. */
unsigned int dist2to : 8;
unsigned int relvaddr : 19; /* (VADDR - vaddr of the previous entry)/ 4 */
unsigned long konst; /* KONST field. See below. */
unsigned long vaddr; /* VADDR to be relocated. */
} Elf32_crinfo;
typedef struct
{
unsigned int ctype : 1; /* 1: long 0: short format. See below. */
unsigned int rtype : 4; /* Relocation types. See below. */
unsigned int dist2to : 8;
unsigned int relvaddr : 19; /* (VADDR - vaddr of the previous entry)/ 4 */
unsigned long konst; /* KONST field. See below. */
} Elf32_crinfo2;
typedef struct
{
bfd_byte info[4];
bfd_byte konst[4];
bfd_byte vaddr[4];
} Elf32_External_crinfo;
typedef struct
{
bfd_byte info[4];
bfd_byte konst[4];
} Elf32_External_crinfo2;
/* These are the constants used to swap the bitfields in a crinfo. */
#define CRINFO_CTYPE (0x1U)
#define CRINFO_CTYPE_SH (31)
#define CRINFO_RTYPE (0xfU)
#define CRINFO_RTYPE_SH (27)
#define CRINFO_DIST2TO (0xffU)
#define CRINFO_DIST2TO_SH (19)
#define CRINFO_RELVADDR (0x7ffffU)
#define CRINFO_RELVADDR_SH (0)
/* A compact relocation info has long (3 words) or short (2 words)
formats. A short format doesn't have VADDR field and relvaddr
fields contains ((VADDR - vaddr of the previous entry) >> 2). */
#define CRF_MIPS_LONG 1
#define CRF_MIPS_SHORT 0
/* There are 4 types of compact relocation at least. The value KONST
has different meaning for each type:
(type) (konst)
CT_MIPS_REL32 Address in data
CT_MIPS_WORD Address in word (XXX)
CT_MIPS_GPHI_LO GP - vaddr
CT_MIPS_JMPAD Address to jump
*/
#define CRT_MIPS_REL32 0xa
#define CRT_MIPS_WORD 0xb
#define CRT_MIPS_GPHI_LO 0xc
#define CRT_MIPS_JMPAD 0xd
#define mips_elf_set_cr_format(x,format) ((x).ctype = (format))
#define mips_elf_set_cr_type(x,type) ((x).rtype = (type))
#define mips_elf_set_cr_dist2to(x,v) ((x).dist2to = (v))
#define mips_elf_set_cr_relvaddr(x,d) ((x).relvaddr = (d)<<2)
/* The structure of the runtime procedure descriptor created by the
loader for use by the static exception system. */
typedef struct runtime_pdr {
bfd_vma adr; /* Memory address of start of procedure. */
long regmask; /* Save register mask. */
long regoffset; /* Save register offset. */
long fregmask; /* Save floating point register mask. */
long fregoffset; /* Save floating point register offset. */
long frameoffset; /* Frame size. */
short framereg; /* Frame pointer register. */
short pcreg; /* Offset or reg of return pc. */
long irpss; /* Index into the runtime string table. */
long reserved;
struct exception_info *exception_info;/* Pointer to exception array. */
} RPDR, *pRPDR;
#define cbRPDR sizeof (RPDR)
#define rpdNil ((pRPDR) 0)
static struct mips_got_entry *mips_elf_create_local_got_entry
(bfd *, struct bfd_link_info *, bfd *, bfd_vma, unsigned long,
struct mips_elf_link_hash_entry *, int);
static bfd_boolean mips_elf_sort_hash_table_f
(struct mips_elf_link_hash_entry *, void *);
static bfd_vma mips_elf_high
(bfd_vma);
static bfd_boolean mips_elf_create_dynamic_relocation
(bfd *, struct bfd_link_info *, const Elf_Internal_Rela *,
struct mips_elf_link_hash_entry *, asection *, bfd_vma,
bfd_vma *, asection *);
static bfd_vma mips_elf_adjust_gp
(bfd *, struct mips_got_info *, bfd *);
/* This will be used when we sort the dynamic relocation records. */
static bfd *reldyn_sorting_bfd;
/* True if ABFD is for CPUs with load interlocking that include
non-MIPS1 CPUs and R3900. */
#define LOAD_INTERLOCKS_P(abfd) \
( ((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) != E_MIPS_ARCH_1) \
|| ((elf_elfheader (abfd)->e_flags & EF_MIPS_MACH) == E_MIPS_MACH_3900))
/* True if ABFD is for CPUs that are faster if JAL is converted to BAL.
This should be safe for all architectures. We enable this predicate
for RM9000 for now. */
#define JAL_TO_BAL_P(abfd) \
((elf_elfheader (abfd)->e_flags & EF_MIPS_MACH) == E_MIPS_MACH_9000)
/* True if ABFD is for CPUs that are faster if JALR is converted to BAL.
This should be safe for all architectures. We enable this predicate for
all CPUs. */
#define JALR_TO_BAL_P(abfd) 1
/* True if ABFD is for CPUs that are faster if JR is converted to B.
This should be safe for all architectures. We enable this predicate for
all CPUs. */
#define JR_TO_B_P(abfd) 1
/* True if ABFD is a PIC object. */
#define PIC_OBJECT_P(abfd) \
((elf_elfheader (abfd)->e_flags & EF_MIPS_PIC) != 0)
/* Nonzero if ABFD is using the O32 ABI. */
#define ABI_O32_P(abfd) \
((elf_elfheader (abfd)->e_flags & EF_MIPS_ABI) == E_MIPS_ABI_O32)
/* Nonzero if ABFD is using the N32 ABI. */
#define ABI_N32_P(abfd) \
((elf_elfheader (abfd)->e_flags & EF_MIPS_ABI2) != 0)
/* Nonzero if ABFD is using the N64 ABI. */
#define ABI_64_P(abfd) \
(get_elf_backend_data (abfd)->s->elfclass == ELFCLASS64)
/* Nonzero if ABFD is using NewABI conventions. */
#define NEWABI_P(abfd) (ABI_N32_P (abfd) || ABI_64_P (abfd))
/* Nonzero if ABFD has microMIPS code. */
#define MICROMIPS_P(abfd) \
((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH_ASE_MICROMIPS) != 0)
/* Nonzero if ABFD is MIPS R6. */
#define MIPSR6_P(abfd) \
((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) == E_MIPS_ARCH_32R6 \
|| (elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) == E_MIPS_ARCH_64R6)
/* The IRIX compatibility level we are striving for. */
#define IRIX_COMPAT(abfd) \
(get_elf_backend_data (abfd)->elf_backend_mips_irix_compat (abfd))
/* Whether we are trying to be compatible with IRIX at all. */
#define SGI_COMPAT(abfd) \
(IRIX_COMPAT (abfd) != ict_none)
/* The name of the options section. */
#define MIPS_ELF_OPTIONS_SECTION_NAME(abfd) \
(NEWABI_P (abfd) ? ".MIPS.options" : ".options")
/* True if NAME is the recognized name of any SHT_MIPS_OPTIONS section.
Some IRIX system files do not use MIPS_ELF_OPTIONS_SECTION_NAME. */
#define MIPS_ELF_OPTIONS_SECTION_NAME_P(NAME) \
(strcmp (NAME, ".MIPS.options") == 0 || strcmp (NAME, ".options") == 0)
/* True if NAME is the recognized name of any SHT_MIPS_ABIFLAGS section. */
#define MIPS_ELF_ABIFLAGS_SECTION_NAME_P(NAME) \
(strcmp (NAME, ".MIPS.abiflags") == 0)
/* Whether the section is readonly. */
#define MIPS_ELF_READONLY_SECTION(sec) \
((sec->flags & (SEC_ALLOC | SEC_LOAD | SEC_READONLY)) \
== (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
/* The name of the stub section. */
#define MIPS_ELF_STUB_SECTION_NAME(abfd) ".MIPS.stubs"
/* The size of an external REL relocation. */
#define MIPS_ELF_REL_SIZE(abfd) \
(get_elf_backend_data (abfd)->s->sizeof_rel)
/* The size of an external RELA relocation. */
#define MIPS_ELF_RELA_SIZE(abfd) \
(get_elf_backend_data (abfd)->s->sizeof_rela)
/* The size of an external dynamic table entry. */
#define MIPS_ELF_DYN_SIZE(abfd) \
(get_elf_backend_data (abfd)->s->sizeof_dyn)
/* The size of a GOT entry. */
#define MIPS_ELF_GOT_SIZE(abfd) \
(get_elf_backend_data (abfd)->s->arch_size / 8)
/* The size of the .rld_map section. */
#define MIPS_ELF_RLD_MAP_SIZE(abfd) \
(get_elf_backend_data (abfd)->s->arch_size / 8)
/* The size of a symbol-table entry. */
#define MIPS_ELF_SYM_SIZE(abfd) \
(get_elf_backend_data (abfd)->s->sizeof_sym)
/* The default alignment for sections, as a power of two. */
#define MIPS_ELF_LOG_FILE_ALIGN(abfd) \
(get_elf_backend_data (abfd)->s->log_file_align)
/* Get word-sized data. */
#define MIPS_ELF_GET_WORD(abfd, ptr) \
(ABI_64_P (abfd) ? bfd_get_64 (abfd, ptr) : bfd_get_32 (abfd, ptr))
/* Put out word-sized data. */
#define MIPS_ELF_PUT_WORD(abfd, val, ptr) \
(ABI_64_P (abfd) \
? bfd_put_64 (abfd, val, ptr) \
: bfd_put_32 (abfd, val, ptr))
/* The opcode for word-sized loads (LW or LD). */
#define MIPS_ELF_LOAD_WORD(abfd) \
(ABI_64_P (abfd) ? 0xdc000000 : 0x8c000000)
/* Add a dynamic symbol table-entry. */
#define MIPS_ELF_ADD_DYNAMIC_ENTRY(info, tag, val) \
_bfd_elf_add_dynamic_entry (info, tag, val)
#define MIPS_ELF_RTYPE_TO_HOWTO(abfd, rtype, rela) \
(get_elf_backend_data (abfd)->elf_backend_mips_rtype_to_howto (abfd, rtype, rela))
/* The name of the dynamic relocation section. */
#define MIPS_ELF_REL_DYN_NAME(INFO) \
(mips_elf_hash_table (INFO)->root.target_os == is_vxworks \
? ".rela.dyn" : ".rel.dyn")
/* In case we're on a 32-bit machine, construct a 64-bit "-1" value
from smaller values. Start with zero, widen, *then* decrement. */
#define MINUS_ONE (((bfd_vma)0) - 1)
#define MINUS_TWO (((bfd_vma)0) - 2)
/* The value to write into got[1] for SVR4 targets, to identify it is
a GNU object. The dynamic linker can then use got[1] to store the
module pointer. */
#define MIPS_ELF_GNU_GOT1_MASK(abfd) \
((bfd_vma) 1 << (ABI_64_P (abfd) ? 63 : 31))
/* The offset of $gp from the beginning of the .got section. */
#define ELF_MIPS_GP_OFFSET(INFO) \
(mips_elf_hash_table (INFO)->root.target_os == is_vxworks \
? 0x0 : 0x7ff0)
/* The maximum size of the GOT for it to be addressable using 16-bit
offsets from $gp. */
#define MIPS_ELF_GOT_MAX_SIZE(INFO) (ELF_MIPS_GP_OFFSET (INFO) + 0x7fff)
/* Instructions which appear in a stub. */
#define STUB_LW(abfd) \
((ABI_64_P (abfd) \
? 0xdf998010 /* ld t9,0x8010(gp) */ \
: 0x8f998010)) /* lw t9,0x8010(gp) */
#define STUB_MOVE 0x03e07825 /* or t7,ra,zero */
#define STUB_LUI(VAL) (0x3c180000 + (VAL)) /* lui t8,VAL */
#define STUB_JALR 0x0320f809 /* jalr ra,t9 */
#define STUB_JALRC 0xf8190000 /* jalrc ra,t9 */
#define STUB_ORI(VAL) (0x37180000 + (VAL)) /* ori t8,t8,VAL */
#define STUB_LI16U(VAL) (0x34180000 + (VAL)) /* ori t8,zero,VAL unsigned */
#define STUB_LI16S(abfd, VAL) \
((ABI_64_P (abfd) \
? (0x64180000 + (VAL)) /* daddiu t8,zero,VAL sign extended */ \
: (0x24180000 + (VAL)))) /* addiu t8,zero,VAL sign extended */
/* Likewise for the microMIPS ASE. */
#define STUB_LW_MICROMIPS(abfd) \
(ABI_64_P (abfd) \
? 0xdf3c8010 /* ld t9,0x8010(gp) */ \
: 0xff3c8010) /* lw t9,0x8010(gp) */
#define STUB_MOVE_MICROMIPS 0x0dff /* move t7,ra */
#define STUB_MOVE32_MICROMIPS 0x001f7a90 /* or t7,ra,zero */
#define STUB_LUI_MICROMIPS(VAL) \
(0x41b80000 + (VAL)) /* lui t8,VAL */
#define STUB_JALR_MICROMIPS 0x45d9 /* jalr t9 */
#define STUB_JALR32_MICROMIPS 0x03f90f3c /* jalr ra,t9 */
#define STUB_ORI_MICROMIPS(VAL) \
(0x53180000 + (VAL)) /* ori t8,t8,VAL */
#define STUB_LI16U_MICROMIPS(VAL) \
(0x53000000 + (VAL)) /* ori t8,zero,VAL unsigned */
#define STUB_LI16S_MICROMIPS(abfd, VAL) \
(ABI_64_P (abfd) \
? 0x5f000000 + (VAL) /* daddiu t8,zero,VAL sign extended */ \
: 0x33000000 + (VAL)) /* addiu t8,zero,VAL sign extended */
#define MIPS_FUNCTION_STUB_NORMAL_SIZE 16
#define MIPS_FUNCTION_STUB_BIG_SIZE 20
#define MICROMIPS_FUNCTION_STUB_NORMAL_SIZE 12
#define MICROMIPS_FUNCTION_STUB_BIG_SIZE 16
#define MICROMIPS_INSN32_FUNCTION_STUB_NORMAL_SIZE 16
#define MICROMIPS_INSN32_FUNCTION_STUB_BIG_SIZE 20
/* The name of the dynamic interpreter. This is put in the .interp
section. */
#define ELF_DYNAMIC_INTERPRETER(abfd) \
(ABI_N32_P (abfd) ? "/usr/lib32/libc.so.1" \
: ABI_64_P (abfd) ? "/usr/lib64/libc.so.1" \
: "/usr/lib/libc.so.1")
#ifdef BFD64
#define MNAME(bfd,pre,pos) \
(ABI_64_P (bfd) ? CONCAT4 (pre,64,_,pos) : CONCAT4 (pre,32,_,pos))
#define ELF_R_SYM(bfd, i) \
(ABI_64_P (bfd) ? ELF64_R_SYM (i) : ELF32_R_SYM (i))
#define ELF_R_TYPE(bfd, i) \
(ABI_64_P (bfd) ? ELF64_MIPS_R_TYPE (i) : ELF32_R_TYPE (i))
#define ELF_R_INFO(bfd, s, t) \
(ABI_64_P (bfd) ? ELF64_R_INFO (s, t) : ELF32_R_INFO (s, t))
#else
#define MNAME(bfd,pre,pos) CONCAT4 (pre,32,_,pos)
#define ELF_R_SYM(bfd, i) \
(ELF32_R_SYM (i))
#define ELF_R_TYPE(bfd, i) \
(ELF32_R_TYPE (i))
#define ELF_R_INFO(bfd, s, t) \
(ELF32_R_INFO (s, t))
#endif
/* The mips16 compiler uses a couple of special sections to handle
floating point arguments.
Section names that look like .mips16.fn.FNNAME contain stubs that
copy floating point arguments from the fp regs to the gp regs and
then jump to FNNAME. If any 32 bit function calls FNNAME, the
call should be redirected to the stub instead. If no 32 bit
function calls FNNAME, the stub should be discarded. We need to
consider any reference to the function, not just a call, because
if the address of the function is taken we will need the stub,
since the address might be passed to a 32 bit function.
Section names that look like .mips16.call.FNNAME contain stubs
that copy floating point arguments from the gp regs to the fp
regs and then jump to FNNAME. If FNNAME is a 32 bit function,
then any 16 bit function that calls FNNAME should be redirected
to the stub instead. If FNNAME is not a 32 bit function, the
stub should be discarded.
.mips16.call.fp.FNNAME sections are similar, but contain stubs
which call FNNAME and then copy the return value from the fp regs
to the gp regs. These stubs store the return value in $18 while
calling FNNAME; any function which might call one of these stubs
must arrange to save $18 around the call. (This case is not
needed for 32 bit functions that call 16 bit functions, because
16 bit functions always return floating point values in both
$f0/$f1 and $2/$3.)
Note that in all cases FNNAME might be defined statically.
Therefore, FNNAME is not used literally. Instead, the relocation
information will indicate which symbol the section is for.
We record any stubs that we find in the symbol table. */
#define FN_STUB ".mips16.fn."
#define CALL_STUB ".mips16.call."
#define CALL_FP_STUB ".mips16.call.fp."
#define FN_STUB_P(name) startswith (name, FN_STUB)
#define CALL_STUB_P(name) startswith (name, CALL_STUB)
#define CALL_FP_STUB_P(name) startswith (name, CALL_FP_STUB)
/* The format of the first PLT entry in an O32 executable. */
static const bfd_vma mips_o32_exec_plt0_entry[] =
{
0x3c1c0000, /* lui $28, %hi(&GOTPLT[0]) */
0x8f990000, /* lw $25, %lo(&GOTPLT[0])($28) */
0x279c0000, /* addiu $28, $28, %lo(&GOTPLT[0]) */
0x031cc023, /* subu $24, $24, $28 */
0x03e07825, /* or t7, ra, zero */
0x0018c082, /* srl $24, $24, 2 */
0x0320f809, /* jalr $25 */
0x2718fffe /* subu $24, $24, 2 */
};
/* The format of the first PLT entry in an O32 executable using compact
jumps. */
static const bfd_vma mipsr6_o32_exec_plt0_entry_compact[] =
{
0x3c1c0000, /* lui $28, %hi(&GOTPLT[0]) */
0x8f990000, /* lw $25, %lo(&GOTPLT[0])($28) */
0x279c0000, /* addiu $28, $28, %lo(&GOTPLT[0]) */
0x031cc023, /* subu $24, $24, $28 */
0x03e07821, /* move $15, $31 # 32-bit move (addu) */
0x0018c082, /* srl $24, $24, 2 */
0x2718fffe, /* subu $24, $24, 2 */
0xf8190000 /* jalrc $25 */
};
/* The format of the first PLT entry in an N32 executable. Different
because gp ($28) is not available; we use t2 ($14) instead. */
static const bfd_vma mips_n32_exec_plt0_entry[] =
{
0x3c0e0000, /* lui $14, %hi(&GOTPLT[0]) */
0x8dd90000, /* lw $25, %lo(&GOTPLT[0])($14) */
0x25ce0000, /* addiu $14, $14, %lo(&GOTPLT[0]) */
0x030ec023, /* subu $24, $24, $14 */
0x03e07825, /* or t7, ra, zero */
0x0018c082, /* srl $24, $24, 2 */
0x0320f809, /* jalr $25 */
0x2718fffe /* subu $24, $24, 2 */
};
/* The format of the first PLT entry in an N32 executable using compact
jumps. Different because gp ($28) is not available; we use t2 ($14)
instead. */
static const bfd_vma mipsr6_n32_exec_plt0_entry_compact[] =
{
0x3c0e0000, /* lui $14, %hi(&GOTPLT[0]) */
0x8dd90000, /* lw $25, %lo(&GOTPLT[0])($14) */
0x25ce0000, /* addiu $14, $14, %lo(&GOTPLT[0]) */
0x030ec023, /* subu $24, $24, $14 */
0x03e07821, /* move $15, $31 # 32-bit move (addu) */
0x0018c082, /* srl $24, $24, 2 */
0x2718fffe, /* subu $24, $24, 2 */
0xf8190000 /* jalrc $25 */
};
/* The format of the first PLT entry in an N64 executable. Different
from N32 because of the increased size of GOT entries. */
static const bfd_vma mips_n64_exec_plt0_entry[] =
{
0x3c0e0000, /* lui $14, %hi(&GOTPLT[0]) */
0xddd90000, /* ld $25, %lo(&GOTPLT[0])($14) */
0x25ce0000, /* addiu $14, $14, %lo(&GOTPLT[0]) */
0x030ec023, /* subu $24, $24, $14 */
0x03e07825, /* or t7, ra, zero */
0x0018c0c2, /* srl $24, $24, 3 */
0x0320f809, /* jalr $25 */
0x2718fffe /* subu $24, $24, 2 */
};
/* The format of the first PLT entry in an N64 executable using compact
jumps. Different from N32 because of the increased size of GOT
entries. */
static const bfd_vma mipsr6_n64_exec_plt0_entry_compact[] =
{
0x3c0e0000, /* lui $14, %hi(&GOTPLT[0]) */
0xddd90000, /* ld $25, %lo(&GOTPLT[0])($14) */
0x25ce0000, /* addiu $14, $14, %lo(&GOTPLT[0]) */
0x030ec023, /* subu $24, $24, $14 */
0x03e0782d, /* move $15, $31 # 64-bit move (daddu) */
0x0018c0c2, /* srl $24, $24, 3 */
0x2718fffe, /* subu $24, $24, 2 */
0xf8190000 /* jalrc $25 */
};
/* The format of the microMIPS first PLT entry in an O32 executable.
We rely on v0 ($2) rather than t8 ($24) to contain the address
of the GOTPLT entry handled, so this stub may only be used when
all the subsequent PLT entries are microMIPS code too.
The trailing NOP is for alignment and correct disassembly only. */
static const bfd_vma micromips_o32_exec_plt0_entry[] =
{
0x7980, 0x0000, /* addiupc $3, (&GOTPLT[0]) - . */
0xff23, 0x0000, /* lw $25, 0($3) */
0x0535, /* subu $2, $2, $3 */
0x2525, /* srl $2, $2, 2 */
0x3302, 0xfffe, /* subu $24, $2, 2 */
0x0dff, /* move $15, $31 */
0x45f9, /* jalrs $25 */
0x0f83, /* move $28, $3 */
0x0c00 /* nop */
};
/* The format of the microMIPS first PLT entry in an O32 executable
in the insn32 mode. */
static const bfd_vma micromips_insn32_o32_exec_plt0_entry[] =
{
0x41bc, 0x0000, /* lui $28, %hi(&GOTPLT[0]) */
0xff3c, 0x0000, /* lw $25, %lo(&GOTPLT[0])($28) */
0x339c, 0x0000, /* addiu $28, $28, %lo(&GOTPLT[0]) */
0x0398, 0xc1d0, /* subu $24, $24, $28 */
0x001f, 0x7a90, /* or $15, $31, zero */
0x0318, 0x1040, /* srl $24, $24, 2 */
0x03f9, 0x0f3c, /* jalr $25 */
0x3318, 0xfffe /* subu $24, $24, 2 */
};
/* The format of subsequent standard PLT entries. */
static const bfd_vma mips_exec_plt_entry[] =
{
0x3c0f0000, /* lui $15, %hi(.got.plt entry) */
0x01f90000, /* l[wd] $25, %lo(.got.plt entry)($15) */
0x25f80000, /* addiu $24, $15, %lo(.got.plt entry) */
0x03200008 /* jr $25 */
};
static const bfd_vma mipsr6_exec_plt_entry[] =
{
0x3c0f0000, /* lui $15, %hi(.got.plt entry) */
0x01f90000, /* l[wd] $25, %lo(.got.plt entry)($15) */
0x25f80000, /* addiu $24, $15, %lo(.got.plt entry) */
0x03200009 /* jr $25 */
};
static const bfd_vma mipsr6_exec_plt_entry_compact[] =
{
0x3c0f0000, /* lui $15, %hi(.got.plt entry) */
0x01f90000, /* l[wd] $25, %lo(.got.plt entry)($15) */
0x25f80000, /* addiu $24, $15, %lo(.got.plt entry) */
0xd8190000 /* jic $25, 0 */
};
/* The format of subsequent MIPS16 o32 PLT entries. We use v0 ($2)
and v1 ($3) as temporaries because t8 ($24) and t9 ($25) are not
directly addressable. */
static const bfd_vma mips16_o32_exec_plt_entry[] =
{
0xb203, /* lw $2, 12($pc) */
0x9a60, /* lw $3, 0($2) */
0x651a, /* move $24, $2 */
0xeb00, /* jr $3 */
0x653b, /* move $25, $3 */
0x6500, /* nop */
0x0000, 0x0000 /* .word (.got.plt entry) */
};
/* The format of subsequent microMIPS o32 PLT entries. We use v0 ($2)
as a temporary because t8 ($24) is not addressable with ADDIUPC. */
static const bfd_vma micromips_o32_exec_plt_entry[] =
{
0x7900, 0x0000, /* addiupc $2, (.got.plt entry) - . */
0xff22, 0x0000, /* lw $25, 0($2) */
0x4599, /* jr $25 */
0x0f02 /* move $24, $2 */
};
/* The format of subsequent microMIPS o32 PLT entries in the insn32 mode. */
static const bfd_vma micromips_insn32_o32_exec_plt_entry[] =
{
0x41af, 0x0000, /* lui $15, %hi(.got.plt entry) */
0xff2f, 0x0000, /* lw $25, %lo(.got.plt entry)($15) */
0x0019, 0x0f3c, /* jr $25 */
0x330f, 0x0000 /* addiu $24, $15, %lo(.got.plt entry) */
};
/* The format of the first PLT entry in a VxWorks executable. */
static const bfd_vma mips_vxworks_exec_plt0_entry[] =
{
0x3c190000, /* lui t9, %hi(_GLOBAL_OFFSET_TABLE_) */
0x27390000, /* addiu t9, t9, %lo(_GLOBAL_OFFSET_TABLE_) */
0x8f390008, /* lw t9, 8(t9) */
0x00000000, /* nop */
0x03200008, /* jr t9 */
0x00000000 /* nop */
};
/* The format of subsequent PLT entries. */
static const bfd_vma mips_vxworks_exec_plt_entry[] =
{
0x10000000, /* b .PLT_resolver */
0x24180000, /* li t8, <pltindex> */
0x3c190000, /* lui t9, %hi(<.got.plt slot>) */
0x27390000, /* addiu t9, t9, %lo(<.got.plt slot>) */
0x8f390000, /* lw t9, 0(t9) */
0x00000000, /* nop */
0x03200008, /* jr t9 */
0x00000000 /* nop */
};
/* The format of the first PLT entry in a VxWorks shared object. */
static const bfd_vma mips_vxworks_shared_plt0_entry[] =
{
0x8f990008, /* lw t9, 8(gp) */
0x00000000, /* nop */
0x03200008, /* jr t9 */
0x00000000, /* nop */
0x00000000, /* nop */
0x00000000 /* nop */
};
/* The format of subsequent PLT entries. */
static const bfd_vma mips_vxworks_shared_plt_entry[] =
{
0x10000000, /* b .PLT_resolver */
0x24180000 /* li t8, <pltindex> */
};
/* microMIPS 32-bit opcode helper installer. */
static void
bfd_put_micromips_32 (const bfd *abfd, bfd_vma opcode, bfd_byte *ptr)
{
bfd_put_16 (abfd, (opcode >> 16) & 0xffff, ptr);
bfd_put_16 (abfd, opcode & 0xffff, ptr + 2);
}
/* microMIPS 32-bit opcode helper retriever. */
static bfd_vma
bfd_get_micromips_32 (const bfd *abfd, const bfd_byte *ptr)
{
return (bfd_get_16 (abfd, ptr) << 16) | bfd_get_16 (abfd, ptr + 2);
}
/* Look up an entry in a MIPS ELF linker hash table. */
#define mips_elf_link_hash_lookup(table, string, create, copy, follow) \
((struct mips_elf_link_hash_entry *) \
elf_link_hash_lookup (&(table)->root, (string), (create), \
(copy), (follow)))
/* Traverse a MIPS ELF linker hash table. */
#define mips_elf_link_hash_traverse(table, func, info) \
(elf_link_hash_traverse \
(&(table)->root, \
(bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
(info)))
/* Find the base offsets for thread-local storage in this object,
for GD/LD and IE/LE respectively. */
#define TP_OFFSET 0x7000
#define DTP_OFFSET 0x8000
static bfd_vma
dtprel_base (struct bfd_link_info *info)
{
/* If tls_sec is NULL, we should have signalled an error already. */
if (elf_hash_table (info)->tls_sec == NULL)
return 0;
return elf_hash_table (info)->tls_sec->vma + DTP_OFFSET;
}
static bfd_vma
tprel_base (struct bfd_link_info *info)
{
/* If tls_sec is NULL, we should have signalled an error already. */
if (elf_hash_table (info)->tls_sec == NULL)
return 0;
return elf_hash_table (info)->tls_sec->vma + TP_OFFSET;
}
/* Create an entry in a MIPS ELF linker hash table. */
static struct bfd_hash_entry *
mips_elf_link_hash_newfunc (struct bfd_hash_entry *entry,
struct bfd_hash_table *table, const char *string)
{
struct mips_elf_link_hash_entry *ret =
(struct mips_elf_link_hash_entry *) entry;
/* Allocate the structure if it has not already been allocated by a
subclass. */
if (ret == NULL)
ret = bfd_hash_allocate (table, sizeof (struct mips_elf_link_hash_entry));
if (ret == NULL)
return (struct bfd_hash_entry *) ret;
/* Call the allocation method of the superclass. */
ret = ((struct mips_elf_link_hash_entry *)
_bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
table, string));
if (ret != NULL)
{
/* Set local fields. */
memset (&ret->esym, 0, sizeof (EXTR));
/* We use -2 as a marker to indicate that the information has
not been set. -1 means there is no associated ifd. */
ret->esym.ifd = -2;
ret->la25_stub = 0;
ret->possibly_dynamic_relocs = 0;
ret->fn_stub = NULL;
ret->call_stub = NULL;
ret->call_fp_stub = NULL;
ret->mipsxhash_loc = 0;
ret->global_got_area = GGA_NONE;
ret->got_only_for_calls = TRUE;
ret->readonly_reloc = FALSE;
ret->has_static_relocs = FALSE;
ret->no_fn_stub = FALSE;
ret->need_fn_stub = FALSE;
ret->has_nonpic_branches = FALSE;
ret->needs_lazy_stub = FALSE;
ret->use_plt_entry = FALSE;
}
return (struct bfd_hash_entry *) ret;
}
/* Allocate MIPS ELF private object data. */
bfd_boolean
_bfd_mips_elf_mkobject (bfd *abfd)
{
return bfd_elf_allocate_object (abfd, sizeof (struct mips_elf_obj_tdata),
MIPS_ELF_DATA);
}
bfd_boolean
_bfd_mips_elf_new_section_hook (bfd *abfd, asection *sec)
{
if (!sec->used_by_bfd)
{
struct _mips_elf_section_data *sdata;
size_t amt = sizeof (*sdata);
sdata = bfd_zalloc (abfd, amt);
if (sdata == NULL)
return FALSE;
sec->used_by_bfd = sdata;
}
return _bfd_elf_new_section_hook (abfd, sec);
}
/* Read ECOFF debugging information from a .mdebug section into a
ecoff_debug_info structure. */
bfd_boolean
_bfd_mips_elf_read_ecoff_info (bfd *abfd, asection *section,
struct ecoff_debug_info *debug)
{
HDRR *symhdr;
const struct ecoff_debug_swap *swap;
char *ext_hdr;
swap = get_elf_backend_data (abfd)->elf_backend_ecoff_debug_swap;
memset (debug, 0, sizeof (*debug));
ext_hdr = bfd_malloc (swap->external_hdr_size);
if (ext_hdr == NULL && swap->external_hdr_size != 0)
goto error_return;
if (! bfd_get_section_contents (abfd, section, ext_hdr, 0,
swap->external_hdr_size))
goto error_return;
symhdr = &debug->symbolic_header;
(*swap->swap_hdr_in) (abfd, ext_hdr, symhdr);
/* The symbolic header contains absolute file offsets and sizes to
read. */
#define READ(ptr, offset, count, size, type) \
do \
{ \
size_t amt; \
debug->ptr = NULL; \
if (symhdr->count == 0) \
break; \
if (_bfd_mul_overflow (size, symhdr->count, &amt)) \
{ \
bfd_set_error (bfd_error_file_too_big); \
goto error_return; \
} \
if (bfd_seek (abfd, symhdr->offset, SEEK_SET) != 0) \
goto error_return; \
debug->ptr = (type) _bfd_malloc_and_read (abfd, amt, amt); \
if (debug->ptr == NULL) \
goto error_return; \
} while (0)
READ (line, cbLineOffset, cbLine, sizeof (unsigned char), unsigned char *);
READ (external_dnr, cbDnOffset, idnMax, swap->external_dnr_size, void *);
READ (external_pdr, cbPdOffset, ipdMax, swap->external_pdr_size, void *);
READ (external_sym, cbSymOffset, isymMax, swap->external_sym_size, void *);
READ (external_opt, cbOptOffset, ioptMax, swap->external_opt_size, void *);
READ (external_aux, cbAuxOffset, iauxMax, sizeof (union aux_ext),
union aux_ext *);
READ (ss, cbSsOffset, issMax, sizeof (char), char *);
READ (ssext, cbSsExtOffset, issExtMax, sizeof (char), char *);
READ (external_fdr, cbFdOffset, ifdMax, swap->external_fdr_size, void *);
READ (external_rfd, cbRfdOffset, crfd, swap->external_rfd_size, void *);
READ (external_ext, cbExtOffset, iextMax, swap->external_ext_size, void *);
#undef READ
debug->fdr = NULL;
return TRUE;
error_return:
free (ext_hdr);
free (debug->line);
free (debug->external_dnr);
free (debug->external_pdr);
free (debug->external_sym);
free (debug->external_opt);
free (debug->external_aux);
free (debug->ss);
free (debug->ssext);
free (debug->external_fdr);
free (debug->external_rfd);
free (debug->external_ext);
return FALSE;
}
/* Swap RPDR (runtime procedure table entry) for output. */
static void
ecoff_swap_rpdr_out (bfd *abfd, const RPDR *in, struct rpdr_ext *ex)
{
H_PUT_S32 (abfd, in->adr, ex->p_adr);
H_PUT_32 (abfd, in->regmask, ex->p_regmask);
H_PUT_32 (abfd, in->regoffset, ex->p_regoffset);
H_PUT_32 (abfd, in->fregmask, ex->p_fregmask);
H_PUT_32 (abfd, in->fregoffset, ex->p_fregoffset);
H_PUT_32 (abfd, in->frameoffset, ex->p_frameoffset);
H_PUT_16 (abfd, in->framereg, ex->p_framereg);
H_PUT_16 (abfd, in->pcreg, ex->p_pcreg);
H_PUT_32 (abfd, in->irpss, ex->p_irpss);
}
/* Create a runtime procedure table from the .mdebug section. */
static bfd_boolean
mips_elf_create_procedure_table (void *handle, bfd *abfd,
struct bfd_link_info *info, asection *s,
struct ecoff_debug_info *debug)
{
const struct ecoff_debug_swap *swap;
HDRR *hdr = &debug->symbolic_header;
RPDR *rpdr, *rp;
struct rpdr_ext *erp;
void *rtproc;
struct pdr_ext *epdr;
struct sym_ext *esym;
char *ss, **sv;
char *str;
bfd_size_type size;
bfd_size_type count;
unsigned long sindex;
unsigned long i;
PDR pdr;
SYMR sym;
const char *no_name_func = _("static procedure (no name)");
epdr = NULL;
rpdr = NULL;
esym = NULL;
ss = NULL;
sv = NULL;
swap = get_elf_backend_data (abfd)->elf_backend_ecoff_debug_swap;
sindex = strlen (no_name_func) + 1;
count = hdr->ipdMax;
if (count > 0)
{
size = swap->external_pdr_size;
epdr = bfd_malloc (size * count);
if (epdr == NULL)
goto error_return;
if (! _bfd_ecoff_get_accumulated_pdr (handle, (bfd_byte *) epdr))
goto error_return;
size = sizeof (RPDR);
rp = rpdr = bfd_malloc (size * count);
if (rpdr == NULL)
goto error_return;
size = sizeof (char *);
sv = bfd_malloc (size * count);
if (sv == NULL)
goto error_return;
count = hdr->isymMax;
size = swap->external_sym_size;
esym = bfd_malloc (size * count);
if (esym == NULL)
goto error_return;
if (! _bfd_ecoff_get_accumulated_sym (handle, (bfd_byte *) esym))
goto error_return;
count = hdr->issMax;
ss = bfd_malloc (count);
if (ss == NULL)
goto error_return;
if (! _bfd_ecoff_get_accumulated_ss (handle, (bfd_byte *) ss))
goto error_return;
count = hdr->ipdMax;
for (i = 0; i < (unsigned long) count; i++, rp++)
{
(*swap->swap_pdr_in) (abfd, epdr + i, &pdr);
(*swap->swap_sym_in) (abfd, &esym[pdr.isym], &sym);
rp->adr = sym.value;
rp->regmask = pdr.regmask;
rp->regoffset = pdr.regoffset;
rp->fregmask = pdr.fregmask;
rp->fregoffset = pdr.fregoffset;
rp->frameoffset = pdr.frameoffset;
rp->framereg = pdr.framereg;
rp->pcreg = pdr.pcreg;
rp->irpss = sindex;
sv[i] = ss + sym.iss;
sindex += strlen (sv[i]) + 1;
}
}
size = sizeof (struct rpdr_ext) * (count + 2) + sindex;
size = BFD_ALIGN (size, 16);
rtproc = bfd_alloc (abfd, size);
if (rtproc == NULL)
{
mips_elf_hash_table (info)->procedure_count = 0;
goto error_return;
}
mips_elf_hash_table (info)->procedure_count = count + 2;
erp = rtproc;
memset (erp, 0, sizeof (struct rpdr_ext));
erp++;
str = (char *) rtproc + sizeof (struct rpdr_ext) * (count + 2);
strcpy (str, no_name_func);
str += strlen (no_name_func) + 1;
for (i = 0; i < count; i++)
{
ecoff_swap_rpdr_out (abfd, rpdr + i, erp + i);
strcpy (str, sv[i]);
str += strlen (sv[i]) + 1;
}
H_PUT_S32 (abfd, -1, (erp + count)->p_adr);
/* Set the size and contents of .rtproc section. */
s->size = size;
s->contents = rtproc;
/* Skip this section later on (I don't think this currently
matters, but someday it might). */
s->map_head.link_order = NULL;
free (epdr);
free (rpdr);
free (esym);
free (ss);
free (sv);
return TRUE;
error_return:
free (epdr);
free (rpdr);
free (esym);
free (ss);
free (sv);
return FALSE;
}
/* We're going to create a stub for H. Create a symbol for the stub's
value and size, to help make the disassembly easier to read. */
static bfd_boolean
mips_elf_create_stub_symbol (struct bfd_link_info *info,
struct mips_elf_link_hash_entry *h,
const char *prefix, asection *s, bfd_vma value,
bfd_vma size)
{
bfd_boolean micromips_p = ELF_ST_IS_MICROMIPS (h->root.other);
struct bfd_link_hash_entry *bh;
struct elf_link_hash_entry *elfh;
char *name;
bfd_boolean res;
if (micromips_p)
value |= 1;
/* Create a new symbol. */
name = concat (prefix, h->root.root.root.string, NULL);
bh = NULL;
res = _bfd_generic_link_add_one_symbol (info, s->owner, name,
BSF_LOCAL, s, value, NULL,
TRUE, FALSE, &bh);
free (name);
if (! res)
return FALSE;
/* Make it a local function. */
elfh = (struct elf_link_hash_entry *) bh;
elfh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
elfh->size = size;
elfh->forced_local = 1;
if (micromips_p)
elfh->other = ELF_ST_SET_MICROMIPS (elfh->other);
return TRUE;
}
/* We're about to redefine H. Create a symbol to represent H's
current value and size, to help make the disassembly easier
to read. */
static bfd_boolean
mips_elf_create_shadow_symbol (struct bfd_link_info *info,
struct mips_elf_link_hash_entry *h,
const char *prefix)
{
struct bfd_link_hash_entry *bh;
struct elf_link_hash_entry *elfh;
char *name;
asection *s;
bfd_vma value;
bfd_boolean res;
/* Read the symbol's value. */
BFD_ASSERT (h->root.root.type == bfd_link_hash_defined
|| h->root.root.type == bfd_link_hash_defweak);
s = h->root.root.u.def.section;
value = h->root.root.u.def.value;
/* Create a new symbol. */
name = concat (prefix, h->root.root.root.string, NULL);
bh = NULL;
res = _bfd_generic_link_add_one_symbol (info, s->owner, name,
BSF_LOCAL, s, value, NULL,
TRUE, FALSE, &bh);
free (name);
if (! res)
return FALSE;
/* Make it local and copy the other attributes from H. */
elfh = (struct elf_link_hash_entry *) bh;
elfh->type = ELF_ST_INFO (STB_LOCAL, ELF_ST_TYPE (h->root.type));
elfh->other = h->root.other;
elfh->size = h->root.size;
elfh->forced_local = 1;
return TRUE;
}
/* Return TRUE if relocations in SECTION can refer directly to a MIPS16
function rather than to a hard-float stub. */
static bfd_boolean
section_allows_mips16_refs_p (asection *section)
{
const char *name;
name = bfd_section_name (section);
return (FN_STUB_P (name)
|| CALL_STUB_P (name)
|| CALL_FP_STUB_P (name)
|| strcmp (name, ".pdr") == 0);
}
/* [RELOCS, RELEND) are the relocations against SEC, which is a MIPS16
stub section of some kind. Return the R_SYMNDX of the target
function, or 0 if we can't decide which function that is. */
static unsigned long
mips16_stub_symndx (const struct elf_backend_data *bed,
asection *sec ATTRIBUTE_UNUSED,
const Elf_Internal_Rela *relocs,
const Elf_Internal_Rela *relend)
{
int int_rels_per_ext_rel = bed->s->int_rels_per_ext_rel;
const Elf_Internal_Rela *rel;
/* Trust the first R_MIPS_NONE relocation, if any, but not a subsequent
one in a compound relocation. */
for (rel = relocs; rel < relend; rel += int_rels_per_ext_rel)
if (ELF_R_TYPE (sec->owner, rel->r_info) == R_MIPS_NONE)
return ELF_R_SYM (sec->owner, rel->r_info);
/* Otherwise trust the first relocation, whatever its kind. This is
the traditional behavior. */
if (relocs < relend)
return ELF_R_SYM (sec->owner, relocs->r_info);
return 0;
}
/* Check the mips16 stubs for a particular symbol, and see if we can
discard them. */
static void
mips_elf_check_mips16_stubs (struct bfd_link_info *info,
struct mips_elf_link_hash_entry *h)
{
/* Dynamic symbols must use the standard call interface, in case other
objects try to call them. */
if (h->fn_stub != NULL
&& h->root.dynindx != -1)
{
mips_elf_create_shadow_symbol (info, h, ".mips16.");
h->need_fn_stub = TRUE;
}
if (h->fn_stub != NULL
&& ! h->need_fn_stub)
{
/* We don't need the fn_stub; the only references to this symbol
are 16 bit calls. Clobber the size to 0 to prevent it from
being included in the link. */
h->fn_stub->size = 0;
h->fn_stub->flags &= ~SEC_RELOC;
h->fn_stub->reloc_count = 0;
h->fn_stub->flags |= SEC_EXCLUDE;
h->fn_stub->output_section = bfd_abs_section_ptr;
}
if (h->call_stub != NULL
&& ELF_ST_IS_MIPS16 (h->root.other))
{
/* We don't need the call_stub; this is a 16 bit function, so
calls from other 16 bit functions are OK. Clobber the size
to 0 to prevent it from being included in the link. */
h->call_stub->size = 0;
h->call_stub->flags &= ~SEC_RELOC;
h->call_stub->reloc_count = 0;
h->call_stub->flags |= SEC_EXCLUDE;
h->call_stub->output_section = bfd_abs_section_ptr;
}
if (h->call_fp_stub != NULL
&& ELF_ST_IS_MIPS16 (h->root.other))
{
/* We don't need the call_stub; this is a 16 bit function, so
calls from other 16 bit functions are OK. Clobber the size
to 0 to prevent it from being included in the link. */
h->call_fp_stub->size = 0;
h->call_fp_stub->flags &= ~SEC_RELOC;
h->call_fp_stub->reloc_count = 0;
h->call_fp_stub->flags |= SEC_EXCLUDE;
h->call_fp_stub->output_section = bfd_abs_section_ptr;
}
}
/* Hashtable callbacks for mips_elf_la25_stubs. */
static hashval_t
mips_elf_la25_stub_hash (const void *entry_)
{
const struct mips_elf_la25_stub *entry;
entry = (struct mips_elf_la25_stub *) entry_;
return entry->h->root.root.u.def.section->id
+ entry->h->root.root.u.def.value;
}
static int
mips_elf_la25_stub_eq (const void *entry1_, const void *entry2_)
{
const struct mips_elf_la25_stub *entry1, *entry2;
entry1 = (struct mips_elf_la25_stub *) entry1_;
entry2 = (struct mips_elf_la25_stub *) entry2_;
return ((entry1->h->root.root.u.def.section
== entry2->h->root.root.u.def.section)
&& (entry1->h->root.root.u.def.value
== entry2->h->root.root.u.def.value));
}
/* Called by the linker to set up the la25 stub-creation code. FN is
the linker's implementation of add_stub_function. Return true on
success. */
bfd_boolean
_bfd_mips_elf_init_stubs (struct bfd_link_info *info,
asection *(*fn) (const char *, asection *,
asection *))
{
struct mips_elf_link_hash_table *htab;
htab = mips_elf_hash_table (info);
if (htab == NULL)
return FALSE;
htab->add_stub_section = fn;
htab->la25_stubs = htab_try_create (1, mips_elf_la25_stub_hash,
mips_elf_la25_stub_eq, NULL);
if (htab->la25_stubs == NULL)
return FALSE;
return TRUE;
}
/* Return true if H is a locally-defined PIC function, in the sense
that it or its fn_stub might need $25 to be valid on entry.
Note that MIPS16 functions set up $gp using PC-relative instructions,
so they themselves never need $25 to be valid. Only non-MIPS16
entry points are of interest here. */
static bfd_boolean
mips_elf_local_pic_function_p (struct mips_elf_link_hash_entry *h)
{
return ((h->root.root.type == bfd_link_hash_defined
|| h->root.root.type == bfd_link_hash_defweak)
&& h->root.def_regular
&& !bfd_is_abs_section (h->root.root.u.def.section)
&& !bfd_is_und_section (h->root.root.u.def.section)
&& (!ELF_ST_IS_MIPS16 (h->root.other)
|| (h->fn_stub && h->need_fn_stub))
&& (PIC_OBJECT_P (h->root.root.u.def.section->owner)
|| ELF_ST_IS_MIPS_PIC (h->root.other)));
}
/* Set *SEC to the input section that contains the target of STUB.
Return the offset of the target from the start of that section. */
static bfd_vma
mips_elf_get_la25_target (struct mips_elf_la25_stub *stub,
asection **sec)
{
if (ELF_ST_IS_MIPS16 (stub->h->root.other))
{
BFD_ASSERT (stub->h->need_fn_stub);
*sec = stub->h->fn_stub;
return 0;
}
else
{
*sec = stub->h->root.root.u.def.section;
return stub->h->root.root.u.def.value;
}
}
/* STUB describes an la25 stub that we have decided to implement
by inserting an LUI/ADDIU pair before the target function.
Create the section and redirect the function symbol to it. */
static bfd_boolean
mips_elf_add_la25_intro (struct mips_elf_la25_stub *stub,
struct bfd_link_info *info)
{
struct mips_elf_link_hash_table *htab;
char *name;
asection *s, *input_section;
unsigned int align;
htab = mips_elf_hash_table (info);
if (htab == NULL)
return FALSE;
/* Create a unique name for the new section. */
name = bfd_malloc (11 + sizeof (".text.stub."));
if (name == NULL)
return FALSE;
sprintf (name, ".text.stub.%d", (int) htab_elements (htab->la25_stubs));
/* Create the section. */
mips_elf_get_la25_target (stub, &input_section);
s = htab->add_stub_section (name, input_section,
input_section->output_section);
if (s == NULL)
return FALSE;
/* Make sure that any padding goes before the stub. */
align = input_section->alignment_power;
if (!bfd_set_section_alignment (s, align))
return FALSE;
if (align > 3)
s->size = (1 << align) - 8;
/* Create a symbol for the stub. */
mips_elf_create_stub_symbol (info, stub->h, ".pic.", s, s->size, 8);
stub->stub_section = s;
stub->offset = s->size;
/* Allocate room for it. */
s->size += 8;
return TRUE;
}
/* STUB describes an la25 stub that we have decided to implement
with a separate trampoline. Allocate room for it and redirect
the function symbol to it. */
static bfd_boolean
mips_elf_add_la25_trampoline (struct mips_elf_la25_stub *stub,
struct bfd_link_info *info)
{
struct mips_elf_link_hash_table *htab;
asection *s;
htab = mips_elf_hash_table (info);
if (htab == NULL)
return FALSE;
/* Create a trampoline section, if we haven't already. */
s = htab->strampoline;
if (s == NULL)
{
asection *input_section = stub->h->root.root.u.def.section;
s = htab->add_stub_section (".text", NULL,
input_section->output_section);
if (s == NULL || !bfd_set_section_alignment (s, 4))
return FALSE;
htab->strampoline = s;
}
/* Create a symbol for the stub. */
mips_elf_create_stub_symbol (info, stub->h, ".pic.", s, s->size, 16);
stub->stub_section = s;
stub->offset = s->size;
/* Allocate room for it. */
s->size += 16;
return TRUE;
}
/* H describes a symbol that needs an la25 stub. Make sure that an
appropriate stub exists and point H at it. */
static bfd_boolean
mips_elf_add_la25_stub (struct bfd_link_info *info,
struct mips_elf_link_hash_entry *h)
{
struct mips_elf_link_hash_table *htab;
struct mips_elf_la25_stub search, *stub;
bfd_boolean use_trampoline_p;
asection *s;
bfd_vma value;
void **slot;
/* Describe the stub we want. */
search.stub_section = NULL;
search.offset = 0;
search.h = h;
/* See if we've already created an equivalent stub. */
htab = mips_elf_hash_table (info);
if (htab == NULL)
return FALSE;
slot = htab_find_slot (htab->la25_stubs, &search, INSERT);
if (slot == NULL)
return FALSE;
stub = (struct mips_elf_la25_stub *) *slot;
if (stub != NULL)
{
/* We can reuse the existing stub. */
h->la25_stub = stub;
return TRUE;
}
/* Create a permanent copy of ENTRY and add it to the hash table. */
stub = bfd_malloc (sizeof (search));
if (stub == NULL)
return FALSE;
*stub = search;
*slot = stub;
/* Prefer to use LUI/ADDIU stubs if the function is at the beginning
of the section and if we would need no more than 2 nops. */
value = mips_elf_get_la25_target (stub, &s);
if (ELF_ST_IS_MICROMIPS (stub->h->root.other))
value &= ~1;
use_trampoline_p = (value != 0 || s->alignment_power > 4);
h->la25_stub = stub;
return (use_trampoline_p
? mips_elf_add_la25_trampoline (stub, info)
: mips_elf_add_la25_intro (stub, info));
}
/* A mips_elf_link_hash_traverse callback that is called before sizing
sections. DATA points to a mips_htab_traverse_info structure. */
static bfd_boolean
mips_elf_check_symbols (struct mips_elf_link_hash_entry *h, void *data)
{
struct mips_htab_traverse_info *hti;
hti = (struct mips_htab_traverse_info *) data;
if (!bfd_link_relocatable (hti->info))
mips_elf_check_mips16_stubs (hti->info, h);
if (mips_elf_local_pic_function_p (h))
{
/* PR 12845: If H is in a section that has been garbage
collected it will have its output section set to *ABS*. */
if (bfd_is_abs_section (h->root.root.u.def.section->output_section))
return TRUE;
/* H is a function that might need $25 to be valid on entry.
If we're creating a non-PIC relocatable object, mark H as
being PIC. If we're creating a non-relocatable object with
non-PIC branches and jumps to H, make sure that H has an la25
stub. */
if (bfd_link_relocatable (hti->info))
{
if (!PIC_OBJECT_P (hti->output_bfd))
h->root.other = ELF_ST_SET_MIPS_PIC (h->root.other);
}
else if (h->has_nonpic_branches && !mips_elf_add_la25_stub (hti->info, h))
{
hti->error = TRUE;
return FALSE;
}
}
return TRUE;
}
/* R_MIPS16_26 is used for the mips16 jal and jalx instructions.
Most mips16 instructions are 16 bits, but these instructions
are 32 bits.
The format of these instructions is:
+--------------+--------------------------------+
| JALX | X| Imm 20:16 | Imm 25:21 |
+--------------+--------------------------------+
| Immediate 15:0 |
+-----------------------------------------------+
JALX is the 5-bit value 00011. X is 0 for jal, 1 for jalx.
Note that the immediate value in the first word is swapped.
When producing a relocatable object file, R_MIPS16_26 is
handled mostly like R_MIPS_26. In particular, the addend is
stored as a straight 26-bit value in a 32-bit instruction.
(gas makes life simpler for itself by never adjusting a
R_MIPS16_26 reloc to be against a section, so the addend is
always zero). However, the 32 bit instruction is stored as 2
16-bit values, rather than a single 32-bit value. In a
big-endian file, the result is the same; in a little-endian
file, the two 16-bit halves of the 32 bit value are swapped.
This is so that a disassembler can recognize the jal
instruction.
When doing a final link, R_MIPS16_26 is treated as a 32 bit
instruction stored as two 16-bit values. The addend A is the
contents of the targ26 field. The calculation is the same as
R_MIPS_26. When storing the calculated value, reorder the
immediate value as shown above, and don't forget to store the
value as two 16-bit values.
To put it in MIPS ABI terms, the relocation field is T-targ26-16,
defined as
big-endian:
+--------+----------------------+
| | |
| | targ26-16 |
|31 26|25 0|
+--------+----------------------+
little-endian:
+----------+------+-------------+
| | | |
| sub1 | | sub2 |
|0 9|10 15|16 31|
+----------+--------------------+
where targ26-16 is sub1 followed by sub2 (i.e., the addend field A is
((sub1 << 16) | sub2)).
When producing a relocatable object file, the calculation is
(((A < 2) | ((P + 4) & 0xf0000000) + S) >> 2)
When producing a fully linked file, the calculation is
let R = (((A < 2) | ((P + 4) & 0xf0000000) + S) >> 2)
((R & 0x1f0000) << 5) | ((R & 0x3e00000) >> 5) | (R & 0xffff)
The table below lists the other MIPS16 instruction relocations.
Each one is calculated in the same way as the non-MIPS16 relocation
given on the right, but using the extended MIPS16 layout of 16-bit
immediate fields:
R_MIPS16_GPREL R_MIPS_GPREL16
R_MIPS16_GOT16 R_MIPS_GOT16
R_MIPS16_CALL16 R_MIPS_CALL16
R_MIPS16_HI16 R_MIPS_HI16
R_MIPS16_LO16 R_MIPS_LO16
A typical instruction will have a format like this:
+--------------+--------------------------------+
| EXTEND | Imm 10:5 | Imm 15:11 |
+--------------+--------------------------------+
| Major | rx | ry | Imm 4:0 |
+--------------+--------------------------------+
EXTEND is the five bit value 11110. Major is the instruction
opcode.
All we need to do here is shuffle the bits appropriately.
As above, the two 16-bit halves must be swapped on a
little-endian system.
Finally R_MIPS16_PC16_S1 corresponds to R_MIPS_PC16, however the
relocatable field is shifted by 1 rather than 2 and the same bit
shuffling is done as with the relocations above. */
static inline bfd_boolean
mips16_reloc_p (int r_type)
{
switch (r_type)
{
case R_MIPS16_26:
case R_MIPS16_GPREL:
case R_MIPS16_GOT16:
case R_MIPS16_CALL16:
case R_MIPS16_HI16:
case R_MIPS16_LO16:
case R_MIPS16_TLS_GD:
case R_MIPS16_TLS_LDM:
case R_MIPS16_TLS_DTPREL_HI16:
case R_MIPS16_TLS_DTPREL_LO16:
case R_MIPS16_TLS_GOTTPREL:
case R_MIPS16_TLS_TPREL_HI16:
case R_MIPS16_TLS_TPREL_LO16:
case R_MIPS16_PC16_S1:
return TRUE;
default:
return FALSE;
}
}
/* Check if a microMIPS reloc. */
static inline bfd_boolean
micromips_reloc_p (unsigned int r_type)
{
return r_type >= R_MICROMIPS_min && r_type < R_MICROMIPS_max;
}
/* Similar to MIPS16, the two 16-bit halves in microMIPS must be swapped
on a little-endian system. This does not apply to R_MICROMIPS_PC7_S1
and R_MICROMIPS_PC10_S1 relocs that apply to 16-bit instructions. */
static inline bfd_boolean
micromips_reloc_shuffle_p (unsigned int r_type)
{
return (micromips_reloc_p (r_type)
&& r_type != R_MICROMIPS_PC7_S1
&& r_type != R_MICROMIPS_PC10_S1);
}
static inline bfd_boolean
got16_reloc_p (int r_type)
{
return (r_type == R_MIPS_GOT16
|| r_type == R_MIPS16_GOT16
|| r_type == R_MICROMIPS_GOT16);
}
static inline bfd_boolean
call16_reloc_p (int r_type)
{
return (r_type == R_MIPS_CALL16
|| r_type == R_MIPS16_CALL16
|| r_type == R_MICROMIPS_CALL16);
}
static inline bfd_boolean
got_disp_reloc_p (unsigned int r_type)
{
return r_type == R_MIPS_GOT_DISP || r_type == R_MICROMIPS_GOT_DISP;
}
static inline bfd_boolean
got_page_reloc_p (unsigned int r_type)
{
return r_type == R_MIPS_GOT_PAGE || r_type == R_MICROMIPS_GOT_PAGE;
}
static inline bfd_boolean
got_lo16_reloc_p (unsigned int r_type)
{
return r_type == R_MIPS_GOT_LO16 || r_type == R_MICROMIPS_GOT_LO16;
}
static inline bfd_boolean
call_hi16_reloc_p (unsigned int r_type)
{
return r_type == R_MIPS_CALL_HI16 || r_type == R_MICROMIPS_CALL_HI16;
}
static inline bfd_boolean
call_lo16_reloc_p (unsigned int r_type)
{
return r_type == R_MIPS_CALL_LO16 || r_type == R_MICROMIPS_CALL_LO16;
}
static inline bfd_boolean
hi16_reloc_p (int r_type)
{
return (r_type == R_MIPS_HI16
|| r_type == R_MIPS16_HI16
|| r_type == R_MICROMIPS_HI16
|| r_type == R_MIPS_PCHI16);
}
static inline bfd_boolean
lo16_reloc_p (int r_type)
{
return (r_type == R_MIPS_LO16
|| r_type == R_MIPS16_LO16
|| r_type == R_MICROMIPS_LO16
|| r_type == R_MIPS_PCLO16);
}
static inline bfd_boolean
mips16_call_reloc_p (int r_type)
{
return r_type == R_MIPS16_26 || r_type == R_MIPS16_CALL16;
}
static inline bfd_boolean
jal_reloc_p (int r_type)
{
return (r_type == R_MIPS_26
|| r_type == R_MIPS16_26
|| r_type == R_MICROMIPS_26_S1);
}
static inline bfd_boolean
b_reloc_p (int r_type)
{
return (r_type == R_MIPS_PC26_S2
|| r_type == R_MIPS_PC21_S2
|| r_type == R_MIPS_PC16
|| r_type == R_MIPS_GNU_REL16_S2
|| r_type == R_MIPS16_PC16_S1
|| r_type == R_MICROMIPS_PC16_S1
|| r_type == R_MICROMIPS_PC10_S1
|| r_type == R_MICROMIPS_PC7_S1);
}
static inline bfd_boolean
aligned_pcrel_reloc_p (int r_type)
{
return (r_type == R_MIPS_PC18_S3
|| r_type == R_MIPS_PC19_S2);
}
static inline bfd_boolean
branch_reloc_p (int r_type)
{
return (r_type == R_MIPS_26
|| r_type == R_MIPS_PC26_S2
|| r_type == R_MIPS_PC21_S2
|| r_type == R_MIPS_PC16
|| r_type == R_MIPS_GNU_REL16_S2);
}
static inline bfd_boolean
mips16_branch_reloc_p (int r_type)
{
return (r_type == R_MIPS16_26
|| r_type == R_MIPS16_PC16_S1);
}
static inline bfd_boolean
micromips_branch_reloc_p (int r_type)
{
return (r_type == R_MICROMIPS_26_S1
|| r_type == R_MICROMIPS_PC16_S1
|| r_type == R_MICROMIPS_PC10_S1
|| r_type == R_MICROMIPS_PC7_S1);
}
static inline bfd_boolean
tls_gd_reloc_p (unsigned int r_type)
{
return (r_type == R_MIPS_TLS_GD
|| r_type == R_MIPS16_TLS_GD
|| r_type == R_MICROMIPS_TLS_GD);
}
static inline bfd_boolean
tls_ldm_reloc_p (unsigned int r_type)
{
return (r_type == R_MIPS_TLS_LDM
|| r_type == R_MIPS16_TLS_LDM
|| r_type == R_MICROMIPS_TLS_LDM);
}
static inline bfd_boolean
tls_gottprel_reloc_p (unsigned int r_type)
{
return (r_type == R_MIPS_TLS_GOTTPREL
|| r_type == R_MIPS16_TLS_GOTTPREL
|| r_type == R_MICROMIPS_TLS_GOTTPREL);
}
void
_bfd_mips_elf_reloc_unshuffle (bfd *abfd, int r_type,
bfd_boolean jal_shuffle, bfd_byte *data)
{
bfd_vma first, second, val;
if (!mips16_reloc_p (r_type) && !micromips_reloc_shuffle_p (r_type))
return;
/* Pick up the first and second halfwords of the instruction. */
first = bfd_get_16 (abfd, data);
second = bfd_get_16 (abfd, data + 2);
if (micromips_reloc_p (r_type) || (r_type == R_MIPS16_26 && !jal_shuffle))
val = first << 16 | second;
else if (r_type != R_MIPS16_26)
val = (((first & 0xf800) << 16) | ((second & 0xffe0) << 11)
| ((first & 0x1f) << 11) | (first & 0x7e0) | (second & 0x1f));
else
val = (((first & 0xfc00) << 16) | ((first & 0x3e0) << 11)
| ((first & 0x1f) << 21) | second);
bfd_put_32 (abfd, val, data);
}
void
_bfd_mips_elf_reloc_shuffle (bfd *abfd, int r_type,
bfd_boolean jal_shuffle, bfd_byte *data)
{
bfd_vma first, second, val;
if (!mips16_reloc_p (r_type) && !micromips_reloc_shuffle_p (r_type))
return;
val = bfd_get_32 (abfd, data);
if (micromips_reloc_p (r_type) || (r_type == R_MIPS16_26 && !jal_shuffle))
{
second = val & 0xffff;
first = val >> 16;
}
else if (r_type != R_MIPS16_26)
{
second = ((val >> 11) & 0xffe0) | (val & 0x1f);
first = ((val >> 16) & 0xf800) | ((val >> 11) & 0x1f) | (val & 0x7e0);
}
else
{
second = val & 0xffff;
first = ((val >> 16) & 0xfc00) | ((val >> 11) & 0x3e0)
| ((val >> 21) & 0x1f);
}
bfd_put_16 (abfd, second, data + 2);
bfd_put_16 (abfd, first, data);
}
bfd_reloc_status_type
_bfd_mips_elf_gprel16_with_gp (bfd *abfd, asymbol *symbol,
arelent *reloc_entry, asection *input_section,
bfd_boolean relocatable, void *data, bfd_vma gp)
{
bfd_vma relocation;
bfd_signed_vma val;
bfd_reloc_status_type status;
if (bfd_is_com_section (symbol->section))
relocation = 0;
else
relocation = symbol->value;
relocation += symbol->section->output_section->vma;
relocation += symbol->section->output_offset;
if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
return bfd_reloc_outofrange;
/* Set val to the offset into the section or symbol. */
val = reloc_entry->addend;
_bfd_mips_elf_sign_extend (val, 16);
/* Adjust val for the final section location and GP value. If we
are producing relocatable output, we don't want to do this for
an external symbol. */
if (! relocatable
|| (symbol->flags & BSF_SECTION_SYM) != 0)
val += relocation - gp;
if (reloc_entry->howto->partial_inplace)
{
status = _bfd_relocate_contents (reloc_entry->howto, abfd, val,
(bfd_byte *) data
+ reloc_entry->address);
if (status != bfd_reloc_ok)
return status;
}
else
reloc_entry->addend = val;
if (relocatable)
reloc_entry->address += input_section->output_offset;
return bfd_reloc_ok;
}
/* Used to store a REL high-part relocation such as R_MIPS_HI16 or
R_MIPS_GOT16. REL is the relocation, INPUT_SECTION is the section
that contains the relocation field and DATA points to the start of
INPUT_SECTION. */
struct mips_hi16
{
struct mips_hi16 *next;
bfd_byte *data;
asection *input_section;
arelent rel;
};
/* FIXME: This should not be a static variable. */
static struct mips_hi16 *mips_hi16_list;
/* A howto special_function for REL *HI16 relocations. We can only
calculate the correct value once we've seen the partnering
*LO16 relocation, so just save the information for later.
The ABI requires that the *LO16 immediately follow the *HI16.
However, as a GNU extension, we permit an arbitrary number of
*HI16s to be associated with a single *LO16. This significantly
simplies the relocation handling in gcc. */
bfd_reloc_status_type
_bfd_mips_elf_hi16_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
asymbol *symbol ATTRIBUTE_UNUSED, void *data,
asection *input_section, bfd *output_bfd,
char **error_message ATTRIBUTE_UNUSED)
{
struct mips_hi16 *n;
if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
return bfd_reloc_outofrange;
n = bfd_malloc (sizeof *n);
if (n == NULL)
return bfd_reloc_outofrange;
n->next = mips_hi16_list;
n->data = data;
n->input_section = input_section;
n->rel = *reloc_entry;
mips_hi16_list = n;
if (output_bfd != NULL)
reloc_entry->address += input_section->output_offset;
return bfd_reloc_ok;
}
/* A howto special_function for REL R_MIPS*_GOT16 relocations. This is just
like any other 16-bit relocation when applied to global symbols, but is
treated in the same as R_MIPS_HI16 when applied to local symbols. */
bfd_reloc_status_type
_bfd_mips_elf_got16_reloc (bfd *abfd, arelent *reloc_entry, asymbol *symbol,
void *data, asection *input_section,
bfd *output_bfd, char **error_message)
{
if ((symbol->flags & (BSF_GLOBAL | BSF_WEAK)) != 0
|| bfd_is_und_section (bfd_asymbol_section (symbol))
|| bfd_is_com_section (bfd_asymbol_section (symbol)))
/* The relocation is against a global symbol. */
return _bfd_mips_elf_generic_reloc (abfd, reloc_entry, symbol, data,
input_section, output_bfd,
error_message);
return _bfd_mips_elf_hi16_reloc (abfd, reloc_entry, symbol, data,
input_section, output_bfd, error_message);
}
/* A howto special_function for REL *LO16 relocations. The *LO16 itself
is a straightforward 16 bit inplace relocation, but we must deal with
any partnering high-part relocations as well. */
bfd_reloc_status_type
_bfd_mips_elf_lo16_reloc (bfd *abfd, arelent *reloc_entry, asymbol *symbol,
void *data, asection *input_section,
bfd *output_bfd, char **error_message)
{
bfd_vma vallo;
bfd_byte *location = (bfd_byte *) data + reloc_entry->address;
if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
return bfd_reloc_outofrange;
_bfd_mips_elf_reloc_unshuffle (abfd, reloc_entry->howto->type, FALSE,
location);
vallo = bfd_get_32 (abfd, location);
_bfd_mips_elf_reloc_shuffle (abfd, reloc_entry->howto->type, FALSE,
location);
while (mips_hi16_list != NULL)
{
bfd_reloc_status_type ret;
struct mips_hi16 *hi;
hi = mips_hi16_list;
/* R_MIPS*_GOT16 relocations are something of a special case. We
want to install the addend in the same way as for a R_MIPS*_HI16
relocation (with a rightshift of 16). However, since GOT16
relocations can also be used with global symbols, their howto
has a rightshift of 0. */
if (hi->rel.howto->type == R_MIPS_GOT16)
hi->rel.howto = MIPS_ELF_RTYPE_TO_HOWTO (abfd, R_MIPS_HI16, FALSE);
else if (hi->rel.howto->type == R_MIPS16_GOT16)
hi->rel.howto = MIPS_ELF_RTYPE_TO_HOWTO (abfd, R_MIPS16_HI16, FALSE);
else if (hi->rel.howto->type == R_MICROMIPS_GOT16)
hi->rel.howto = MIPS_ELF_RTYPE_TO_HOWTO (abfd, R_MICROMIPS_HI16, FALSE);
/* VALLO is a signed 16-bit number. Bias it by 0x8000 so that any
carry or borrow will induce a change of +1 or -1 in the high part. */
hi->rel.addend += (vallo + 0x8000) & 0xffff;
ret = _bfd_mips_elf_generic_reloc (abfd, &hi->rel, symbol, hi->data,
hi->input_section, output_bfd,
error_message);
if (ret != bfd_reloc_ok)
return ret;
mips_hi16_list = hi->next;
free (hi);
}
return _bfd_mips_elf_generic_reloc (abfd, reloc_entry, symbol, data,
input_section, output_bfd,
error_message);
}
/* A generic howto special_function. This calculates and installs the
relocation itself, thus avoiding the oft-discussed problems in
bfd_perform_relocation and bfd_install_relocation. */
bfd_reloc_status_type
_bfd_mips_elf_generic_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
asymbol *symbol, void *data ATTRIBUTE_UNUSED,
asection *input_section, bfd *output_bfd,
char **error_message ATTRIBUTE_UNUSED)
{
bfd_signed_vma val;
bfd_reloc_status_type status;
bfd_boolean relocatable;
relocatable = (output_bfd != NULL);
if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
return bfd_reloc_outofrange;
/* Build up the field adjustment in VAL. */
val = 0;
if (!relocatable || (symbol->flags & BSF_SECTION_SYM) != 0)
{
/* Either we're calculating the final field value or we have a
relocation against a section symbol. Add in the section's
offset or address. */
val += symbol->section->output_section->vma;
val += symbol->section->output_offset;
}
if (!relocatable)
{
/* We're calculating the final field value. Add in the symbol's value
and, if pc-relative, subtract the address of the field itself. */
val += symbol->value;
if (reloc_entry->howto->pc_relative)
{
val -= input_section->output_section->vma;
val -= input_section->output_offset;
val -= reloc_entry->address;
}
}
/* VAL is now the final adjustment. If we're keeping this relocation
in the output file, and if the relocation uses a separate addend,
we just need to add VAL to that addend. Otherwise we need to add
VAL to the relocation field itself. */
if (relocatable && !reloc_entry->howto->partial_inplace)
reloc_entry->addend += val;
else
{
bfd_byte *location = (bfd_byte *) data + reloc_entry->address;
/* Add in the separate addend, if any. */
val += reloc_entry->addend;
/* Add VAL to the relocation field. */
_bfd_mips_elf_reloc_unshuffle (abfd, reloc_entry->howto->type, FALSE,
location);
status = _bfd_relocate_contents (reloc_entry->howto, abfd, val,
location);
_bfd_mips_elf_reloc_shuffle (abfd, reloc_entry->howto->type, FALSE,
location);
if (status != bfd_reloc_ok)
return status;
}
if (relocatable)
reloc_entry->address += input_section->output_offset;
return bfd_reloc_ok;
}
/* Swap an entry in a .gptab section. Note that these routines rely
on the equivalence of the two elements of the union. */
static void
bfd_mips_elf32_swap_gptab_in (bfd *abfd, const Elf32_External_gptab *ex,
Elf32_gptab *in)
{
in->gt_entry.gt_g_value = H_GET_32 (abfd, ex->gt_entry.gt_g_value);
in->gt_entry.gt_bytes = H_GET_32 (abfd, ex->gt_entry.gt_bytes);
}
static void
bfd_mips_elf32_swap_gptab_out (bfd *abfd, const Elf32_gptab *in,
Elf32_External_gptab *ex)
{
H_PUT_32 (abfd, in->gt_entry.gt_g_value, ex->gt_entry.gt_g_value);
H_PUT_32 (abfd, in->gt_entry.gt_bytes, ex->gt_entry.gt_bytes);
}
static void
bfd_elf32_swap_compact_rel_out (bfd *abfd, const Elf32_compact_rel *in,
Elf32_External_compact_rel *ex)
{
H_PUT_32 (abfd, in->id1, ex->id1);
H_PUT_32 (abfd, in->num, ex->num);
H_PUT_32 (abfd, in->id2, ex->id2);
H_PUT_32 (abfd, in->offset, ex->offset);
H_PUT_32 (abfd, in->reserved0, ex->reserved0);
H_PUT_32 (abfd, in->reserved1, ex->reserved1);
}
static void
bfd_elf32_swap_crinfo_out (bfd *abfd, const Elf32_crinfo *in,
Elf32_External_crinfo *ex)
{
unsigned long l;
l = (((in->ctype & CRINFO_CTYPE) << CRINFO_CTYPE_SH)
| ((in->rtype & CRINFO_RTYPE) << CRINFO_RTYPE_SH)
| ((in->dist2to & CRINFO_DIST2TO) << CRINFO_DIST2TO_SH)
| ((in->relvaddr & CRINFO_RELVADDR) << CRINFO_RELVADDR_SH));
H_PUT_32 (abfd, l, ex->info);
H_PUT_32 (abfd, in->konst, ex->konst);
H_PUT_32 (abfd, in->vaddr, ex->vaddr);
}
/* A .reginfo section holds a single Elf32_RegInfo structure. These
routines swap this structure in and out. They are used outside of
BFD, so they are globally visible. */
void
bfd_mips_elf32_swap_reginfo_in (bfd *abfd, const Elf32_External_RegInfo *ex,
Elf32_RegInfo *in)
{
in->ri_gprmask = H_GET_32 (abfd, ex->ri_gprmask);
in->ri_cprmask[0] = H_GET_32 (abfd, ex->ri_cprmask[0]);
in->ri_cprmask[1] = H_GET_32 (abfd, ex->ri_cprmask[1]);
in->ri_cprmask[2] = H_GET_32 (abfd, ex->ri_cprmask[2]);
in->ri_cprmask[3] = H_GET_32 (abfd, ex->ri_cprmask[3]);
in->ri_gp_value = H_GET_32 (abfd, ex->ri_gp_value);
}
void
bfd_mips_elf32_swap_reginfo_out (bfd *abfd, const Elf32_RegInfo *in,
Elf32_External_RegInfo *ex)
{
H_PUT_32 (abfd, in->ri_gprmask, ex->ri_gprmask);
H_PUT_32 (abfd, in->ri_cprmask[0], ex->ri_cprmask[0]);
H_PUT_32 (abfd, in->ri_cprmask[1], ex->ri_cprmask[1]);
H_PUT_32 (abfd, in->ri_cprmask[2], ex->ri_cprmask[2]);
H_PUT_32 (abfd, in->ri_cprmask[3], ex->ri_cprmask[3]);
H_PUT_32 (abfd, in->ri_gp_value, ex->ri_gp_value);
}
/* In the 64 bit ABI, the .MIPS.options section holds register
information in an Elf64_Reginfo structure. These routines swap
them in and out. They are globally visible because they are used
outside of BFD. These routines are here so that gas can call them
without worrying about whether the 64 bit ABI has been included. */
void
bfd_mips_elf64_swap_reginfo_in (bfd *abfd, const Elf64_External_RegInfo *ex,
Elf64_Internal_RegInfo *in)
{
in->ri_gprmask = H_GET_32 (abfd, ex->ri_gprmask);
in->ri_pad = H_GET_32 (abfd, ex->ri_pad);
in->ri_cprmask[0] = H_GET_32 (abfd, ex->ri_cprmask[0]);
in->ri_cprmask[1] = H_GET_32 (abfd, ex->ri_cprmask[1]);
in->ri_cprmask[2] = H_GET_32 (abfd, ex->ri_cprmask[2]);
in->ri_cprmask[3] = H_GET_32 (abfd, ex->ri_cprmask[3]);
in->ri_gp_value = H_GET_64 (abfd, ex->ri_gp_value);
}
void
bfd_mips_elf64_swap_reginfo_out (bfd *abfd, const Elf64_Internal_RegInfo *in,
Elf64_External_RegInfo *ex)
{
H_PUT_32 (abfd, in->ri_gprmask, ex->ri_gprmask);
H_PUT_32 (abfd, in->ri_pad, ex->ri_pad);
H_PUT_32 (abfd, in->ri_cprmask[0], ex->ri_cprmask[0]);
H_PUT_32 (abfd, in->ri_cprmask[1], ex->ri_cprmask[1]);
H_PUT_32 (abfd, in->ri_cprmask[2], ex->ri_cprmask[2]);
H_PUT_32 (abfd, in->ri_cprmask[3], ex->ri_cprmask[3]);
H_PUT_64 (abfd, in->ri_gp_value, ex->ri_gp_value);
}
/* Swap in an options header. */
void
bfd_mips_elf_swap_options_in (bfd *abfd, const Elf_External_Options *ex,
Elf_Internal_Options *in)
{
in->kind = H_GET_8 (abfd, ex->kind);
in->size = H_GET_8 (abfd, ex->size);
in->section = H_GET_16 (abfd, ex->section);
in->info = H_GET_32 (abfd, ex->info);
}
/* Swap out an options header. */
void
bfd_mips_elf_swap_options_out (bfd *abfd, const Elf_Internal_Options *in,
Elf_External_Options *ex)
{
H_PUT_8 (abfd, in->kind, ex->kind);
H_PUT_8 (abfd, in->size, ex->size);
H_PUT_16 (abfd, in->section, ex->section);
H_PUT_32 (abfd, in->info, ex->info);
}
/* Swap in an abiflags structure. */
void
bfd_mips_elf_swap_abiflags_v0_in (bfd *abfd,
const Elf_External_ABIFlags_v0 *ex,
Elf_Internal_ABIFlags_v0 *in)
{
in->version = H_GET_16 (abfd, ex->version);
in->isa_level = H_GET_8 (abfd, ex->isa_level);
in->isa_rev = H_GET_8 (abfd, ex->isa_rev);
in->gpr_size = H_GET_8 (abfd, ex->gpr_size);
in->cpr1_size = H_GET_8 (abfd, ex->cpr1_size);
in->cpr2_size = H_GET_8 (abfd, ex->cpr2_size);
in->fp_abi = H_GET_8 (abfd, ex->fp_abi);
in->isa_ext = H_GET_32 (abfd, ex->isa_ext);
in->ases = H_GET_32 (abfd, ex->ases);
in->flags1 = H_GET_32 (abfd, ex->flags1);
in->flags2 = H_GET_32 (abfd, ex->flags2);
}
/* Swap out an abiflags structure. */
void
bfd_mips_elf_swap_abiflags_v0_out (bfd *abfd,
const Elf_Internal_ABIFlags_v0 *in,
Elf_External_ABIFlags_v0 *ex)
{
H_PUT_16 (abfd, in->version, ex->version);
H_PUT_8 (abfd, in->isa_level, ex->isa_level);
H_PUT_8 (abfd, in->isa_rev, ex->isa_rev);
H_PUT_8 (abfd, in->gpr_size, ex->gpr_size);
H_PUT_8 (abfd, in->cpr1_size, ex->cpr1_size);
H_PUT_8 (abfd, in->cpr2_size, ex->cpr2_size);
H_PUT_8 (abfd, in->fp_abi, ex->fp_abi);
H_PUT_32 (abfd, in->isa_ext, ex->isa_ext);
H_PUT_32 (abfd, in->ases, ex->ases);
H_PUT_32 (abfd, in->flags1, ex->flags1);
H_PUT_32 (abfd, in->flags2, ex->flags2);
}
/* This function is called via qsort() to sort the dynamic relocation
entries by increasing r_symndx value. */
static int
sort_dynamic_relocs (const void *arg1, const void *arg2)
{
Elf_Internal_Rela int_reloc1;
Elf_Internal_Rela int_reloc2;
int diff;
bfd_elf32_swap_reloc_in (reldyn_sorting_bfd, arg1, &int_reloc1);
bfd_elf32_swap_reloc_in (reldyn_sorting_bfd, arg2, &int_reloc2);
diff = ELF32_R_SYM (int_reloc1.r_info) - ELF32_R_SYM (int_reloc2.r_info);
if (diff != 0)
return diff;
if (int_reloc1.r_offset < int_reloc2.r_offset)
return -1;
if (int_reloc1.r_offset > int_reloc2.r_offset)
return 1;
return 0;
}
/* Like sort_dynamic_relocs, but used for elf64 relocations. */
static int
sort_dynamic_relocs_64 (const void *arg1 ATTRIBUTE_UNUSED,
const void *arg2 ATTRIBUTE_UNUSED)
{
#ifdef BFD64
Elf_Internal_Rela int_reloc1[3];
Elf_Internal_Rela int_reloc2[3];
(*get_elf_backend_data (reldyn_sorting_bfd)->s->swap_reloc_in)
(reldyn_sorting_bfd, arg1, int_reloc1);
(*get_elf_backend_data (reldyn_sorting_bfd)->s->swap_reloc_in)
(reldyn_sorting_bfd, arg2, int_reloc2);
if (ELF64_R_SYM (int_reloc1[0].r_info) < ELF64_R_SYM (int_reloc2[0].r_info))
return -1;
if (ELF64_R_SYM (int_reloc1[0].r_info) > ELF64_R_SYM (int_reloc2[0].r_info))
return 1;
if (int_reloc1[0].r_offset < int_reloc2[0].r_offset)
return -1;
if (int_reloc1[0].r_offset > int_reloc2[0].r_offset)
return 1;
return 0;
#else
abort ();
#endif
}
/* This routine is used to write out ECOFF debugging external symbol
information. It is called via mips_elf_link_hash_traverse. The
ECOFF external symbol information must match the ELF external
symbol information. Unfortunately, at this point we don't know
whether a symbol is required by reloc information, so the two
tables may wind up being different. We must sort out the external
symbol information before we can set the final size of the .mdebug
section, and we must set the size of the .mdebug section before we
can relocate any sections, and we can't know which symbols are
required by relocation until we relocate the sections.
Fortunately, it is relatively unlikely that any symbol will be
stripped but required by a reloc. In particular, it can not happen
when generating a final executable. */
static bfd_boolean
mips_elf_output_extsym (struct mips_elf_link_hash_entry *h, void *data)
{
struct extsym_info *einfo = data;
bfd_boolean strip;
asection *sec, *output_section;
if (h->root.indx == -2)
strip = FALSE;
else if ((h->root.def_dynamic
|| h->root.ref_dynamic
|| h->root.type == bfd_link_hash_new)
&& !h->root.def_regular
&& !h->root.ref_regular)
strip = TRUE;
else if (einfo->info->strip == strip_all
|| (einfo->info->strip == strip_some
&& bfd_hash_lookup (einfo->info->keep_hash,
h->root.root.root.string,
FALSE, FALSE) == NULL))
strip = TRUE;
else
strip = FALSE;
if (strip)
return TRUE;
if (h->esym.ifd == -2)
{
h->esym.jmptbl = 0;
h->esym.cobol_main = 0;
h->esym.weakext = 0;
h->esym.reserved = 0;
h->esym.ifd = ifdNil;
h->esym.asym.value = 0;
h->esym.asym.st = stGlobal;
if (h->root.root.type == bfd_link_hash_undefined
|| h->root.root.type == bfd_link_hash_undefweak)
{
const char *name;
/* Use undefined class. Also, set class and type for some
special symbols. */
name = h->root.root.root.string;
if (strcmp (name, mips_elf_dynsym_rtproc_names[0]) == 0
|| strcmp (name, mips_elf_dynsym_rtproc_names[1]) == 0)
{
h->esym.asym.sc = scData;
h->esym.asym.st = stLabel;
h->esym.asym.value = 0;
}
else if (strcmp (name, mips_elf_dynsym_rtproc_names[2]) == 0)
{
h->esym.asym.sc = scAbs;
h->esym.asym.st = stLabel;
h->esym.asym.value =
mips_elf_hash_table (einfo->info)->procedure_count;
}
else
h->esym.asym.sc = scUndefined;
}
else if (h->root.root.type != bfd_link_hash_defined
&& h->root.root.type != bfd_link_hash_defweak)
h->esym.asym.sc = scAbs;
else
{
const char *name;
sec = h->root.root.u.def.section;
output_section = sec->output_section;
/* When making a shared library and symbol h is the one from
the another shared library, OUTPUT_SECTION may be null. */
if (output_section == NULL)
h->esym.asym.sc = scUndefined;
else
{
name = bfd_section_name (output_section);
if (strcmp (name, ".text") == 0)
h->esym.asym.sc = scText;
else if (strcmp (name, ".data") == 0)
h->esym.asym.sc = scData;
else if (strcmp (name, ".sdata") == 0)
h->esym.asym.sc = scSData;
else if (strcmp (name, ".rodata") == 0
|| strcmp (name, ".rdata") == 0)
h->esym.asym.sc = scRData;
else if (strcmp (name, ".bss") == 0)
h->esym.asym.sc = scBss;
else if (strcmp (name, ".sbss") == 0)
h->esym.asym.sc = scSBss;
else if (strcmp (name, ".init") == 0)
h->esym.asym.sc = scInit;
else if (strcmp (name, ".fini") == 0)
h->esym.asym.sc = scFini;
else
h->esym.asym.sc = scAbs;
}
}
h->esym.asym.reserved = 0;
h->esym.asym.index = indexNil;
}
if (h->root.root.type == bfd_link_hash_common)
h->esym.asym.value = h->root.root.u.c.size;
else if (h->root.root.type == bfd_link_hash_defined
|| h->root.root.type == bfd_link_hash_defweak)
{
if (h->esym.asym.sc == scCommon)
h->esym.asym.sc = scBss;
else if (h->esym.asym.sc == scSCommon)
h->esym.asym.sc = scSBss;
sec = h->root.root.u.def.section;
output_section = sec->output_section;
if (output_section != NULL)
h->esym.asym.value = (h->root.root.u.def.value
+ sec->output_offset
+ output_section->vma);
else
h->esym.asym.value = 0;
}
else
{
struct mips_elf_link_hash_entry *hd = h;
while (hd->root.root.type == bfd_link_hash_indirect)
hd = (struct mips_elf_link_hash_entry *)h->root.root.u.i.link;
if (hd->needs_lazy_stub)
{
BFD_ASSERT (hd->root.plt.plist != NULL);
BFD_ASSERT (hd->root.plt.plist->stub_offset != MINUS_ONE);
/* Set type and value for a symbol with a function stub. */
h->esym.asym.st = stProc;
sec = hd->root.root.u.def.section;
if (sec == NULL)
h->esym.asym.value = 0;
else
{
output_section = sec->output_section;
if (output_section != NULL)
h->esym.asym.value = (hd->root.plt.plist->stub_offset
+ sec->output_offset
+ output_section->vma);
else
h->esym.asym.value = 0;
}
}
}
if (! bfd_ecoff_debug_one_external (einfo->abfd, einfo->debug, einfo->swap,
h->root.root.root.string,
&h->esym))
{
einfo->failed = TRUE;
return FALSE;
}
return TRUE;
}
/* A comparison routine used to sort .gptab entries. */
static int
gptab_compare (const void *p1, const void *p2)
{
const Elf32_gptab *a1 = p1;
const Elf32_gptab *a2 = p2;
return a1->gt_entry.gt_g_value - a2->gt_entry.gt_g_value;
}
/* Functions to manage the got entry hash table. */
/* Use all 64 bits of a bfd_vma for the computation of a 32-bit
hash number. */
static INLINE hashval_t
mips_elf_hash_bfd_vma (bfd_vma addr)
{
#ifdef BFD64
return addr + (addr >> 32);
#else
return addr;
#endif
}
static hashval_t
mips_elf_got_entry_hash (const void *entry_)
{
const struct mips_got_entry *entry = (struct mips_got_entry *)entry_;
return (entry->symndx
+ ((entry->tls_type == GOT_TLS_LDM) << 18)
+ (entry->tls_type == GOT_TLS_LDM ? 0
: !entry->abfd ? mips_elf_hash_bfd_vma (entry->d.address)
: entry->symndx >= 0 ? (entry->abfd->id
+ mips_elf_hash_bfd_vma (entry->d.addend))
: entry->d.h->root.root.root.hash));
}
static int
mips_elf_got_entry_eq (const void *entry1, const void *entry2)
{
const struct mips_got_entry *e1 = (struct mips_got_entry *)entry1;
const struct mips_got_entry *e2 = (struct mips_got_entry *)entry2;
return (e1->symndx == e2->symndx
&& e1->tls_type == e2->tls_type
&& (e1->tls_type == GOT_TLS_LDM ? TRUE
: !e1->abfd ? !e2->abfd && e1->d.address == e2->d.address
: e1->symndx >= 0 ? (e1->abfd == e2->abfd
&& e1->d.addend == e2->d.addend)
: e2->abfd && e1->d.h == e2->d.h));
}
static hashval_t
mips_got_page_ref_hash (const void *ref_)
{
const struct mips_got_page_ref *ref;
ref = (const struct mips_got_page_ref *) ref_;
return ((ref->symndx >= 0
? (hashval_t) (ref->u.abfd->id + ref->symndx)
: ref->u.h->root.root.root.hash)
+ mips_elf_hash_bfd_vma (ref->addend));
}
static int
mips_got_page_ref_eq (const void *ref1_, const void *ref2_)
{
const struct mips_got_page_ref *ref1, *ref2;
ref1 = (const struct mips_got_page_ref *) ref1_;
ref2 = (const struct mips_got_page_ref *) ref2_;
return (ref1->symndx == ref2->symndx
&& (ref1->symndx < 0
? ref1->u.h == ref2->u.h
: ref1->u.abfd == ref2->u.abfd)
&& ref1->addend == ref2->addend);
}
static hashval_t
mips_got_page_entry_hash (const void *entry_)
{
const struct mips_got_page_entry *entry;
entry = (const struct mips_got_page_entry *) entry_;
return entry->sec->id;
}
static int
mips_got_page_entry_eq (const void *entry1_, const void *entry2_)
{
const struct mips_got_page_entry *entry1, *entry2;
entry1 = (const struct mips_got_page_entry *) entry1_;
entry2 = (const struct mips_got_page_entry *) entry2_;
return entry1->sec == entry2->sec;
}
/* Create and return a new mips_got_info structure. */
static struct mips_got_info *
mips_elf_create_got_info (bfd *abfd)
{
struct mips_got_info *g;
g = bfd_zalloc (abfd, sizeof (struct mips_got_info));
if (g == NULL)
return NULL;
g->got_entries = htab_try_create (1, mips_elf_got_entry_hash,
mips_elf_got_entry_eq, NULL);
if (g->got_entries == NULL)
return NULL;
g->got_page_refs = htab_try_create (1, mips_got_page_ref_hash,
mips_got_page_ref_eq, NULL);
if (g->got_page_refs == NULL)
return NULL;
return g;
}
/* Return the GOT info for input bfd ABFD, trying to create a new one if
CREATE_P and if ABFD doesn't already have a GOT. */
static struct mips_got_info *
mips_elf_bfd_got (bfd *abfd, bfd_boolean create_p)
{
struct mips_elf_obj_tdata *tdata;
if (!is_mips_elf (abfd))
return NULL;
tdata = mips_elf_tdata (abfd);
if (!tdata->got && create_p)
tdata->got = mips_elf_create_got_info (abfd);
return tdata->got;
}
/* Record that ABFD should use output GOT G. */
static void
mips_elf_replace_bfd_got (bfd *abfd, struct mips_got_info *g)
{
struct mips_elf_obj_tdata *tdata;
BFD_ASSERT (is_mips_elf (abfd));
tdata = mips_elf_tdata (abfd);
if (tdata->got)
{
/* The GOT structure itself and the hash table entries are
allocated to a bfd, but the hash tables aren't. */
htab_delete (tdata->got->got_entries);
htab_delete (tdata->got->got_page_refs);
if (tdata->got->got_page_entries)
htab_delete (tdata->got->got_page_entries);
}
tdata->got = g;
}
/* Return the dynamic relocation section. If it doesn't exist, try to
create a new it if CREATE_P, otherwise return NULL. Also return NULL
if creation fails. */
static asection *
mips_elf_rel_dyn_section (struct bfd_link_info *info, bfd_boolean create_p)
{
const char *dname;
asection *sreloc;
bfd *dynobj;
dname = MIPS_ELF_REL_DYN_NAME (info);
dynobj = elf_hash_table (info)->dynobj;
sreloc = bfd_get_linker_section (dynobj, dname);
if (sreloc == NULL && create_p)
{
sreloc = bfd_make_section_anyway_with_flags (dynobj, dname,
(SEC_ALLOC
| SEC_LOAD
| SEC_HAS_CONTENTS
| SEC_IN_MEMORY
| SEC_LINKER_CREATED
| SEC_READONLY));
if (sreloc == NULL
|| !bfd_set_section_alignment (sreloc,
MIPS_ELF_LOG_FILE_ALIGN (dynobj)))
return NULL;
}
return sreloc;
}
/* Return the GOT_TLS_* type required by relocation type R_TYPE. */
static int
mips_elf_reloc_tls_type (unsigned int r_type)
{
if (tls_gd_reloc_p (r_type))
return GOT_TLS_GD;
if (tls_ldm_reloc_p (r_type))
return GOT_TLS_LDM;
if (tls_gottprel_reloc_p (r_type))
return GOT_TLS_IE;
return GOT_TLS_NONE;
}
/* Return the number of GOT slots needed for GOT TLS type TYPE. */
static int
mips_tls_got_entries (unsigned int type)
{
switch (type)
{
case GOT_TLS_GD:
case GOT_TLS_LDM:
return 2;
case GOT_TLS_IE:
return 1;
case GOT_TLS_NONE:
return 0;
}
abort ();
}
/* Count the number of relocations needed for a TLS GOT entry, with
access types from TLS_TYPE, and symbol H (or a local symbol if H
is NULL). */
static int
mips_tls_got_relocs (struct bfd_link_info *info, unsigned char tls_type,
struct elf_link_hash_entry *h)
{
int indx = 0;
bfd_boolean need_relocs = FALSE;
bfd_boolean dyn = elf_hash_table (info)->dynamic_sections_created;
if (h != NULL
&& h->dynindx != -1
&& WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
&& (bfd_link_dll (info) || !SYMBOL_REFERENCES_LOCAL (info, h)))
indx = h->dynindx;
if ((bfd_link_dll (info) || indx != 0)
&& (h == NULL
|| ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
|| h->root.type != bfd_link_hash_undefweak))
need_relocs = TRUE;
if (!need_relocs)
return 0;
switch (tls_type)
{
case GOT_TLS_GD:
return indx != 0 ? 2 : 1;
case GOT_TLS_IE:
return 1;
case GOT_TLS_LDM:
return bfd_link_dll (info) ? 1 : 0;
default:
return 0;
}
}
/* Add the number of GOT entries and TLS relocations required by ENTRY
to G. */
static void
mips_elf_count_got_entry (struct bfd_link_info *info,
struct mips_got_info *g,
struct mips_got_entry *entry)
{
if (entry->tls_type)
{
g->tls_gotno += mips_tls_got_entries (entry->tls_type);
g->relocs += mips_tls_got_relocs (info, entry->tls_type,
entry->symndx < 0
? &entry->d.h->root : NULL);
}
else if (entry->symndx >= 0 || entry->d.h->global_got_area == GGA_NONE)
g->local_gotno += 1;
else
g->global_gotno += 1;
}
/* Output a simple dynamic relocation into SRELOC. */
static void
mips_elf_output_dynamic_relocation (bfd *output_bfd,
asection *sreloc,
unsigned long reloc_index,
unsigned long indx,
int r_type,
bfd_vma offset)
{
Elf_Internal_Rela rel[3];
memset (rel, 0, sizeof (rel));
rel[0].r_info = ELF_R_INFO (output_bfd, indx, r_type);
rel[0].r_offset = rel[1].r_offset = rel[2].r_offset = offset;
if (ABI_64_P (output_bfd))
{
(*get_elf_backend_data (output_bfd)->s->swap_reloc_out)
(output_bfd, &rel[0],
(sreloc->contents
+ reloc_index * sizeof (Elf64_Mips_External_Rel)));
}
else
bfd_elf32_swap_reloc_out
(output_bfd, &rel[0],
(sreloc->contents
+ reloc_index * sizeof (Elf32_External_Rel)));
}
/* Initialize a set of TLS GOT entries for one symbol. */
static void
mips_elf_initialize_tls_slots (bfd *abfd, struct bfd_link_info *info,
struct mips_got_entry *entry,
struct mips_elf_link_hash_entry *h,
bfd_vma value)
{
bfd_boolean dyn = elf_hash_table (info)->dynamic_sections_created;
struct mips_elf_link_hash_table *htab;
int indx;
asection *sreloc, *sgot;
bfd_vma got_offset, got_offset2;
bfd_boolean need_relocs = FALSE;
htab = mips_elf_hash_table (info);
if (htab == NULL)
return;
sgot = htab->root.sgot;
indx = 0;
if (h != NULL
&& h->root.dynindx != -1
&& WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), &h->root)
&& (bfd_link_dll (info) || !SYMBOL_REFERENCES_LOCAL (info, &h->root)))
indx = h->root.dynindx;
if (entry->tls_initialized)
return;
if ((bfd_link_dll (info) || indx != 0)
&& (h == NULL
|| ELF_ST_VISIBILITY (h->root.other) == STV_DEFAULT
|| h->root.type != bfd_link_hash_undefweak))
need_relocs = TRUE;
/* MINUS_ONE means the symbol is not defined in this object. It may not
be defined at all; assume that the value doesn't matter in that
case. Otherwise complain if we would use the value. */
BFD_ASSERT (value != MINUS_ONE || (indx != 0 && need_relocs)
|| h->root.root.type == bfd_link_hash_undefweak);
/* Emit necessary relocations. */
sreloc = mips_elf_rel_dyn_section (info, FALSE);
got_offset = entry->gotidx;
switch (entry->tls_type)
{
case GOT_TLS_GD:
/* General Dynamic. */
got_offset2 = got_offset + MIPS_ELF_GOT_SIZE (abfd);
if (need_relocs)
{
mips_elf_output_dynamic_relocation
(abfd, sreloc, sreloc->reloc_count++, indx,
ABI_64_P (abfd) ? R_MIPS_TLS_DTPMOD64 : R_MIPS_TLS_DTPMOD32,
sgot->output_offset + sgot->output_section->vma + got_offset);
if (indx)
mips_elf_output_dynamic_relocation
(abfd, sreloc, sreloc->reloc_count++, indx,
ABI_64_P (abfd) ? R_MIPS_TLS_DTPREL64 : R_MIPS_TLS_DTPREL32,
sgot->output_offset + sgot->output_section->vma + got_offset2);
else
MIPS_ELF_PUT_WORD (abfd, value - dtprel_base (info),
sgot->contents + got_offset2);
}
else
{
MIPS_ELF_PUT_WORD (abfd, 1,
sgot->contents + got_offset);
MIPS_ELF_PUT_WORD (abfd, value - dtprel_base (info),
sgot->contents + got_offset2);
}
break;
case GOT_TLS_IE:
/* Initial Exec model. */
if (need_relocs)
{
if (indx == 0)
MIPS_ELF_PUT_WORD (abfd, value - elf_hash_table (info)->tls_sec->vma,
sgot->contents + got_offset);
else
MIPS_ELF_PUT_WORD (abfd, 0,
sgot->contents + got_offset);
mips_elf_output_dynamic_relocation
(abfd, sreloc, sreloc->reloc_count++, indx,
ABI_64_P (abfd) ? R_MIPS_TLS_TPREL64 : R_MIPS_TLS_TPREL32,
sgot->output_offset + sgot->output_section->vma + got_offset);
}
else
MIPS_ELF_PUT_WORD (abfd, value - tprel_base (info),
sgot->contents + got_offset);
break;
case GOT_TLS_LDM:
/* The initial offset is zero, and the LD offsets will include the
bias by DTP_OFFSET. */
MIPS_ELF_PUT_WORD (abfd, 0,
sgot->contents + got_offset
+ MIPS_ELF_GOT_SIZE (abfd));
if (!bfd_link_dll (info))
MIPS_ELF_PUT_WORD (abfd, 1,
sgot->contents + got_offset);
else
mips_elf_output_dynamic_relocation
(abfd, sreloc, sreloc->reloc_count++, indx,
ABI_64_P (abfd) ? R_MIPS_TLS_DTPMOD64 : R_MIPS_TLS_DTPMOD32,
sgot->output_offset + sgot->output_section->vma + got_offset);
break;
default:
abort ();
}
entry->tls_initialized = TRUE;
}
/* Return the offset from _GLOBAL_OFFSET_TABLE_ of the .got.plt entry
for global symbol H. .got.plt comes before the GOT, so the offset
will be negative. */
static bfd_vma
mips_elf_gotplt_index (struct bfd_link_info *info,
struct elf_link_hash_entry *h)
{
bfd_vma got_address, got_value;
struct mips_elf_link_hash_table *htab;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
BFD_ASSERT (h->plt.plist != NULL);
BFD_ASSERT (h->plt.plist->gotplt_index != MINUS_ONE);
/* Calculate the address of the associated .got.plt entry. */
got_address = (htab->root.sgotplt->output_section->vma
+ htab->root.sgotplt->output_offset
+ (h->plt.plist->gotplt_index
* MIPS_ELF_GOT_SIZE (info->output_bfd)));
/* Calculate the value of _GLOBAL_OFFSET_TABLE_. */
got_value = (htab->root.hgot->root.u.def.section->output_section->vma
+ htab->root.hgot->root.u.def.section->output_offset
+ htab->root.hgot->root.u.def.value);
return got_address - got_value;
}
/* Return the GOT offset for address VALUE. If there is not yet a GOT
entry for this value, create one. If R_SYMNDX refers to a TLS symbol,
create a TLS GOT entry instead. Return -1 if no satisfactory GOT
offset can be found. */
static bfd_vma
mips_elf_local_got_index (bfd *abfd, bfd *ibfd, struct bfd_link_info *info,
bfd_vma value, unsigned long r_symndx,
struct mips_elf_link_hash_entry *h, int r_type)
{
struct mips_elf_link_hash_table *htab;
struct mips_got_entry *entry;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
entry = mips_elf_create_local_got_entry (abfd, info, ibfd, value,
r_symndx, h, r_type);
if (!entry)
return MINUS_ONE;
if (entry->tls_type)
mips_elf_initialize_tls_slots (abfd, info, entry, h, value);
return entry->gotidx;
}
/* Return the GOT index of global symbol H in the primary GOT. */
static bfd_vma
mips_elf_primary_global_got_index (bfd *obfd, struct bfd_link_info *info,
struct elf_link_hash_entry *h)
{
struct mips_elf_link_hash_table *htab;
long global_got_dynindx;
struct mips_got_info *g;
bfd_vma got_index;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
global_got_dynindx = 0;
if (htab->global_gotsym != NULL)
global_got_dynindx = htab->global_gotsym->dynindx;
/* Once we determine the global GOT entry with the lowest dynamic
symbol table index, we must put all dynamic symbols with greater
indices into the primary GOT. That makes it easy to calculate the
GOT offset. */
BFD_ASSERT (h->dynindx >= global_got_dynindx);
g = mips_elf_bfd_got (obfd, FALSE);
got_index = ((h->dynindx - global_got_dynindx + g->local_gotno)
* MIPS_ELF_GOT_SIZE (obfd));
BFD_ASSERT (got_index < htab->root.sgot->size);
return got_index;
}
/* Return the GOT index for the global symbol indicated by H, which is
referenced by a relocation of type R_TYPE in IBFD. */
static bfd_vma
mips_elf_global_got_index (bfd *obfd, struct bfd_link_info *info, bfd *ibfd,
struct elf_link_hash_entry *h, int r_type)
{
struct mips_elf_link_hash_table *htab;
struct mips_got_info *g;
struct mips_got_entry lookup, *entry;
bfd_vma gotidx;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
g = mips_elf_bfd_got (ibfd, FALSE);
BFD_ASSERT (g);
lookup.tls_type = mips_elf_reloc_tls_type (r_type);
if (!lookup.tls_type && g == mips_elf_bfd_got (obfd, FALSE))
return mips_elf_primary_global_got_index (obfd, info, h);
lookup.abfd = ibfd;
lookup.symndx = -1;
lookup.d.h = (struct mips_elf_link_hash_entry *) h;
entry = htab_find (g->got_entries, &lookup);
BFD_ASSERT (entry);
gotidx = entry->gotidx;
BFD_ASSERT (gotidx > 0 && gotidx < htab->root.sgot->size);
if (lookup.tls_type)
{
bfd_vma value = MINUS_ONE;
if ((h->root.type == bfd_link_hash_defined
|| h->root.type == bfd_link_hash_defweak)
&& h->root.u.def.section->output_section)
value = (h->root.u.def.value
+ h->root.u.def.section->output_offset
+ h->root.u.def.section->output_section->vma);
mips_elf_initialize_tls_slots (obfd, info, entry, lookup.d.h, value);
}
return gotidx;
}
/* Find a GOT page entry that points to within 32KB of VALUE. These
entries are supposed to be placed at small offsets in the GOT, i.e.,
within 32KB of GP. Return the index of the GOT entry, or -1 if no
entry could be created. If OFFSETP is nonnull, use it to return the
offset of the GOT entry from VALUE. */
static bfd_vma
mips_elf_got_page (bfd *abfd, bfd *ibfd, struct bfd_link_info *info,
bfd_vma value, bfd_vma *offsetp)
{
bfd_vma page, got_index;
struct mips_got_entry *entry;
page = (value + 0x8000) & ~(bfd_vma) 0xffff;
entry = mips_elf_create_local_got_entry (abfd, info, ibfd, page, 0,
NULL, R_MIPS_GOT_PAGE);
if (!entry)
return MINUS_ONE;
got_index = entry->gotidx;
if (offsetp)
*offsetp = value - entry->d.address;
return got_index;
}
/* Find a local GOT entry for an R_MIPS*_GOT16 relocation against VALUE.
EXTERNAL is true if the relocation was originally against a global
symbol that binds locally. */
static bfd_vma
mips_elf_got16_entry (bfd *abfd, bfd *ibfd, struct bfd_link_info *info,
bfd_vma value, bfd_boolean external)
{
struct mips_got_entry *entry;
/* GOT16 relocations against local symbols are followed by a LO16
relocation; those against global symbols are not. Thus if the
symbol was originally local, the GOT16 relocation should load the
equivalent of %hi(VALUE), otherwise it should load VALUE itself. */
if (! external)
value = mips_elf_high (value) << 16;
/* It doesn't matter whether the original relocation was R_MIPS_GOT16,
R_MIPS16_GOT16, R_MIPS_CALL16, etc. The format of the entry is the
same in all cases. */
entry = mips_elf_create_local_got_entry (abfd, info, ibfd, value, 0,
NULL, R_MIPS_GOT16);
if (entry)
return entry->gotidx;
else
return MINUS_ONE;
}
/* Returns the offset for the entry at the INDEXth position
in the GOT. */
static bfd_vma
mips_elf_got_offset_from_index (struct bfd_link_info *info, bfd *output_bfd,
bfd *input_bfd, bfd_vma got_index)
{
struct mips_elf_link_hash_table *htab;
asection *sgot;
bfd_vma gp;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
sgot = htab->root.sgot;
gp = _bfd_get_gp_value (output_bfd)
+ mips_elf_adjust_gp (output_bfd, htab->got_info, input_bfd);
return sgot->output_section->vma + sgot->output_offset + got_index - gp;
}
/* Create and return a local GOT entry for VALUE, which was calculated
from a symbol belonging to INPUT_SECTON. Return NULL if it could not
be created. If R_SYMNDX refers to a TLS symbol, create a TLS entry
instead. */
static struct mips_got_entry *
mips_elf_create_local_got_entry (bfd *abfd, struct bfd_link_info *info,
bfd *ibfd, bfd_vma value,
unsigned long r_symndx,
struct mips_elf_link_hash_entry *h,
int r_type)
{
struct mips_got_entry lookup, *entry;
void **loc;
struct mips_got_info *g;
struct mips_elf_link_hash_table *htab;
bfd_vma gotidx;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
g = mips_elf_bfd_got (ibfd, FALSE);
if (g == NULL)
{
g = mips_elf_bfd_got (abfd, FALSE);
BFD_ASSERT (g != NULL);
}
/* This function shouldn't be called for symbols that live in the global
area of the GOT. */
BFD_ASSERT (h == NULL || h->global_got_area == GGA_NONE);
lookup.tls_type = mips_elf_reloc_tls_type (r_type);
if (lookup.tls_type)
{
lookup.abfd = ibfd;
if (tls_ldm_reloc_p (r_type))
{
lookup.symndx = 0;
lookup.d.addend = 0;
}
else if (h == NULL)
{
lookup.symndx = r_symndx;
lookup.d.addend = 0;
}
else
{
lookup.symndx = -1;
lookup.d.h = h;
}
entry = (struct mips_got_entry *) htab_find (g->got_entries, &lookup);
BFD_ASSERT (entry);
gotidx = entry->gotidx;
BFD_ASSERT (gotidx > 0 && gotidx < htab->root.sgot->size);
return entry;
}
lookup.abfd = NULL;
lookup.symndx = -1;
lookup.d.address = value;
loc = htab_find_slot (g->got_entries, &lookup, INSERT);
if (!loc)
return NULL;
entry = (struct mips_got_entry *) *loc;
if (entry)
return entry;
if (g->assigned_low_gotno > g->assigned_high_gotno)
{
/* We didn't allocate enough space in the GOT. */
_bfd_error_handler
(_("not enough GOT space for local GOT entries"));
bfd_set_error (bfd_error_bad_value);
return NULL;
}
entry = (struct mips_got_entry *) bfd_alloc (abfd, sizeof (*entry));
if (!entry)
return NULL;
if (got16_reloc_p (r_type)
|| call16_reloc_p (r_type)
|| got_page_reloc_p (r_type)
|| got_disp_reloc_p (r_type))
lookup.gotidx = MIPS_ELF_GOT_SIZE (abfd) * g->assigned_low_gotno++;
else
lookup.gotidx = MIPS_ELF_GOT_SIZE (abfd) * g->assigned_high_gotno--;
*entry = lookup;
*loc = entry;
MIPS_ELF_PUT_WORD (abfd, value, htab->root.sgot->contents + entry->gotidx);
/* These GOT entries need a dynamic relocation on VxWorks. */
if (htab->root.target_os == is_vxworks)
{
Elf_Internal_Rela outrel;
asection *s;
bfd_byte *rloc;
bfd_vma got_address;
s = mips_elf_rel_dyn_section (info, FALSE);
got_address = (htab->root.sgot->output_section->vma
+ htab->root.sgot->output_offset
+ entry->gotidx);
rloc = s->contents + (s->reloc_count++ * sizeof (Elf32_External_Rela));
outrel.r_offset = got_address;
outrel.r_info = ELF32_R_INFO (STN_UNDEF, R_MIPS_32);
outrel.r_addend = value;
bfd_elf32_swap_reloca_out (abfd, &outrel, rloc);
}
return entry;
}
/* Return the number of dynamic section symbols required by OUTPUT_BFD.
The number might be exact or a worst-case estimate, depending on how
much information is available to elf_backend_omit_section_dynsym at
the current linking stage. */
static bfd_size_type
count_section_dynsyms (bfd *output_bfd, struct bfd_link_info *info)
{
bfd_size_type count;
count = 0;
if (bfd_link_pic (info)
|| elf_hash_table (info)->is_relocatable_executable)
{
asection *p;
const struct elf_backend_data *bed;
bed = get_elf_backend_data (output_bfd);
for (p = output_bfd->sections; p ; p = p->next)
if ((p->flags & SEC_EXCLUDE) == 0
&& (p->flags & SEC_ALLOC) != 0
&& elf_hash_table (info)->dynamic_relocs
&& !(*bed->elf_backend_omit_section_dynsym) (output_bfd, info, p))
++count;
}
return count;
}
/* Sort the dynamic symbol table so that symbols that need GOT entries
appear towards the end. */
static bfd_boolean
mips_elf_sort_hash_table (bfd *abfd, struct bfd_link_info *info)
{
struct mips_elf_link_hash_table *htab;
struct mips_elf_hash_sort_data hsd;
struct mips_got_info *g;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
if (htab->root.dynsymcount == 0)
return TRUE;
g = htab->got_info;
if (g == NULL)
return TRUE;
hsd.low = NULL;
hsd.max_unref_got_dynindx
= hsd.min_got_dynindx
= (htab->root.dynsymcount - g->reloc_only_gotno);
/* Add 1 to local symbol indices to account for the mandatory NULL entry
at the head of the table; see `_bfd_elf_link_renumber_dynsyms'. */
hsd.max_local_dynindx = count_section_dynsyms (abfd, info) + 1;
hsd.max_non_got_dynindx = htab->root.local_dynsymcount + 1;
hsd.output_bfd = abfd;
if (htab->root.dynobj != NULL
&& htab->root.dynamic_sections_created
&& info->emit_gnu_hash)
{
asection *s = bfd_get_linker_section (htab->root.dynobj, ".MIPS.xhash");
BFD_ASSERT (s != NULL);
hsd.mipsxhash = s->contents;
BFD_ASSERT (hsd.mipsxhash != NULL);
}
else
hsd.mipsxhash = NULL;
mips_elf_link_hash_traverse (htab, mips_elf_sort_hash_table_f, &hsd);
/* There should have been enough room in the symbol table to
accommodate both the GOT and non-GOT symbols. */
BFD_ASSERT (hsd.max_local_dynindx <= htab->root.local_dynsymcount + 1);
BFD_ASSERT (hsd.max_non_got_dynindx <= hsd.min_got_dynindx);
BFD_ASSERT (hsd.max_unref_got_dynindx == htab->root.dynsymcount);
BFD_ASSERT (htab->root.dynsymcount - hsd.min_got_dynindx == g->global_gotno);
/* Now we know which dynamic symbol has the lowest dynamic symbol
table index in the GOT. */
htab->global_gotsym = hsd.low;
return TRUE;
}
/* If H needs a GOT entry, assign it the highest available dynamic
index. Otherwise, assign it the lowest available dynamic
index. */
static bfd_boolean
mips_elf_sort_hash_table_f (struct mips_elf_link_hash_entry *h, void *data)
{
struct mips_elf_hash_sort_data *hsd = data;
/* Symbols without dynamic symbol table entries aren't interesting
at all. */
if (h->root.dynindx == -1)
return TRUE;
switch (h->global_got_area)
{
case GGA_NONE:
if (h->root.forced_local)
h->root.dynindx = hsd->max_local_dynindx++;
else
h->root.dynindx = hsd->max_non_got_dynindx++;
break;
case GGA_NORMAL:
h->root.dynindx = --hsd->min_got_dynindx;
hsd->low = (struct elf_link_hash_entry *) h;
break;
case GGA_RELOC_ONLY:
if (hsd->max_unref_got_dynindx == hsd->min_got_dynindx)
hsd->low = (struct elf_link_hash_entry *) h;
h->root.dynindx = hsd->max_unref_got_dynindx++;
break;
}
/* Populate the .MIPS.xhash translation table entry with
the symbol dynindx. */
if (h->mipsxhash_loc != 0 && hsd->mipsxhash != NULL)
bfd_put_32 (hsd->output_bfd, h->root.dynindx,
hsd->mipsxhash + h->mipsxhash_loc);
return TRUE;
}
/* Record that input bfd ABFD requires a GOT entry like *LOOKUP
(which is owned by the caller and shouldn't be added to the
hash table directly). */
static bfd_boolean
mips_elf_record_got_entry (struct bfd_link_info *info, bfd *abfd,
struct mips_got_entry *lookup)
{
struct mips_elf_link_hash_table *htab;
struct mips_got_entry *entry;
struct mips_got_info *g;
void **loc, **bfd_loc;
/* Make sure there's a slot for this entry in the master GOT. */
htab = mips_elf_hash_table (info);
g = htab->got_info;
loc = htab_find_slot (g->got_entries, lookup, INSERT);
if (!loc)
return FALSE;
/* Populate the entry if it isn't already. */
entry = (struct mips_got_entry *) *loc;
if (!entry)
{
entry = (struct mips_got_entry *) bfd_alloc (abfd, sizeof (*entry));
if (!entry)
return FALSE;
lookup->tls_initialized = FALSE;
lookup->gotidx = -1;
*entry = *lookup;
*loc = entry;
}
/* Reuse the same GOT entry for the BFD's GOT. */
g = mips_elf_bfd_got (abfd, TRUE);
if (!g)
return FALSE;
bfd_loc = htab_find_slot (g->got_entries, lookup, INSERT);
if (!bfd_loc)
return FALSE;
if (!*bfd_loc)
*bfd_loc = entry;
return TRUE;
}
/* ABFD has a GOT relocation of type R_TYPE against H. Reserve a GOT
entry for it. FOR_CALL is true if the caller is only interested in
using the GOT entry for calls. */
static bfd_boolean
mips_elf_record_global_got_symbol (struct elf_link_hash_entry *h,
bfd *abfd, struct bfd_link_info *info,
bfd_boolean for_call, int r_type)
{
struct mips_elf_link_hash_table *htab;
struct mips_elf_link_hash_entry *hmips;
struct mips_got_entry entry;
unsigned char tls_type;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
hmips = (struct mips_elf_link_hash_entry *) h;
if (!for_call)
hmips->got_only_for_calls = FALSE;
/* A global symbol in the GOT must also be in the dynamic symbol
table. */
if (h->dynindx == -1)
{
switch (ELF_ST_VISIBILITY (h->other))
{
case STV_INTERNAL:
case STV_HIDDEN:
_bfd_mips_elf_hide_symbol (info, h, TRUE);
break;
}
if (!bfd_elf_link_record_dynamic_symbol (info, h))
return FALSE;
}
tls_type = mips_elf_reloc_tls_type (r_type);
if (tls_type == GOT_TLS_NONE && hmips->global_got_area > GGA_NORMAL)
hmips->global_got_area = GGA_NORMAL;
entry.abfd = abfd;
entry.symndx = -1;
entry.d.h = (struct mips_elf_link_hash_entry *) h;
entry.tls_type = tls_type;
return mips_elf_record_got_entry (info, abfd, &entry);
}
/* ABFD has a GOT relocation of type R_TYPE against symbol SYMNDX + ADDEND,
where SYMNDX is a local symbol. Reserve a GOT entry for it. */
static bfd_boolean
mips_elf_record_local_got_symbol (bfd *abfd, long symndx, bfd_vma addend,
struct bfd_link_info *info, int r_type)
{
struct mips_elf_link_hash_table *htab;
struct mips_got_info *g;
struct mips_got_entry entry;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
g = htab->got_info;
BFD_ASSERT (g != NULL);
entry.abfd = abfd;
entry.symndx = symndx;
entry.d.addend = addend;
entry.tls_type = mips_elf_reloc_tls_type (r_type);
return mips_elf_record_got_entry (info, abfd, &entry);
}
/* Record that ABFD has a page relocation against SYMNDX + ADDEND.
H is the symbol's hash table entry, or null if SYMNDX is local
to ABFD. */
static bfd_boolean
mips_elf_record_got_page_ref (struct bfd_link_info *info, bfd *abfd,
long symndx, struct elf_link_hash_entry *h,
bfd_signed_vma addend)
{
struct mips_elf_link_hash_table *htab;
struct mips_got_info *g1, *g2;
struct mips_got_page_ref lookup, *entry;
void **loc, **bfd_loc;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
g1 = htab->got_info;
BFD_ASSERT (g1 != NULL);
if (h)
{
lookup.symndx = -1;
lookup.u.h = (struct mips_elf_link_hash_entry *) h;
}
else
{
lookup.symndx = symndx;
lookup.u.abfd = abfd;
}
lookup.addend = addend;
loc = htab_find_slot (g1->got_page_refs, &lookup, INSERT);
if (loc == NULL)
return FALSE;
entry = (struct mips_got_page_ref *) *loc;
if (!entry)
{
entry = bfd_alloc (abfd, sizeof (*entry));
if (!entry)
return FALSE;
*entry = lookup;
*loc = entry;
}
/* Add the same entry to the BFD's GOT. */
g2 = mips_elf_bfd_got (abfd, TRUE);
if (!g2)
return FALSE;
bfd_loc = htab_find_slot (g2->got_page_refs, &lookup, INSERT);
if (!bfd_loc)
return FALSE;
if (!*bfd_loc)
*bfd_loc = entry;
return TRUE;
}
/* Add room for N relocations to the .rel(a).dyn section in ABFD. */
static void
mips_elf_allocate_dynamic_relocations (bfd *abfd, struct bfd_link_info *info,
unsigned int n)
{
asection *s;
struct mips_elf_link_hash_table *htab;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
s = mips_elf_rel_dyn_section (info, FALSE);
BFD_ASSERT (s != NULL);
if (htab->root.target_os == is_vxworks)
s->size += n * MIPS_ELF_RELA_SIZE (abfd);
else
{
if (s->size == 0)
{
/* Make room for a null element. */
s->size += MIPS_ELF_REL_SIZE (abfd);
++s->reloc_count;
}
s->size += n * MIPS_ELF_REL_SIZE (abfd);
}
}
/* A htab_traverse callback for GOT entries, with DATA pointing to a
mips_elf_traverse_got_arg structure. Count the number of GOT
entries and TLS relocs. Set DATA->value to true if we need
to resolve indirect or warning symbols and then recreate the GOT. */
static int
mips_elf_check_recreate_got (void **entryp, void *data)
{
struct mips_got_entry *entry;
struct mips_elf_traverse_got_arg *arg;
entry = (struct mips_got_entry *) *entryp;
arg = (struct mips_elf_traverse_got_arg *) data;
if (entry->abfd != NULL && entry->symndx == -1)
{
struct mips_elf_link_hash_entry *h;
h = entry->d.h;
if (h->root.root.type == bfd_link_hash_indirect
|| h->root.root.type == bfd_link_hash_warning)
{
arg->value = TRUE;
return 0;
}
}
mips_elf_count_got_entry (arg->info, arg->g, entry);
return 1;
}
/* A htab_traverse callback for GOT entries, with DATA pointing to a
mips_elf_traverse_got_arg structure. Add all entries to DATA->g,
converting entries for indirect and warning symbols into entries
for the target symbol. Set DATA->g to null on error. */
static int
mips_elf_recreate_got (void **entryp, void *data)
{
struct mips_got_entry new_entry, *entry;
struct mips_elf_traverse_got_arg *arg;
void **slot;
entry = (struct mips_got_entry *) *entryp;
arg = (struct mips_elf_traverse_got_arg *) data;
if (entry->abfd != NULL
&& entry->symndx == -1
&& (entry->d.h->root.root.type == bfd_link_hash_indirect
|| entry->d.h->root.root.type == bfd_link_hash_warning))
{
struct mips_elf_link_hash_entry *h;
new_entry = *entry;
entry = &new_entry;
h = entry->d.h;
do
{
BFD_ASSERT (h->global_got_area == GGA_NONE);
h = (struct mips_elf_link_hash_entry *) h->root.root.u.i.link;
}
while (h->root.root.type == bfd_link_hash_indirect
|| h->root.root.type == bfd_link_hash_warning);
entry->d.h = h;
}
slot = htab_find_slot (arg->g->got_entries, entry, INSERT);
if (slot == NULL)
{
arg->g = NULL;
return 0;
}
if (*slot == NULL)
{
if (entry == &new_entry)
{
entry = bfd_alloc (entry->abfd, sizeof (*entry));
if (!entry)
{
arg->g = NULL;
return 0;
}
*entry = new_entry;
}
*slot = entry;
mips_elf_count_got_entry (arg->info, arg->g, entry);
}
return 1;
}
/* Return the maximum number of GOT page entries required for RANGE. */
static bfd_vma
mips_elf_pages_for_range (const struct mips_got_page_range *range)
{
return (range->max_addend - range->min_addend + 0x1ffff) >> 16;
}
/* Record that G requires a page entry that can reach SEC + ADDEND. */
static bfd_boolean
mips_elf_record_got_page_entry (struct mips_elf_traverse_got_arg *arg,
asection *sec, bfd_signed_vma addend)
{
struct mips_got_info *g = arg->g;
struct mips_got_page_entry lookup, *entry;
struct mips_got_page_range **range_ptr, *range;
bfd_vma old_pages, new_pages;
void **loc;
/* Find the mips_got_page_entry hash table entry for this section. */
lookup.sec = sec;
loc = htab_find_slot (g->got_page_entries, &lookup, INSERT);
if (loc == NULL)
return FALSE;
/* Create a mips_got_page_entry if this is the first time we've
seen the section. */
entry = (struct mips_got_page_entry *) *loc;
if (!entry)
{
entry = bfd_zalloc (arg->info->output_bfd, sizeof (*entry));
if (!entry)
return FALSE;
entry->sec = sec;
*loc = entry;
}
/* Skip over ranges whose maximum extent cannot share a page entry
with ADDEND. */
range_ptr = &entry->ranges;
while (*range_ptr && addend > (*range_ptr)->max_addend + 0xffff)
range_ptr = &(*range_ptr)->next;
/* If we scanned to the end of the list, or found a range whose
minimum extent cannot share a page entry with ADDEND, create
a new singleton range. */
range = *range_ptr;
if (!range || addend < range->min_addend - 0xffff)
{
range = bfd_zalloc (arg->info->output_bfd, sizeof (*range));
if (!range)
return FALSE;
range->next = *range_ptr;
range->min_addend = addend;
range->max_addend = addend;
*range_ptr = range;
entry->num_pages++;
g->page_gotno++;
return TRUE;
}
/* Remember how many pages the old range contributed. */
old_pages = mips_elf_pages_for_range (range);
/* Update the ranges. */
if (addend < range->min_addend)
range->min_addend = addend;
else if (addend > range->max_addend)
{
if (range->next && addend >= range->next->min_addend - 0xffff)
{
old_pages += mips_elf_pages_for_range (range->next);
range->max_addend = range->next->max_addend;
range->next = range->next->next;
}
else
range->max_addend = addend;
}
/* Record any change in the total estimate. */
new_pages = mips_elf_pages_for_range (range);
if (old_pages != new_pages)
{
entry->num_pages += new_pages - old_pages;
g->page_gotno += new_pages - old_pages;
}
return TRUE;
}
/* A htab_traverse callback for which *REFP points to a mips_got_page_ref
and for which DATA points to a mips_elf_traverse_got_arg. Work out
whether the page reference described by *REFP needs a GOT page entry,
and record that entry in DATA->g if so. Set DATA->g to null on failure. */
static int
mips_elf_resolve_got_page_ref (void **refp, void *data)
{
struct mips_got_page_ref *ref;
struct mips_elf_traverse_got_arg *arg;
struct mips_elf_link_hash_table *htab;
asection *sec;
bfd_vma addend;
ref = (struct mips_got_page_ref *) *refp;
arg = (struct mips_elf_traverse_got_arg *) data;
htab = mips_elf_hash_table (arg->info);
if (ref->symndx < 0)
{
struct mips_elf_link_hash_entry *h;
/* Global GOT_PAGEs decay to GOT_DISP and so don't need page entries. */
h = ref->u.h;
if (!SYMBOL_REFERENCES_LOCAL (arg->info, &h->root))
return 1;
/* Ignore undefined symbols; we'll issue an error later if
appropriate. */
if (!((h->root.root.type == bfd_link_hash_defined
|| h->root.root.type == bfd_link_hash_defweak)
&& h->root.root.u.def.section))
return 1;
sec = h->root.root.u.def.section;
addend = h->root.root.u.def.value + ref->addend;
}
else
{
Elf_Internal_Sym *isym;
/* Read in the symbol. */
isym = bfd_sym_from_r_symndx (&htab->root.sym_cache, ref->u.abfd,
ref->symndx);
if (isym == NULL)
{
arg->g = NULL;
return 0;
}
/* Get the associated input section. */
sec = bfd_section_from_elf_index (ref->u.abfd, isym->st_shndx);
if (sec == NULL)
{
arg->g = NULL;
return 0;
}
/* If this is a mergable section, work out the section and offset
of the merged data. For section symbols, the addend specifies
of the offset _of_ the first byte in the data, otherwise it
specifies the offset _from_ the first byte. */
if (sec->flags & SEC_MERGE)
{
void *secinfo;
secinfo = elf_section_data (sec)->sec_info;
if (ELF_ST_TYPE (isym->st_info) == STT_SECTION)
addend = _bfd_merged_section_offset (ref->u.abfd, &sec, secinfo,
isym->st_value + ref->addend);
else
addend = _bfd_merged_section_offset (ref->u.abfd, &sec, secinfo,
isym->st_value) + ref->addend;
}
else
addend = isym->st_value + ref->addend;
}
if (!mips_elf_record_got_page_entry (arg, sec, addend))
{
arg->g = NULL;
return 0;
}
return 1;
}
/* If any entries in G->got_entries are for indirect or warning symbols,
replace them with entries for the target symbol. Convert g->got_page_refs
into got_page_entry structures and estimate the number of page entries
that they require. */
static bfd_boolean
mips_elf_resolve_final_got_entries (struct bfd_link_info *info,
struct mips_got_info *g)
{
struct mips_elf_traverse_got_arg tga;
struct mips_got_info oldg;
oldg = *g;
tga.info = info;
tga.g = g;
tga.value = FALSE;
htab_traverse (g->got_entries, mips_elf_check_recreate_got, &tga);
if (tga.value)
{
*g = oldg;
g->got_entries = htab_create (htab_size (oldg.got_entries),
mips_elf_got_entry_hash,
mips_elf_got_entry_eq, NULL);
if (!g->got_entries)
return FALSE;
htab_traverse (oldg.got_entries, mips_elf_recreate_got, &tga);
if (!tga.g)
return FALSE;
htab_delete (oldg.got_entries);
}
g->got_page_entries = htab_try_create (1, mips_got_page_entry_hash,
mips_got_page_entry_eq, NULL);
if (g->got_page_entries == NULL)
return FALSE;
tga.info = info;
tga.g = g;
htab_traverse (g->got_page_refs, mips_elf_resolve_got_page_ref, &tga);
return TRUE;
}
/* Return true if a GOT entry for H should live in the local rather than
global GOT area. */
static bfd_boolean
mips_use_local_got_p (struct bfd_link_info *info,
struct mips_elf_link_hash_entry *h)
{
/* Symbols that aren't in the dynamic symbol table must live in the
local GOT. This includes symbols that are completely undefined
and which therefore don't bind locally. We'll report undefined
symbols later if appropriate. */
if (h->root.dynindx == -1)
return TRUE;
/* Absolute symbols, if ever they need a GOT entry, cannot ever go
to the local GOT, as they would be implicitly relocated by the
base address by the dynamic loader. */
if (bfd_is_abs_symbol (&h->root.root))
return FALSE;
/* Symbols that bind locally can (and in the case of forced-local
symbols, must) live in the local GOT. */
if (h->got_only_for_calls
? SYMBOL_CALLS_LOCAL (info, &h->root)
: SYMBOL_REFERENCES_LOCAL (info, &h->root))
return TRUE;
/* If this is an executable that must provide a definition of the symbol,
either though PLTs or copy relocations, then that address should go in
the local rather than global GOT. */
if (bfd_link_executable (info) && h->has_static_relocs)
return TRUE;
return FALSE;
}
/* A mips_elf_link_hash_traverse callback for which DATA points to the
link_info structure. Decide whether the hash entry needs an entry in
the global part of the primary GOT, setting global_got_area accordingly.
Count the number of global symbols that are in the primary GOT only
because they have relocations against them (reloc_only_gotno). */
static bfd_boolean
mips_elf_count_got_symbols (struct mips_elf_link_hash_entry *h, void *data)
{
struct bfd_link_info *info;
struct mips_elf_link_hash_table *htab;
struct mips_got_info *g;
info = (struct bfd_link_info *) data;
htab = mips_elf_hash_table (info);
g = htab->got_info;
if (h->global_got_area != GGA_NONE)
{
/* Make a final decision about whether the symbol belongs in the
local or global GOT. */
if (mips_use_local_got_p (info, h))
/* The symbol belongs in the local GOT. We no longer need this
entry if it was only used for relocations; those relocations
will be against the null or section symbol instead of H. */
h->global_got_area = GGA_NONE;
else if (htab->root.target_os == is_vxworks
&& h->got_only_for_calls
&& h->root.plt.plist->mips_offset != MINUS_ONE)
/* On VxWorks, calls can refer directly to the .got.plt entry;
they don't need entries in the regular GOT. .got.plt entries
will be allocated by _bfd_mips_elf_adjust_dynamic_symbol. */
h->global_got_area = GGA_NONE;
else if (h->global_got_area == GGA_RELOC_ONLY)
{
g->reloc_only_gotno++;
g->global_gotno++;
}
}
return 1;
}
/* A htab_traverse callback for GOT entries. Add each one to the GOT
given in mips_elf_traverse_got_arg DATA. Clear DATA->G on error. */
static int
mips_elf_add_got_entry (void **entryp, void *data)
{
struct mips_got_entry *entry;
struct mips_elf_traverse_got_arg *arg;
void **slot;
entry = (struct mips_got_entry *) *entryp;
arg = (struct mips_elf_traverse_got_arg *) data;
slot = htab_find_slot (arg->g->got_entries, entry, INSERT);
if (!slot)
{
arg->g = NULL;
return 0;
}
if (!*slot)
{
*slot = entry;
mips_elf_count_got_entry (arg->info, arg->g, entry);
}
return 1;
}
/* A htab_traverse callback for GOT page entries. Add each one to the GOT
given in mips_elf_traverse_got_arg DATA. Clear DATA->G on error. */
static int
mips_elf_add_got_page_entry (void **entryp, void *data)
{
struct mips_got_page_entry *entry;
struct mips_elf_traverse_got_arg *arg;
void **slot;
entry = (struct mips_got_page_entry *) *entryp;
arg = (struct mips_elf_traverse_got_arg *) data;
slot = htab_find_slot (arg->g->got_page_entries, entry, INSERT);
if (!slot)
{
arg->g = NULL;
return 0;
}
if (!*slot)
{
*slot = entry;
arg->g->page_gotno += entry->num_pages;
}
return 1;
}
/* Consider merging FROM, which is ABFD's GOT, into TO. Return -1 if
this would lead to overflow, 1 if they were merged successfully,
and 0 if a merge failed due to lack of memory. (These values are chosen
so that nonnegative return values can be returned by a htab_traverse
callback.) */
static int
mips_elf_merge_got_with (bfd *abfd, struct mips_got_info *from,
struct mips_got_info *to,
struct mips_elf_got_per_bfd_arg *arg)
{
struct mips_elf_traverse_got_arg tga;
unsigned int estimate;
/* Work out how many page entries we would need for the combined GOT. */
estimate = arg->max_pages;
if (estimate >= from->page_gotno + to->page_gotno)
estimate = from->page_gotno + to->page_gotno;
/* And conservatively estimate how many local and TLS entries
would be needed. */
estimate += from->local_gotno + to->local_gotno;
estimate += from->tls_gotno + to->tls_gotno;
/* If we're merging with the primary got, any TLS relocations will
come after the full set of global entries. Otherwise estimate those
conservatively as well. */
if (to == arg->primary && from->tls_gotno + to->tls_gotno)
estimate += arg->global_count;
else
estimate += from->global_gotno + to->global_gotno;
/* Bail out if the combined GOT might be too big. */
if (estimate > arg->max_count)
return -1;
/* Transfer the bfd's got information from FROM to TO. */
tga.info = arg->info;
tga.g = to;
htab_traverse (from->got_entries, mips_elf_add_got_entry, &tga);
if (!tga.g)
return 0;
htab_traverse (from->got_page_entries, mips_elf_add_got_page_entry, &tga);
if (!tga.g)
return 0;
mips_elf_replace_bfd_got (abfd, to);
return 1;
}
/* Attempt to merge GOT G, which belongs to ABFD. Try to use as much
as possible of the primary got, since it doesn't require explicit
dynamic relocations, but don't use bfds that would reference global
symbols out of the addressable range. Failing the primary got,
attempt to merge with the current got, or finish the current got
and then make make the new got current. */
static bfd_boolean
mips_elf_merge_got (bfd *abfd, struct mips_got_info *g,
struct mips_elf_got_per_bfd_arg *arg)
{
unsigned int estimate;
int result;
if (!mips_elf_resolve_final_got_entries (arg->info, g))
return FALSE;
/* Work out the number of page, local and TLS entries. */
estimate = arg->max_pages;
if (estimate > g->page_gotno)
estimate = g->page_gotno;
estimate += g->local_gotno + g->tls_gotno;
/* We place TLS GOT entries after both locals and globals. The globals
for the primary GOT may overflow the normal GOT size limit, so be
sure not to merge a GOT which requires TLS with the primary GOT in that
case. This doesn't affect non-primary GOTs. */
estimate += (g->tls_gotno > 0 ? arg->global_count : g->global_gotno);
if (estimate <= arg->max_count)
{
/* If we don't have a primary GOT, use it as
a starting point for the primary GOT. */
if (!arg->primary)
{
arg->primary = g;
return TRUE;
}
/* Try merging with the primary GOT. */
result = mips_elf_merge_got_with (abfd, g, arg->primary, arg);
if (result >= 0)
return result;
}
/* If we can merge with the last-created got, do it. */
if (arg->current)
{
result = mips_elf_merge_got_with (abfd, g, arg->current, arg);
if (result >= 0)
return result;
}
/* Well, we couldn't merge, so create a new GOT. Don't check if it
fits; if it turns out that it doesn't, we'll get relocation
overflows anyway. */
g->next = arg->current;
arg->current = g;
return TRUE;
}
/* ENTRYP is a hash table entry for a mips_got_entry. Set its gotidx
to GOTIDX, duplicating the entry if it has already been assigned
an index in a different GOT. */
static bfd_boolean
mips_elf_set_gotidx (void **entryp, long gotidx)
{
struct mips_got_entry *entry;
entry = (struct mips_got_entry *) *entryp;
if (entry->gotidx > 0)
{
struct mips_got_entry *new_entry;
new_entry = bfd_alloc (entry->abfd, sizeof (*entry));
if (!new_entry)
return FALSE;
*new_entry = *entry;
*entryp = new_entry;
entry = new_entry;
}
entry->gotidx = gotidx;
return TRUE;
}
/* Set the TLS GOT index for the GOT entry in ENTRYP. DATA points to a
mips_elf_traverse_got_arg in which DATA->value is the size of one
GOT entry. Set DATA->g to null on failure. */
static int
mips_elf_initialize_tls_index (void **entryp, void *data)
{
struct mips_got_entry *entry;
struct mips_elf_traverse_got_arg *arg;
/* We're only interested in TLS symbols. */
entry = (struct mips_got_entry *) *entryp;
if (entry->tls_type == GOT_TLS_NONE)
return 1;
arg = (struct mips_elf_traverse_got_arg *) data;
if (!mips_elf_set_gotidx (entryp, arg->value * arg->g->tls_assigned_gotno))
{
arg->g = NULL;
return 0;
}
/* Account for the entries we've just allocated. */
arg->g->tls_assigned_gotno += mips_tls_got_entries (entry->tls_type);
return 1;
}
/* A htab_traverse callback for GOT entries, where DATA points to a
mips_elf_traverse_got_arg. Set the global_got_area of each global
symbol to DATA->value. */
static int
mips_elf_set_global_got_area (void **entryp, void *data)
{
struct mips_got_entry *entry;
struct mips_elf_traverse_got_arg *arg;
entry = (struct mips_got_entry *) *entryp;
arg = (struct mips_elf_traverse_got_arg *) data;
if (entry->abfd != NULL
&& entry->symndx == -1
&& entry->d.h->global_got_area != GGA_NONE)
entry->d.h->global_got_area = arg->value;
return 1;
}
/* A htab_traverse callback for secondary GOT entries, where DATA points
to a mips_elf_traverse_got_arg. Assign GOT indices to global entries
and record the number of relocations they require. DATA->value is
the size of one GOT entry. Set DATA->g to null on failure. */
static int
mips_elf_set_global_gotidx (void **entryp, void *data)
{
struct mips_got_entry *entry;
struct mips_elf_traverse_got_arg *arg;
entry = (struct mips_got_entry *) *entryp;
arg = (struct mips_elf_traverse_got_arg *) data;
if (entry->abfd != NULL
&& entry->symndx == -1
&& entry->d.h->global_got_area != GGA_NONE)
{
if (!mips_elf_set_gotidx (entryp, arg->value * arg->g->assigned_low_gotno))
{
arg->g = NULL;
return 0;
}
arg->g->assigned_low_gotno += 1;
if (bfd_link_pic (arg->info)
|| (elf_hash_table (arg->info)->dynamic_sections_created
&& entry->d.h->root.def_dynamic
&& !entry->d.h->root.def_regular))
arg->g->relocs += 1;
}
return 1;
}
/* A htab_traverse callback for GOT entries for which DATA is the
bfd_link_info. Forbid any global symbols from having traditional
lazy-binding stubs. */
static int
mips_elf_forbid_lazy_stubs (void **entryp, void *data)
{
struct bfd_link_info *info;
struct mips_elf_link_hash_table *htab;
struct mips_got_entry *entry;
entry = (struct mips_got_entry *) *entryp;
info = (struct bfd_link_info *) data;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
if (entry->abfd != NULL
&& entry->symndx == -1
&& entry->d.h->needs_lazy_stub)
{
entry->d.h->needs_lazy_stub = FALSE;
htab->lazy_stub_count--;
}
return 1;
}
/* Return the offset of an input bfd IBFD's GOT from the beginning of
the primary GOT. */
static bfd_vma
mips_elf_adjust_gp (bfd *abfd, struct mips_got_info *g, bfd *ibfd)
{
if (!g->next)
return 0;
g = mips_elf_bfd_got (ibfd, FALSE);
if (! g)
return 0;
BFD_ASSERT (g->next);
g = g->next;
return (g->local_gotno + g->global_gotno + g->tls_gotno)
* MIPS_ELF_GOT_SIZE (abfd);
}
/* Turn a single GOT that is too big for 16-bit addressing into
a sequence of GOTs, each one 16-bit addressable. */
static bfd_boolean
mips_elf_multi_got (bfd *abfd, struct bfd_link_info *info,
asection *got, bfd_size_type pages)
{
struct mips_elf_link_hash_table *htab;
struct mips_elf_got_per_bfd_arg got_per_bfd_arg;
struct mips_elf_traverse_got_arg tga;
struct mips_got_info *g, *gg;
unsigned int assign, needed_relocs;
bfd *dynobj, *ibfd;
dynobj = elf_hash_table (info)->dynobj;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
g = htab->got_info;
got_per_bfd_arg.obfd = abfd;
got_per_bfd_arg.info = info;
got_per_bfd_arg.current = NULL;
got_per_bfd_arg.primary = NULL;
got_per_bfd_arg.max_count = ((MIPS_ELF_GOT_MAX_SIZE (info)
/ MIPS_ELF_GOT_SIZE (abfd))
- htab->reserved_gotno);
got_per_bfd_arg.max_pages = pages;
/* The number of globals that will be included in the primary GOT.
See the calls to mips_elf_set_global_got_area below for more
information. */
got_per_bfd_arg.global_count = g->global_gotno;
/* Try to merge the GOTs of input bfds together, as long as they
don't seem to exceed the maximum GOT size, choosing one of them
to be the primary GOT. */
for (ibfd = info->input_bfds; ibfd; ibfd = ibfd->link.next)
{
gg = mips_elf_bfd_got (ibfd, FALSE);
if (gg && !mips_elf_merge_got (ibfd, gg, &got_per_bfd_arg))
return FALSE;
}
/* If we do not find any suitable primary GOT, create an empty one. */
if (got_per_bfd_arg.primary == NULL)
g->next = mips_elf_create_got_info (abfd);
else
g->next = got_per_bfd_arg.primary;
g->next->next = got_per_bfd_arg.current;
/* GG is now the master GOT, and G is the primary GOT. */
gg = g;
g = g->next;
/* Map the output bfd to the primary got. That's what we're going
to use for bfds that use GOT16 or GOT_PAGE relocations that we
didn't mark in check_relocs, and we want a quick way to find it.
We can't just use gg->next because we're going to reverse the
list. */
mips_elf_replace_bfd_got (abfd, g);
/* Every symbol that is referenced in a dynamic relocation must be
present in the primary GOT, so arrange for them to appear after
those that are actually referenced. */
gg->reloc_only_gotno = gg->global_gotno - g->global_gotno;
g->global_gotno = gg->global_gotno;
tga.info = info;
tga.value = GGA_RELOC_ONLY;
htab_traverse (gg->got_entries, mips_elf_set_global_got_area, &tga);
tga.value = GGA_NORMAL;
htab_traverse (g->got_entries, mips_elf_set_global_got_area, &tga);
/* Now go through the GOTs assigning them offset ranges.
[assigned_low_gotno, local_gotno[ will be set to the range of local
entries in each GOT. We can then compute the end of a GOT by
adding local_gotno to global_gotno. We reverse the list and make
it circular since then we'll be able to quickly compute the
beginning of a GOT, by computing the end of its predecessor. To
avoid special cases for the primary GOT, while still preserving
assertions that are valid for both single- and multi-got links,
we arrange for the main got struct to have the right number of
global entries, but set its local_gotno such that the initial
offset of the primary GOT is zero. Remember that the primary GOT
will become the last item in the circular linked list, so it
points back to the master GOT. */
gg->local_gotno = -g->global_gotno;
gg->global_gotno = g->global_gotno;
gg->tls_gotno = 0;
assign = 0;
gg->next = gg;
do
{
struct mips_got_info *gn;
assign += htab->reserved_gotno;
g->assigned_low_gotno = assign;
g->local_gotno += assign;
g->local_gotno += (pages < g->page_gotno ? pages : g->page_gotno);
g->assigned_high_gotno = g->local_gotno - 1;
assign = g->local_gotno + g->global_gotno + g->tls_gotno;
/* Take g out of the direct list, and push it onto the reversed
list that gg points to. g->next is guaranteed to be nonnull after
this operation, as required by mips_elf_initialize_tls_index. */
gn = g->next;
g->next = gg->next;
gg->next = g;
/* Set up any TLS entries. We always place the TLS entries after
all non-TLS entries. */
g->tls_assigned_gotno = g->local_gotno + g->global_gotno;
tga.g = g;
tga.value = MIPS_ELF_GOT_SIZE (abfd);
htab_traverse (g->got_entries, mips_elf_initialize_tls_index, &tga);
if (!tga.g)
return FALSE;
BFD_ASSERT (g->tls_assigned_gotno == assign);
/* Move onto the next GOT. It will be a secondary GOT if nonull. */
g = gn;
/* Forbid global symbols in every non-primary GOT from having
lazy-binding stubs. */
if (g)
htab_traverse (g->got_entries, mips_elf_forbid_lazy_stubs, info);
}
while (g);
got->size = assign * MIPS_ELF_GOT_SIZE (abfd);
needed_relocs = 0;
for (g = gg->next; g && g->next != gg; g = g->next)
{
unsigned int save_assign;
/* Assign offsets to global GOT entries and count how many
relocations they need. */
save_assign = g->assigned_low_gotno;
g->assigned_low_gotno = g->local_gotno;
tga.info = info;
tga.value = MIPS_ELF_GOT_SIZE (abfd);
tga.g = g;
htab_traverse (g->got_entries, mips_elf_set_global_gotidx, &tga);
if (!tga.g)
return FALSE;
BFD_ASSERT (g->assigned_low_gotno == g->local_gotno + g->global_gotno);
g->assigned_low_gotno = save_assign;
if (bfd_link_pic (info))
{
g->relocs += g->local_gotno - g->assigned_low_gotno;
BFD_ASSERT (g->assigned_low_gotno == g->next->local_gotno
+ g->next->global_gotno
+ g->next->tls_gotno
+ htab->reserved_gotno);
}
needed_relocs += g->relocs;
}
needed_relocs += g->relocs;
if (needed_relocs)
mips_elf_allocate_dynamic_relocations (dynobj, info,
needed_relocs);
return TRUE;
}
/* Returns the first relocation of type r_type found, beginning with
RELOCATION. RELEND is one-past-the-end of the relocation table. */
static const Elf_Internal_Rela *
mips_elf_next_relocation (bfd *abfd ATTRIBUTE_UNUSED, unsigned int r_type,
const Elf_Internal_Rela *relocation,
const Elf_Internal_Rela *relend)
{
unsigned long r_symndx = ELF_R_SYM (abfd, relocation->r_info);
while (relocation < relend)
{
if (ELF_R_TYPE (abfd, relocation->r_info) == r_type
&& ELF_R_SYM (abfd, relocation->r_info) == r_symndx)
return relocation;
++relocation;
}
/* We didn't find it. */
return NULL;
}
/* Return whether an input relocation is against a local symbol. */
static bfd_boolean
mips_elf_local_relocation_p (bfd *input_bfd,
const Elf_Internal_Rela *relocation,
asection **local_sections)
{
unsigned long r_symndx;
Elf_Internal_Shdr *symtab_hdr;
size_t extsymoff;
r_symndx = ELF_R_SYM (input_bfd, relocation->r_info);
symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
extsymoff = (elf_bad_symtab (input_bfd)) ? 0 : symtab_hdr->sh_info;
if (r_symndx < extsymoff)
return TRUE;
if (elf_bad_symtab (input_bfd) && local_sections[r_symndx] != NULL)
return TRUE;
return FALSE;
}
/* Sign-extend VALUE, which has the indicated number of BITS. */
bfd_vma
_bfd_mips_elf_sign_extend (bfd_vma value, int bits)
{
if (value & ((bfd_vma) 1 << (bits - 1)))
/* VALUE is negative. */
value |= ((bfd_vma) - 1) << bits;
return value;
}
/* Return non-zero if the indicated VALUE has overflowed the maximum
range expressible by a signed number with the indicated number of
BITS. */
static bfd_boolean
mips_elf_overflow_p (bfd_vma value, int bits)
{
bfd_signed_vma svalue = (bfd_signed_vma) value;
if (svalue > (1 << (bits - 1)) - 1)
/* The value is too big. */
return TRUE;
else if (svalue < -(1 << (bits - 1)))
/* The value is too small. */
return TRUE;
/* All is well. */
return FALSE;
}
/* Calculate the %high function. */
static bfd_vma
mips_elf_high (bfd_vma value)
{
return ((value + (bfd_vma) 0x8000) >> 16) & 0xffff;
}
/* Calculate the %higher function. */
static bfd_vma
mips_elf_higher (bfd_vma value ATTRIBUTE_UNUSED)
{
#ifdef BFD64
return ((value + (bfd_vma) 0x80008000) >> 32) & 0xffff;
#else
abort ();
return MINUS_ONE;
#endif
}
/* Calculate the %highest function. */
static bfd_vma
mips_elf_highest (bfd_vma value ATTRIBUTE_UNUSED)
{
#ifdef BFD64
return ((value + (((bfd_vma) 0x8000 << 32) | 0x80008000)) >> 48) & 0xffff;
#else
abort ();
return MINUS_ONE;
#endif
}
/* Create the .compact_rel section. */
static bfd_boolean
mips_elf_create_compact_rel_section
(bfd *abfd, struct bfd_link_info *info ATTRIBUTE_UNUSED)
{
flagword flags;
register asection *s;
if (bfd_get_linker_section (abfd, ".compact_rel") == NULL)
{
flags = (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED
| SEC_READONLY);
s = bfd_make_section_anyway_with_flags (abfd, ".compact_rel", flags);
if (s == NULL
|| !bfd_set_section_alignment (s, MIPS_ELF_LOG_FILE_ALIGN (abfd)))
return FALSE;
s->size = sizeof (Elf32_External_compact_rel);
}
return TRUE;
}
/* Create the .got section to hold the global offset table. */
static bfd_boolean
mips_elf_create_got_section (bfd *abfd, struct bfd_link_info *info)
{
flagword flags;
register asection *s;
struct elf_link_hash_entry *h;
struct bfd_link_hash_entry *bh;
struct mips_elf_link_hash_table *htab;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
/* This function may be called more than once. */
if (htab->root.sgot)
return TRUE;
flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
| SEC_LINKER_CREATED);
/* We have to use an alignment of 2**4 here because this is hardcoded
in the function stub generation and in the linker script. */
s = bfd_make_section_anyway_with_flags (abfd, ".got", flags);
if (s == NULL
|| !bfd_set_section_alignment (s, 4))
return FALSE;
htab->root.sgot = s;
/* Define the symbol _GLOBAL_OFFSET_TABLE_. We don't do this in the
linker script because we don't want to define the symbol if we
are not creating a global offset table. */
bh = NULL;
if (! (_bfd_generic_link_add_one_symbol
(info, abfd, "_GLOBAL_OFFSET_TABLE_", BSF_GLOBAL, s,
0, NULL, FALSE, get_elf_backend_data (abfd)->collect, &bh)))
return FALSE;
h = (struct elf_link_hash_entry *) bh;
h->non_elf = 0;
h->def_regular = 1;
h->type = STT_OBJECT;
h->other = (h->other & ~ELF_ST_VISIBILITY (-1)) | STV_HIDDEN;
elf_hash_table (info)->hgot = h;
if (bfd_link_pic (info)
&& ! bfd_elf_link_record_dynamic_symbol (info, h))
return FALSE;
htab->got_info = mips_elf_create_got_info (abfd);
mips_elf_section_data (s)->elf.this_hdr.sh_flags
|= SHF_ALLOC | SHF_WRITE | SHF_MIPS_GPREL;
/* We also need a .got.plt section when generating PLTs. */
s = bfd_make_section_anyway_with_flags (abfd, ".got.plt",
SEC_ALLOC | SEC_LOAD
| SEC_HAS_CONTENTS
| SEC_IN_MEMORY
| SEC_LINKER_CREATED);
if (s == NULL)
return FALSE;
htab->root.sgotplt = s;
return TRUE;
}
/* Return true if H refers to the special VxWorks __GOTT_BASE__ or
__GOTT_INDEX__ symbols. These symbols are only special for
shared objects; they are not used in executables. */
static bfd_boolean
is_gott_symbol (struct bfd_link_info *info, struct elf_link_hash_entry *h)
{
return (mips_elf_hash_table (info)->root.target_os == is_vxworks
&& bfd_link_pic (info)
&& (strcmp (h->root.root.string, "__GOTT_BASE__") == 0
|| strcmp (h->root.root.string, "__GOTT_INDEX__") == 0));
}
/* Return TRUE if a relocation of type R_TYPE from INPUT_BFD might
require an la25 stub. See also mips_elf_local_pic_function_p,
which determines whether the destination function ever requires a
stub. */
static bfd_boolean
mips_elf_relocation_needs_la25_stub (bfd *input_bfd, int r_type,
bfd_boolean target_is_16_bit_code_p)
{
/* We specifically ignore branches and jumps from EF_PIC objects,
where the onus is on the compiler or programmer to perform any
necessary initialization of $25. Sometimes such initialization
is unnecessary; for example, -mno-shared functions do not use
the incoming value of $25, and may therefore be called directly. */
if (PIC_OBJECT_P (input_bfd))
return FALSE;
switch (r_type)
{
case R_MIPS_26:
case R_MIPS_PC16:
case R_MIPS_PC21_S2:
case R_MIPS_PC26_S2:
case R_MICROMIPS_26_S1:
case R_MICROMIPS_PC7_S1:
case R_MICROMIPS_PC10_S1:
case R_MICROMIPS_PC16_S1:
case R_MICROMIPS_PC23_S2:
return TRUE;
case R_MIPS16_26:
return !target_is_16_bit_code_p;
default:
return FALSE;
}
}
/* Obtain the field relocated by RELOCATION. */
static bfd_vma
mips_elf_obtain_contents (reloc_howto_type *howto,
const Elf_Internal_Rela *relocation,
bfd *input_bfd, bfd_byte *contents)
{
bfd_vma x = 0;
bfd_byte *location = contents + relocation->r_offset;
unsigned int size = bfd_get_reloc_size (howto);
/* Obtain the bytes. */
if (size != 0)
x = bfd_get (8 * size, input_bfd, location);
return x;
}
/* Store the field relocated by RELOCATION. */
static void
mips_elf_store_contents (reloc_howto_type *howto,
const Elf_Internal_Rela *relocation,
bfd *input_bfd, bfd_byte *contents, bfd_vma x)
{
bfd_byte *location = contents + relocation->r_offset;
unsigned int size = bfd_get_reloc_size (howto);
/* Put the value into the output. */
if (size != 0)
bfd_put (8 * size, input_bfd, x, location);
}
/* Try to patch a load from GOT instruction in CONTENTS pointed to by
RELOCATION described by HOWTO, with a move of 0 to the load target
register, returning TRUE if that is successful and FALSE otherwise.
If DOIT is FALSE, then only determine it patching is possible and
return status without actually changing CONTENTS.
*/
static bfd_boolean
mips_elf_nullify_got_load (bfd *input_bfd, bfd_byte *contents,
const Elf_Internal_Rela *relocation,
reloc_howto_type *howto, bfd_boolean doit)
{
int r_type = ELF_R_TYPE (input_bfd, relocation->r_info);
bfd_byte *location = contents + relocation->r_offset;
bfd_boolean nullified = TRUE;
bfd_vma x;
_bfd_mips_elf_reloc_unshuffle (input_bfd, r_type, FALSE, location);
/* Obtain the current value. */
x = mips_elf_obtain_contents (howto, relocation, input_bfd, contents);
/* Note that in the unshuffled MIPS16 encoding RX is at bits [21:19]
while RY is at bits [18:16] of the combined 32-bit instruction word. */
if (mips16_reloc_p (r_type)
&& (((x >> 22) & 0x3ff) == 0x3d3 /* LW */
|| ((x >> 22) & 0x3ff) == 0x3c7)) /* LD */
x = (0x3cdU << 22) | (x & (7 << 16)) << 3; /* LI */
else if (micromips_reloc_p (r_type)
&& ((x >> 26) & 0x37) == 0x37) /* LW/LD */
x = (0xc << 26) | (x & (0x1f << 21)); /* ADDIU */
else if (((x >> 26) & 0x3f) == 0x23 /* LW */
|| ((x >> 26) & 0x3f) == 0x37) /* LD */
x = (0x9 << 26) | (x & (0x1f << 16)); /* ADDIU */
else
nullified = FALSE;
/* Put the value into the output. */
if (doit && nullified)
mips_elf_store_contents (howto, relocation, input_bfd, contents, x);
_bfd_mips_elf_reloc_shuffle (input_bfd, r_type, FALSE, location);
return nullified;
}
/* Calculate the value produced by the RELOCATION (which comes from
the INPUT_BFD). The ADDEND is the addend to use for this
RELOCATION; RELOCATION->R_ADDEND is ignored.
The result of the relocation calculation is stored in VALUEP.
On exit, set *CROSS_MODE_JUMP_P to true if the relocation field
is a MIPS16 or microMIPS jump to standard MIPS code, or vice versa.
This function returns bfd_reloc_continue if the caller need take no
further action regarding this relocation, bfd_reloc_notsupported if
something goes dramatically wrong, bfd_reloc_overflow if an
overflow occurs, and bfd_reloc_ok to indicate success. */
static bfd_reloc_status_type
mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd,
asection *input_section, bfd_byte *contents,
struct bfd_link_info *info,
const Elf_Internal_Rela *relocation,
bfd_vma addend, reloc_howto_type *howto,
Elf_Internal_Sym *local_syms,
asection **local_sections, bfd_vma *valuep,
const char **namep,
bfd_boolean *cross_mode_jump_p,
bfd_boolean save_addend)
{
/* The eventual value we will return. */
bfd_vma value;
/* The address of the symbol against which the relocation is
occurring. */
bfd_vma symbol = 0;
/* The final GP value to be used for the relocatable, executable, or
shared object file being produced. */
bfd_vma gp;
/* The place (section offset or address) of the storage unit being
relocated. */
bfd_vma p;
/* The value of GP used to create the relocatable object. */
bfd_vma gp0;
/* The offset into the global offset table at which the address of
the relocation entry symbol, adjusted by the addend, resides
during execution. */
bfd_vma g = MINUS_ONE;
/* The section in which the symbol referenced by the relocation is
located. */
asection *sec = NULL;
struct mips_elf_link_hash_entry *h = NULL;
/* TRUE if the symbol referred to by this relocation is a local
symbol. */
bfd_boolean local_p, was_local_p;
/* TRUE if the symbol referred to by this relocation is a section
symbol. */
bfd_boolean section_p = FALSE;
/* TRUE if the symbol referred to by this relocation is "_gp_disp". */
bfd_boolean gp_disp_p = FALSE;
/* TRUE if the symbol referred to by this relocation is
"__gnu_local_gp". */
bfd_boolean gnu_local_gp_p = FALSE;
Elf_Internal_Shdr *symtab_hdr;
size_t extsymoff;
unsigned long r_symndx;
int r_type;
/* TRUE if overflow occurred during the calculation of the
relocation value. */
bfd_boolean overflowed_p;
/* TRUE if this relocation refers to a MIPS16 function. */
bfd_boolean target_is_16_bit_code_p = FALSE;
bfd_boolean target_is_micromips_code_p = FALSE;
struct mips_elf_link_hash_table *htab;
bfd *dynobj;
bfd_boolean resolved_to_zero;
dynobj = elf_hash_table (info)->dynobj;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
/* Parse the relocation. */
r_symndx = ELF_R_SYM (input_bfd, relocation->r_info);
r_type = ELF_R_TYPE (input_bfd, relocation->r_info);
p = (input_section->output_section->vma
+ input_section->output_offset
+ relocation->r_offset);
/* Assume that there will be no overflow. */
overflowed_p = FALSE;
/* Figure out whether or not the symbol is local, and get the offset
used in the array of hash table entries. */
symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
local_p = mips_elf_local_relocation_p (input_bfd, relocation,
local_sections);
was_local_p = local_p;
if (! elf_bad_symtab (input_bfd))
extsymoff = symtab_hdr->sh_info;
else
{
/* The symbol table does not follow the rule that local symbols
must come before globals. */
extsymoff = 0;
}
/* Figure out the value of the symbol. */
if (local_p)
{
bfd_boolean micromips_p = MICROMIPS_P (abfd);
Elf_Internal_Sym *sym;
sym = local_syms + r_symndx;
sec = local_sections[r_symndx];
section_p = ELF_ST_TYPE (sym->st_info) == STT_SECTION;
symbol = sec->output_section->vma + sec->output_offset;
if (!section_p || (sec->flags & SEC_MERGE))
symbol += sym->st_value;
if ((sec->flags & SEC_MERGE) && section_p)
{
addend = _bfd_elf_rel_local_sym (abfd, sym, &sec, addend);
addend -= symbol;
addend += sec->output_section->vma + sec->output_offset;
}
/* MIPS16/microMIPS text labels should be treated as odd. */
if (ELF_ST_IS_COMPRESSED (sym->st_other))
++symbol;
/* Record the name of this symbol, for our caller. */
*namep = bfd_elf_string_from_elf_section (input_bfd,
symtab_hdr->sh_link,
sym->st_name);
if (*namep == NULL || **namep == '\0')
*namep = bfd_section_name (sec);
/* For relocations against a section symbol and ones against no
symbol (absolute relocations) infer the ISA mode from the addend. */
if (section_p || r_symndx == STN_UNDEF)
{
target_is_16_bit_code_p = (addend & 1) && !micromips_p;
target_is_micromips_code_p = (addend & 1) && micromips_p;
}
/* For relocations against an absolute symbol infer the ISA mode
from the value of the symbol plus addend. */
else if (bfd_is_abs_section (sec))
{
target_is_16_bit_code_p = ((symbol + addend) & 1) && !micromips_p;
target_is_micromips_code_p = ((symbol + addend) & 1) && micromips_p;
}
/* Otherwise just use the regular symbol annotation available. */
else
{
target_is_16_bit_code_p = ELF_ST_IS_MIPS16 (sym->st_other);
target_is_micromips_code_p = ELF_ST_IS_MICROMIPS (sym->st_other);
}
}
else
{
/* ??? Could we use RELOC_FOR_GLOBAL_SYMBOL here ? */
/* For global symbols we look up the symbol in the hash-table. */
h = ((struct mips_elf_link_hash_entry *)
elf_sym_hashes (input_bfd) [r_symndx - extsymoff]);
/* Find the real hash-table entry for this symbol. */
while (h->root.root.type == bfd_link_hash_indirect
|| h->root.root.type == bfd_link_hash_warning)
h = (struct mips_elf_link_hash_entry *) h->root.root.u.i.link;
/* Record the name of this symbol, for our caller. */
*namep = h->root.root.root.string;
/* See if this is the special _gp_disp symbol. Note that such a
symbol must always be a global symbol. */
if (strcmp (*namep, "_gp_disp") == 0
&& ! NEWABI_P (input_bfd))
{
/* Relocations against _gp_disp are permitted only with
R_MIPS_HI16 and R_MIPS_LO16 relocations. */
if (!hi16_reloc_p (r_type) && !lo16_reloc_p (r_type))
return bfd_reloc_notsupported;
gp_disp_p = TRUE;
}
/* See if this is the special _gp symbol. Note that such a
symbol must always be a global symbol. */
else if (strcmp (*namep, "__gnu_local_gp") == 0)
gnu_local_gp_p = TRUE;
/* If this symbol is defined, calculate its address. Note that
_gp_disp is a magic symbol, always implicitly defined by the
linker, so it's inappropriate to check to see whether or not
its defined. */
else if ((h->root.root.type == bfd_link_hash_defined
|| h->root.root.type == bfd_link_hash_defweak)
&& h->root.root.u.def.section)
{
sec = h->root.root.u.def.section;
if (sec->output_section)
symbol = (h->root.root.u.def.value
+ sec->output_section->vma
+ sec->output_offset);
else
symbol = h->root.root.u.def.value;
}
else if (h->root.root.type == bfd_link_hash_undefweak)
/* We allow relocations against undefined weak symbols, giving
it the value zero, so that you can undefined weak functions
and check to see if they exist by looking at their
addresses. */
symbol = 0;
else if (info->unresolved_syms_in_objects == RM_IGNORE
&& ELF_ST_VISIBILITY (h->root.other) == STV_DEFAULT)
symbol = 0;
else if (strcmp (*namep, SGI_COMPAT (input_bfd)
? "_DYNAMIC_LINK" : "_DYNAMIC_LINKING") == 0)
{
/* If this is a dynamic link, we should have created a
_DYNAMIC_LINK symbol or _DYNAMIC_LINKING(for normal mips) symbol
in _bfd_mips_elf_create_dynamic_sections.
Otherwise, we should define the symbol with a value of 0.
FIXME: It should probably get into the symbol table
somehow as well. */
BFD_ASSERT (! bfd_link_pic (info));
BFD_ASSERT (bfd_get_section_by_name (abfd, ".dynamic") == NULL);
symbol = 0;
}
else if (ELF_MIPS_IS_OPTIONAL (h->root.other))
{
/* This is an optional symbol - an Irix specific extension to the
ELF spec. Ignore it for now.
XXX - FIXME - there is more to the spec for OPTIONAL symbols
than simply ignoring them, but we do not handle this for now.
For information see the "64-bit ELF Object File Specification"
which is available from here:
http://techpubs.sgi.com/library/manuals/4000/007-4658-001/pdf/007-4658-001.pdf */
symbol = 0;
}
else
{
bfd_boolean reject_undefined
= (info->unresolved_syms_in_objects == RM_DIAGNOSE
&& !info->warn_unresolved_syms)
|| ELF_ST_VISIBILITY (h->root.other) != STV_DEFAULT;
info->callbacks->undefined_symbol
(info, h->root.root.root.string, input_bfd,
input_section, relocation->r_offset, reject_undefined);
if (reject_undefined)
return bfd_reloc_undefined;
symbol = 0;
}
target_is_16_bit_code_p = ELF_ST_IS_MIPS16 (h->root.other);
target_is_micromips_code_p = ELF_ST_IS_MICROMIPS (h->root.other);
}
/* If this is a reference to a 16-bit function with a stub, we need
to redirect the relocation to the stub unless:
(a) the relocation is for a MIPS16 JAL;
(b) the relocation is for a MIPS16 PIC call, and there are no
non-MIPS16 uses of the GOT slot; or
(c) the section allows direct references to MIPS16 functions. */
if (r_type != R_MIPS16_26
&& !bfd_link_relocatable (info)
&& ((h != NULL
&& h->fn_stub != NULL
&& (r_type != R_MIPS16_CALL16 || h->need_fn_stub))
|| (local_p
&& mips_elf_tdata (input_bfd)->local_stubs != NULL
&& mips_elf_tdata (input_bfd)->local_stubs[r_symndx] != NULL))
&& !section_allows_mips16_refs_p (input_section))
{
/* This is a 32- or 64-bit call to a 16-bit function. We should
have already noticed that we were going to need the
stub. */
if (local_p)
{
sec = mips_elf_tdata (input_bfd)->local_stubs[r_symndx];
value = 0;
}
else
{
BFD_ASSERT (h->need_fn_stub);
if (h->la25_stub)
{
/* If a LA25 header for the stub itself exists, point to the
prepended LUI/ADDIU sequence. */
sec = h->la25_stub->stub_section;
value = h->la25_stub->offset;
}
else
{
sec = h->fn_stub;
value = 0;
}
}
symbol = sec->output_section->vma + sec->output_offset + value;
/* The target is 16-bit, but the stub isn't. */
target_is_16_bit_code_p = FALSE;
}
/* If this is a MIPS16 call with a stub, that is made through the PLT or
to a standard MIPS function, we need to redirect the call to the stub.
Note that we specifically exclude R_MIPS16_CALL16 from this behavior;
indirect calls should use an indirect stub instead. */
else if (r_type == R_MIPS16_26 && !bfd_link_relocatable (info)
&& ((h != NULL && (h->call_stub != NULL || h->call_fp_stub != NULL))
|| (local_p
&& mips_elf_tdata (input_bfd)->local_call_stubs != NULL
&& mips_elf_tdata (input_bfd)->local_call_stubs[r_symndx] != NULL))
&& ((h != NULL && h->use_plt_entry) || !target_is_16_bit_code_p))
{
if (local_p)
sec = mips_elf_tdata (input_bfd)->local_call_stubs[r_symndx];
else
{
/* If both call_stub and call_fp_stub are defined, we can figure
out which one to use by checking which one appears in the input
file. */
if (h->call_stub != NULL && h->call_fp_stub != NULL)
{
asection *o;
sec = NULL;
for (o = input_bfd->sections; o != NULL; o = o->next)
{
if (CALL_FP_STUB_P (bfd_section_name (o)))
{
sec = h->call_fp_stub;
break;
}
}
if (sec == NULL)
sec = h->call_stub;
}
else if (h->call_stub != NULL)
sec = h->call_stub;
else
sec = h->call_fp_stub;
}
BFD_ASSERT (sec->size > 0);
symbol = sec->output_section->vma + sec->output_offset;
}
/* If this is a direct call to a PIC function, redirect to the
non-PIC stub. */
else if (h != NULL && h->la25_stub
&& mips_elf_relocation_needs_la25_stub (input_bfd, r_type,
target_is_16_bit_code_p))
{
symbol = (h->la25_stub->stub_section->output_section->vma
+ h->la25_stub->stub_section->output_offset
+ h->la25_stub->offset);
if (ELF_ST_IS_MICROMIPS (h->root.other))
symbol |= 1;
}
/* For direct MIPS16 and microMIPS calls make sure the compressed PLT
entry is used if a standard PLT entry has also been made. In this
case the symbol will have been set by mips_elf_set_plt_sym_value
to point to the standard PLT entry, so redirect to the compressed
one. */
else if ((mips16_branch_reloc_p (r_type)
|| micromips_branch_reloc_p (r_type))
&& !bfd_link_relocatable (info)
&& h != NULL
&& h->use_plt_entry
&& h->root.plt.plist->comp_offset != MINUS_ONE
&& h->root.plt.plist->mips_offset != MINUS_ONE)
{
bfd_boolean micromips_p = MICROMIPS_P (abfd);
sec = htab->root.splt;
symbol = (sec->output_section->vma
+ sec->output_offset
+ htab->plt_header_size
+ htab->plt_mips_offset
+ h->root.plt.plist->comp_offset
+ 1);
target_is_16_bit_code_p = !micromips_p;
target_is_micromips_code_p = micromips_p;
}
/* Make sure MIPS16 and microMIPS are not used together. */
if ((mips16_branch_reloc_p (r_type) && target_is_micromips_code_p)
|| (micromips_branch_reloc_p (r_type) && target_is_16_bit_code_p))
{
_bfd_error_handler
(_("MIPS16 and microMIPS functions cannot call each other"));
return bfd_reloc_notsupported;
}
/* Calls from 16-bit code to 32-bit code and vice versa require the
mode change. However, we can ignore calls to undefined weak symbols,
which should never be executed at runtime. This exception is important
because the assembly writer may have "known" that any definition of the
symbol would be 16-bit code, and that direct jumps were therefore
acceptable. */
*cross_mode_jump_p = (!bfd_link_relocatable (info)
&& !(h && h->root.root.type == bfd_link_hash_undefweak)
&& ((mips16_branch_reloc_p (r_type)
&& !target_is_16_bit_code_p)
|| (micromips_branch_reloc_p (r_type)
&& !target_is_micromips_code_p)
|| ((branch_reloc_p (r_type)
|| r_type == R_MIPS_JALR)
&& (target_is_16_bit_code_p
|| target_is_micromips_code_p))));
resolved_to_zero = (h != NULL
&& UNDEFWEAK_NO_DYNAMIC_RELOC (info, &h->root));
switch (r_type)
{
case R_MIPS16_CALL16:
case R_MIPS16_GOT16:
case R_MIPS_CALL16:
case R_MIPS_GOT16:
case R_MIPS_GOT_PAGE:
case R_MIPS_GOT_DISP:
case R_MIPS_GOT_LO16:
case R_MIPS_CALL_LO16:
case R_MICROMIPS_CALL16:
case R_MICROMIPS_GOT16:
case R_MICROMIPS_GOT_PAGE:
case R_MICROMIPS_GOT_DISP:
case R_MICROMIPS_GOT_LO16:
case R_MICROMIPS_CALL_LO16:
if (resolved_to_zero
&& !bfd_link_relocatable (info)
&& mips_elf_nullify_got_load (input_bfd, contents,
relocation, howto, TRUE))
return bfd_reloc_continue;
/* Fall through. */
case R_MIPS_GOT_HI16:
case R_MIPS_CALL_HI16:
case R_MICROMIPS_GOT_HI16:
case R_MICROMIPS_CALL_HI16:
if (resolved_to_zero
&& htab->use_absolute_zero
&& bfd_link_pic (info))
{
/* Redirect to the special `__gnu_absolute_zero' symbol. */
h = mips_elf_link_hash_lookup (htab, "__gnu_absolute_zero",
FALSE, FALSE, FALSE);
BFD_ASSERT (h != NULL);
}
break;
}
local_p = (h == NULL || mips_use_local_got_p (info, h));
gp0 = _bfd_get_gp_value (input_bfd);
gp = _bfd_get_gp_value (abfd);
if (htab->got_info)
gp += mips_elf_adjust_gp (abfd, htab->got_info, input_bfd);
if (gnu_local_gp_p)
symbol = gp;
/* Global R_MIPS_GOT_PAGE/R_MICROMIPS_GOT_PAGE relocations are equivalent
to R_MIPS_GOT_DISP/R_MICROMIPS_GOT_DISP. The addend is applied by the
corresponding R_MIPS_GOT_OFST/R_MICROMIPS_GOT_OFST. */
if (got_page_reloc_p (r_type) && !local_p)
{
r_type = (micromips_reloc_p (r_type)
? R_MICROMIPS_GOT_DISP : R_MIPS_GOT_DISP);
addend = 0;
}
/* If we haven't already determined the GOT offset, and we're going
to need it, get it now. */
switch (r_type)
{
case R_MIPS16_CALL16:
case R_MIPS16_GOT16:
case R_MIPS_CALL16:
case R_MIPS_GOT16:
case R_MIPS_GOT_DISP:
case R_MIPS_GOT_HI16:
case R_MIPS_CALL_HI16:
case R_MIPS_GOT_LO16:
case R_MIPS_CALL_LO16:
case R_MICROMIPS_CALL16:
case R_MICROMIPS_GOT16:
case R_MICROMIPS_GOT_DISP:
case R_MICROMIPS_GOT_HI16:
case R_MICROMIPS_CALL_HI16:
case R_MICROMIPS_GOT_LO16:
case R_MICROMIPS_CALL_LO16:
case R_MIPS_TLS_GD:
case R_MIPS_TLS_GOTTPREL:
case R_MIPS_TLS_LDM:
case R_MIPS16_TLS_GD:
case R_MIPS16_TLS_GOTTPREL:
case R_MIPS16_TLS_LDM:
case R_MICROMIPS_TLS_GD:
case R_MICROMIPS_TLS_GOTTPREL:
case R_MICROMIPS_TLS_LDM:
/* Find the index into the GOT where this value is located. */
if (tls_ldm_reloc_p (r_type))
{
g = mips_elf_local_got_index (abfd, input_bfd, info,
0, 0, NULL, r_type);
if (g == MINUS_ONE)
return bfd_reloc_outofrange;
}
else if (!local_p)
{
/* On VxWorks, CALL relocations should refer to the .got.plt
entry, which is initialized to point at the PLT stub. */
if (htab->root.target_os == is_vxworks
&& (call_hi16_reloc_p (r_type)
|| call_lo16_reloc_p (r_type)
|| call16_reloc_p (r_type)))
{
BFD_ASSERT (addend == 0);
BFD_ASSERT (h->root.needs_plt);
g = mips_elf_gotplt_index (info, &h->root);
}
else
{
BFD_ASSERT (addend == 0);
g = mips_elf_global_got_index (abfd, info, input_bfd,
&h->root, r_type);
if (!TLS_RELOC_P (r_type)
&& !elf_hash_table (info)->dynamic_sections_created)
/* This is a static link. We must initialize the GOT entry. */
MIPS_ELF_PUT_WORD (dynobj, symbol, htab->root.sgot->contents + g);
}
}
else if (htab->root.target_os != is_vxworks
&& (call16_reloc_p (r_type) || got16_reloc_p (r_type)))
/* The calculation below does not involve "g". */
break;
else
{
g = mips_elf_local_got_index (abfd, input_bfd, info,
symbol + addend, r_symndx, h, r_type);
if (g == MINUS_ONE)
return bfd_reloc_outofrange;
}
/* Convert GOT indices to actual offsets. */
g = mips_elf_got_offset_from_index (info, abfd, input_bfd, g);
break;
}
/* Relocations against the VxWorks __GOTT_BASE__ and __GOTT_INDEX__
symbols are resolved by the loader. Add them to .rela.dyn. */
if (h != NULL && is_gott_symbol (info, &h->root))
{
Elf_Internal_Rela outrel;
bfd_byte *loc;
asection *s;
s = mips_elf_rel_dyn_section (info, FALSE);
loc = s->contents + s->reloc_count++ * sizeof (Elf32_External_Rela);
outrel.r_offset = (input_section->output_section->vma
+ input_section->output_offset
+ relocation->r_offset);
outrel.r_info = ELF32_R_INFO (h->root.dynindx, r_type);
outrel.r_addend = addend;
bfd_elf32_swap_reloca_out (abfd, &outrel, loc);
/* If we've written this relocation for a readonly section,
we need to set DF_TEXTREL again, so that we do not delete the
DT_TEXTREL tag. */
if (MIPS_ELF_READONLY_SECTION (input_section))
info->flags |= DF_TEXTREL;
*valuep = 0;
return bfd_reloc_ok;
}
/* Figure out what kind of relocation is being performed. */
switch (r_type)
{
case R_MIPS_NONE:
return bfd_reloc_continue;
case R_MIPS_16:
if (howto->partial_inplace)
addend = _bfd_mips_elf_sign_extend (addend, 16);
value = symbol + addend;
overflowed_p = mips_elf_overflow_p (value, 16);
break;
case R_MIPS_32:
case R_MIPS_REL32:
case R_MIPS_64:
if ((bfd_link_pic (info)
|| (htab->root.dynamic_sections_created
&& h != NULL
&& h->root.def_dynamic
&& !h->root.def_regular
&& !h->has_static_relocs))
&& r_symndx != STN_UNDEF
&& (h == NULL
|| h->root.root.type != bfd_link_hash_undefweak
|| (ELF_ST_VISIBILITY (h->root.other) == STV_DEFAULT
&& !resolved_to_zero))
&& (input_section->flags & SEC_ALLOC) != 0)
{
/* If we're creating a shared library, then we can't know
where the symbol will end up. So, we create a relocation
record in the output, and leave the job up to the dynamic
linker. We must do the same for executable references to
shared library symbols, unless we've decided to use copy
relocs or PLTs instead. */
value = addend;
if (!mips_elf_create_dynamic_relocation (abfd,
info,
relocation,
h,
sec,
symbol,
&value,
input_section))
return bfd_reloc_undefined;
}
else
{
if (r_type != R_MIPS_REL32)
value = symbol + addend;
else
value = addend;
}
value &= howto->dst_mask;
break;
case R_MIPS_PC32:
value = symbol + addend - p;
value &= howto->dst_mask;
break;
case R_MIPS16_26:
/* The calculation for R_MIPS16_26 is just the same as for an
R_MIPS_26. It's only the storage of the relocated field into
the output file that's different. That's handled in
mips_elf_perform_relocation. So, we just fall through to the
R_MIPS_26 case here. */
case R_MIPS_26:
case R_MICROMIPS_26_S1:
{
unsigned int shift;
/* Shift is 2, unusually, for microMIPS JALX. */
shift = (!*cross_mode_jump_p && r_type == R_MICROMIPS_26_S1) ? 1 : 2;
if (howto->partial_inplace && !section_p)
value = _bfd_mips_elf_sign_extend (addend, 26 + shift);
else
value = addend;
value += symbol;
/* Make sure the target of a jump is suitably aligned. Bit 0 must
be the correct ISA mode selector except for weak undefined
symbols. */
if ((was_local_p || h->root.root.type != bfd_link_hash_undefweak)
&& (*cross_mode_jump_p
? (value & 3) != (r_type == R_MIPS_26)
: (value & ((1 << shift) - 1)) != (r_type != R_MIPS_26)))
return bfd_reloc_outofrange;
value >>= shift;
if (was_local_p || h->root.root.type != bfd_link_hash_undefweak)
overflowed_p = (value >> 26) != ((p + 4) >> (26 + shift));
value &= howto->dst_mask;
}
break;
case R_MIPS_TLS_DTPREL_HI16:
case R_MIPS16_TLS_DTPREL_HI16:
case R_MICROMIPS_TLS_DTPREL_HI16:
value = (mips_elf_high (addend + symbol - dtprel_base (info))
& howto->dst_mask);
break;
case R_MIPS_TLS_DTPREL_LO16:
case R_MIPS_TLS_DTPREL32:
case R_MIPS_TLS_DTPREL64:
case R_MIPS16_TLS_DTPREL_LO16:
case R_MICROMIPS_TLS_DTPREL_LO16:
value = (symbol + addend - dtprel_base (info)) & howto->dst_mask;
break;
case R_MIPS_TLS_TPREL_HI16:
case R_MIPS16_TLS_TPREL_HI16:
case R_MICROMIPS_TLS_TPREL_HI16:
value = (mips_elf_high (addend + symbol - tprel_base (info))
& howto->dst_mask);
break;
case R_MIPS_TLS_TPREL_LO16:
case R_MIPS_TLS_TPREL32:
case R_MIPS_TLS_TPREL64:
case R_MIPS16_TLS_TPREL_LO16:
case R_MICROMIPS_TLS_TPREL_LO16:
value = (symbol + addend - tprel_base (info)) & howto->dst_mask;
break;
case R_MIPS_HI16:
case R_MIPS16_HI16:
case R_MICROMIPS_HI16:
if (!gp_disp_p)
{
value = mips_elf_high (addend + symbol);
value &= howto->dst_mask;
}
else
{
/* For MIPS16 ABI code we generate this sequence
0: li $v0,%hi(_gp_disp)
4: addiupc $v1,%lo(_gp_disp)
8: sll $v0,16
12: addu $v0,$v1
14: move $gp,$v0
So the offsets of hi and lo relocs are the same, but the
base $pc is that used by the ADDIUPC instruction at $t9 + 4.
ADDIUPC clears the low two bits of the instruction address,
so the base is ($t9 + 4) & ~3. */
if (r_type == R_MIPS16_HI16)
value = mips_elf_high (addend + gp - ((p + 4) & ~(bfd_vma) 0x3));
/* The microMIPS .cpload sequence uses the same assembly
instructions as the traditional psABI version, but the
incoming $t9 has the low bit set. */
else if (r_type == R_MICROMIPS_HI16)
value = mips_elf_high (addend + gp - p - 1);
else
value = mips_elf_high (addend + gp - p);
}
break;
case R_MIPS_LO16:
case R_MIPS16_LO16:
case R_MICROMIPS_LO16:
case R_MICROMIPS_HI0_LO16:
if (!gp_disp_p)
value = (symbol + addend) & howto->dst_mask;
else
{
/* See the comment for R_MIPS16_HI16 above for the reason
for this conditional. */
if (r_type == R_MIPS16_LO16)
value = addend + gp - (p & ~(bfd_vma) 0x3);
else if (r_type == R_MICROMIPS_LO16
|| r_type == R_MICROMIPS_HI0_LO16)
value = addend + gp - p + 3;
else
value = addend + gp - p + 4;
/* The MIPS ABI requires checking the R_MIPS_LO16 relocation
for overflow. But, on, say, IRIX5, relocations against
_gp_disp are normally generated from the .cpload
pseudo-op. It generates code that normally looks like
this:
lui $gp,%hi(_gp_disp)
addiu $gp,$gp,%lo(_gp_disp)
addu $gp,$gp,$t9
Here $t9 holds the address of the function being called,
as required by the MIPS ELF ABI. The R_MIPS_LO16
relocation can easily overflow in this situation, but the
R_MIPS_HI16 relocation will handle the overflow.
Therefore, we consider this a bug in the MIPS ABI, and do
not check for overflow here. */
}
break;
case R_MIPS_LITERAL:
case R_MICROMIPS_LITERAL:
/* Because we don't merge literal sections, we can handle this
just like R_MIPS_GPREL16. In the long run, we should merge
shared literals, and then we will need to additional work
here. */
/* Fall through. */
case R_MIPS16_GPREL:
/* The R_MIPS16_GPREL performs the same calculation as
R_MIPS_GPREL16, but stores the relocated bits in a different
order. We don't need to do anything special here; the
differences are handled in mips_elf_perform_relocation. */
case R_MIPS_GPREL16:
case R_MICROMIPS_GPREL7_S2:
case R_MICROMIPS_GPREL16:
/* Only sign-extend the addend if it was extracted from the
instruction. If the addend was separate, leave it alone,
otherwise we may lose significant bits. */
if (howto->partial_inplace)
addend = _bfd_mips_elf_sign_extend (addend, 16);
value = symbol + addend - gp;
/* If the symbol was local, any earlier relocatable links will
have adjusted its addend with the gp offset, so compensate
for that now. Don't do it for symbols forced local in this
link, though, since they won't have had the gp offset applied
to them before. */
if (was_local_p)
value += gp0;
if (was_local_p || h->root.root.type != bfd_link_hash_undefweak)
overflowed_p = mips_elf_overflow_p (value, 16);
break;
case R_MIPS16_GOT16:
case R_MIPS16_CALL16:
case R_MIPS_GOT16:
case R_MIPS_CALL16:
case R_MICROMIPS_GOT16:
case R_MICROMIPS_CALL16:
/* VxWorks does not have separate local and global semantics for
R_MIPS*_GOT16; every relocation evaluates to "G". */
if (htab->root.target_os != is_vxworks && local_p)
{
value = mips_elf_got16_entry (abfd, input_bfd, info,
symbol + addend, !was_local_p);
if (value == MINUS_ONE)
return bfd_reloc_outofrange;
value
= mips_elf_got_offset_from_index (info, abfd, input_bfd, value);
overflowed_p = mips_elf_overflow_p (value, 16);
break;
}
/* Fall through. */
case R_MIPS_TLS_GD:
case R_MIPS_TLS_GOTTPREL:
case R_MIPS_TLS_LDM:
case R_MIPS_GOT_DISP:
case R_MIPS16_TLS_GD:
case R_MIPS16_TLS_GOTTPREL:
case R_MIPS16_TLS_LDM:
case R_MICROMIPS_TLS_GD:
case R_MICROMIPS_TLS_GOTTPREL:
case R_MICROMIPS_TLS_LDM:
case R_MICROMIPS_GOT_DISP:
value = g;
overflowed_p = mips_elf_overflow_p (value, 16);
break;
case R_MIPS_GPREL32:
value = (addend + symbol + gp0 - gp);
if (!save_addend)
value &= howto->dst_mask;
break;
case R_MIPS_PC16:
case R_MIPS_GNU_REL16_S2:
if (howto->partial_inplace)
addend = _bfd_mips_elf_sign_extend (addend, 18);
/* No need to exclude weak undefined symbols here as they resolve
to 0 and never set `*cross_mode_jump_p', so this alignment check
will never trigger for them. */
if (*cross_mode_jump_p
? ((symbol + addend) & 3) != 1
: ((symbol + addend) & 3) != 0)
return bfd_reloc_outofrange;
value = symbol + addend - p;
if (was_local_p || h->root.root.type != bfd_link_hash_undefweak)
overflowed_p = mips_elf_overflow_p (value, 18);
value >>= howto->rightshift;
value &= howto->dst_mask;
break;
case R_MIPS16_PC16_S1:
if (howto->partial_inplace)
addend = _bfd_mips_elf_sign_extend (addend, 17);
if ((was_local_p || h->root.root.type != bfd_link_hash_undefweak)
&& (*cross_mode_jump_p
? ((symbol + addend) & 3) != 0
: ((symbol + addend) & 1) == 0))
return bfd_reloc_outofrange;
value = symbol + addend - p;
if (was_local_p || h->root.root.type != bfd_link_hash_undefweak)
overflowed_p = mips_elf_overflow_p (value, 17);
value >>= howto->rightshift;
value &= howto->dst_mask;
break;
case R_MIPS_PC21_S2:
if (howto->partial_inplace)
addend = _bfd_mips_elf_sign_extend (addend, 23);
if ((symbol + addend) & 3)
return bfd_reloc_outofrange;
value = symbol + addend - p;
if (was_local_p || h->root.root.type != bfd_link_hash_undefweak)
overflowed_p = mips_elf_overflow_p (value, 23);
value >>= howto->rightshift;
value &= howto->dst_mask;
break;
case R_MIPS_PC26_S2:
if (howto->partial_inplace)
addend = _bfd_mips_elf_sign_extend (addend, 28);
if ((symbol + addend) & 3)
return bfd_reloc_outofrange;
value = symbol + addend - p;
if (was_local_p || h->root.root.type != bfd_link_hash_undefweak)
overflowed_p = mips_elf_overflow_p (value, 28);
value >>= howto->rightshift;
value &= howto->dst_mask;
break;
case R_MIPS_PC18_S3:
if (howto->partial_inplace)
addend = _bfd_mips_elf_sign_extend (addend, 21);
if ((symbol + addend) & 7)
return bfd_reloc_outofrange;
value = symbol + addend - ((p | 7) ^ 7);
if (was_local_p || h->root.root.type != bfd_link_hash_undefweak)
overflowed_p = mips_elf_overflow_p (value, 21);
value >>= howto->rightshift;
value &= howto->dst_mask;
break;
case R_MIPS_PC19_S2:
if (howto->partial_inplace)
addend = _bfd_mips_elf_sign_extend (addend, 21);
if ((symbol + addend) & 3)
return bfd_reloc_outofrange;
value = symbol + addend - p;
if (was_local_p || h->root.root.type != bfd_link_hash_undefweak)
overflowed_p = mips_elf_overflow_p (value, 21);
value >>= howto->rightshift;
value &= howto->dst_mask;
break;
case R_MIPS_PCHI16:
value = mips_elf_high (symbol + addend - p);
value &= howto->dst_mask;
break;
case R_MIPS_PCLO16:
if (howto->partial_inplace)
addend = _bfd_mips_elf_sign_extend (addend, 16);
value = symbol + addend - p;
value &= howto->dst_mask;
break;
case R_MICROMIPS_PC7_S1:
if (howto->partial_inplace)
addend = _bfd_mips_elf_sign_extend (addend, 8);
if ((was_local_p || h->root.root.type != bfd_link_hash_undefweak)
&& (*cross_mode_jump_p
? ((symbol + addend + 2) & 3) != 0
: ((symbol + addend + 2) & 1) == 0))
return bfd_reloc_outofrange;
value = symbol + addend - p;
if (was_local_p || h->root.root.type != bfd_link_hash_undefweak)
overflowed_p = mips_elf_overflow_p (value, 8);
value >>= howto->rightshift;
value &= howto->dst_mask;
break;
case R_MICROMIPS_PC10_S1:
if (howto->partial_inplace)
addend = _bfd_mips_elf_sign_extend (addend, 11);
if ((was_local_p || h->root.root.type != bfd_link_hash_undefweak)
&& (*cross_mode_jump_p
? ((symbol + addend + 2) & 3) != 0
: ((symbol + addend + 2) & 1) == 0))
return bfd_reloc_outofrange;
value = symbol + addend - p;
if (was_local_p || h->root.root.type != bfd_link_hash_undefweak)
overflowed_p = mips_elf_overflow_p (value, 11);
value >>= howto->rightshift;
value &= howto->dst_mask;
break;
case R_MICROMIPS_PC16_S1:
if (howto->partial_inplace)
addend = _bfd_mips_elf_sign_extend (addend, 17);
if ((was_local_p || h->root.root.type != bfd_link_hash_undefweak)
&& (*cross_mode_jump_p
? ((symbol + addend) & 3) != 0
: ((symbol + addend) & 1) == 0))
return bfd_reloc_outofrange;
value = symbol + addend - p;
if (was_local_p || h->root.root.type != bfd_link_hash_undefweak)
overflowed_p = mips_elf_overflow_p (value, 17);
value >>= howto->rightshift;
value &= howto->dst_mask;
break;
case R_MICROMIPS_PC23_S2:
if (howto->partial_inplace)
addend = _bfd_mips_elf_sign_extend (addend, 25);
value = symbol + addend - ((p | 3) ^ 3);
if (was_local_p || h->root.root.type != bfd_link_hash_undefweak)
overflowed_p = mips_elf_overflow_p (value, 25);
value >>= howto->rightshift;
value &= howto->dst_mask;
break;
case R_MIPS_GOT_HI16:
case R_MIPS_CALL_HI16:
case R_MICROMIPS_GOT_HI16:
case R_MICROMIPS_CALL_HI16:
/* We're allowed to handle these two relocations identically.
The dynamic linker is allowed to handle the CALL relocations
differently by creating a lazy evaluation stub. */
value = g;
value = mips_elf_high (value);
value &= howto->dst_mask;
break;
case R_MIPS_GOT_LO16:
case R_MIPS_CALL_LO16:
case R_MICROMIPS_GOT_LO16:
case R_MICROMIPS_CALL_LO16:
value = g & howto->dst_mask;
break;
case R_MIPS_GOT_PAGE:
case R_MICROMIPS_GOT_PAGE:
value = mips_elf_got_page (abfd, input_bfd, info, symbol + addend, NULL);
if (value == MINUS_ONE)
return bfd_reloc_outofrange;
value = mips_elf_got_offset_from_index (info, abfd, input_bfd, value);
overflowed_p = mips_elf_overflow_p (value, 16);
break;
case R_MIPS_GOT_OFST:
case R_MICROMIPS_GOT_OFST:
if (local_p)
mips_elf_got_page (abfd, input_bfd, info, symbol + addend, &value);
else
value = addend;
overflowed_p = mips_elf_overflow_p (value, 16);
break;
case R_MIPS_SUB:
case R_MICROMIPS_SUB:
value = symbol - addend;
value &= howto->dst_mask;
break;
case R_MIPS_HIGHER:
case R_MICROMIPS_HIGHER:
value = mips_elf_higher (addend + symbol);
value &= howto->dst_mask;
break;
case R_MIPS_HIGHEST:
case R_MICROMIPS_HIGHEST:
value = mips_elf_highest (addend + symbol);
value &= howto->dst_mask;
break;
case R_MIPS_SCN_DISP:
case R_MICROMIPS_SCN_DISP:
value = symbol + addend - sec->output_offset;
value &= howto->dst_mask;
break;
case R_MIPS_JALR:
case R_MICROMIPS_JALR:
/* This relocation is only a hint. In some cases, we optimize
it into a bal instruction. But we don't try to optimize
when the symbol does not resolve locally. */
if (h != NULL && !SYMBOL_CALLS_LOCAL (info, &h->root))
return bfd_reloc_continue;
/* We can't optimize cross-mode jumps either. */
if (*cross_mode_jump_p)
return bfd_reloc_continue;
value = symbol + addend;
/* Neither we can non-instruction-aligned targets. */
if (r_type == R_MIPS_JALR ? (value & 3) != 0 : (value & 1) == 0)
return bfd_reloc_continue;
break;
case R_MIPS_PJUMP:
case R_MIPS_GNU_VTINHERIT:
case R_MIPS_GNU_VTENTRY:
/* We don't do anything with these at present. */
return bfd_reloc_continue;
default:
/* An unrecognized relocation type. */
return bfd_reloc_notsupported;
}
/* Store the VALUE for our caller. */
*valuep = value;
return overflowed_p ? bfd_reloc_overflow : bfd_reloc_ok;
}
/* It has been determined that the result of the RELOCATION is the
VALUE. Use HOWTO to place VALUE into the output file at the
appropriate position. The SECTION is the section to which the
relocation applies.
CROSS_MODE_JUMP_P is true if the relocation field
is a MIPS16 or microMIPS jump to standard MIPS code, or vice versa.
Returns FALSE if anything goes wrong. */
static bfd_boolean
mips_elf_perform_relocation (struct bfd_link_info *info,
reloc_howto_type *howto,
const Elf_Internal_Rela *relocation,
bfd_vma value, bfd *input_bfd,
asection *input_section, bfd_byte *contents,
bfd_boolean cross_mode_jump_p)
{
bfd_vma x;
bfd_byte *location;
int r_type = ELF_R_TYPE (input_bfd, relocation->r_info);
/* Figure out where the relocation is occurring. */
location = contents + relocation->r_offset;
_bfd_mips_elf_reloc_unshuffle (input_bfd, r_type, FALSE, location);
/* Obtain the current value. */
x = mips_elf_obtain_contents (howto, relocation, input_bfd, contents);
/* Clear the field we are setting. */
x &= ~howto->dst_mask;
/* Set the field. */
x |= (value & howto->dst_mask);
/* Detect incorrect JALX usage. If required, turn JAL or BAL into JALX. */
if (!cross_mode_jump_p && jal_reloc_p (r_type))
{
bfd_vma opcode = x >> 26;
if (r_type == R_MIPS16_26 ? opcode == 0x7
: r_type == R_MICROMIPS_26_S1 ? opcode == 0x3c
: opcode == 0x1d)
{
info->callbacks->einfo
(_("%X%H: unsupported JALX to the same ISA mode\n"),
input_bfd, input_section, relocation->r_offset);
return TRUE;
}
}
if (cross_mode_jump_p && jal_reloc_p (r_type))
{
bfd_boolean ok;
bfd_vma opcode = x >> 26;
bfd_vma jalx_opcode;
/* Check to see if the opcode is already JAL or JALX. */
if (r_type == R_MIPS16_26)
{
ok = ((opcode == 0x6) || (opcode == 0x7));
jalx_opcode = 0x7;
}
else if (r_type == R_MICROMIPS_26_S1)
{
ok = ((opcode == 0x3d) || (opcode == 0x3c));
jalx_opcode = 0x3c;
}
else
{
ok = ((opcode == 0x3) || (opcode == 0x1d));
jalx_opcode = 0x1d;
}
/* If the opcode is not JAL or JALX, there's a problem. We cannot
convert J or JALS to JALX. */
if (!ok)
{
info->callbacks->einfo
(_("%X%H: unsupported jump between ISA modes; "
"consider recompiling with interlinking enabled\n"),
input_bfd, input_section, relocation->r_offset);
return TRUE;
}
/* Make this the JALX opcode. */
x = (x & ~(0x3fu << 26)) | (jalx_opcode << 26);
}
else if (cross_mode_jump_p && b_reloc_p (r_type))
{
bfd_boolean ok = FALSE;
bfd_vma opcode = x >> 16;
bfd_vma jalx_opcode = 0;
bfd_vma sign_bit = 0;
bfd_vma addr;
bfd_vma dest;
if (r_type == R_MICROMIPS_PC16_S1)
{
ok = opcode == 0x4060;
jalx_opcode = 0x3c;
sign_bit = 0x10000;
value <<= 1;
}
else if (r_type == R_MIPS_PC16 || r_type == R_MIPS_GNU_REL16_S2)
{
ok = opcode == 0x411;
jalx_opcode = 0x1d;
sign_bit = 0x20000;
value <<= 2;
}
if (ok && !bfd_link_pic (info))
{
addr = (input_section->output_section->vma
+ input_section->output_offset
+ relocation->r_offset
+ 4);
dest = (addr
+ (((value & ((sign_bit << 1) - 1)) ^ sign_bit) - sign_bit));
if ((addr >> 28) << 28 != (dest >> 28) << 28)
{
info->callbacks->einfo
(_("%X%H: cannot convert branch between ISA modes "
"to JALX: relocation out of range\n"),
input_bfd, input_section, relocation->r_offset);
return TRUE;
}
/* Make this the JALX opcode. */
x = ((dest >> 2) & 0x3ffffff) | jalx_opcode << 26;
}
else if (!mips_elf_hash_table (info)->ignore_branch_isa)
{
info->callbacks->einfo
(_("%X%H: unsupported branch between ISA modes\n"),
input_bfd, input_section, relocation->r_offset);
return TRUE;
}
}
/* Try converting JAL to BAL and J(AL)R to B(AL), if the target is in
range. */
if (!bfd_link_relocatable (info)
&& !cross_mode_jump_p
&& ((JAL_TO_BAL_P (input_bfd)
&& r_type == R_MIPS_26
&& (x >> 26) == 0x3) /* jal addr */
|| (JALR_TO_BAL_P (input_bfd)
&& r_type == R_MIPS_JALR
&& x == 0x0320f809) /* jalr t9 */
|| (JR_TO_B_P (input_bfd)
&& r_type == R_MIPS_JALR
&& (x & ~1) == 0x03200008))) /* jr t9 / jalr zero, t9 */
{
bfd_vma addr;
bfd_vma dest;
bfd_signed_vma off;
addr = (input_section->output_section->vma
+ input_section->output_offset
+ relocation->r_offset
+ 4);
if (r_type == R_MIPS_26)
dest = (value << 2) | ((addr >> 28) << 28);
else
dest = value;
off = dest - addr;
if (off <= 0x1ffff && off >= -0x20000)
{
if ((x & ~1) == 0x03200008) /* jr t9 / jalr zero, t9 */
x = 0x10000000 | (((bfd_vma) off >> 2) & 0xffff); /* b addr */
else
x = 0x04110000 | (((bfd_vma) off >> 2) & 0xffff); /* bal addr */
}
}
/* Put the value into the output. */
mips_elf_store_contents (howto, relocation, input_bfd, contents, x);
_bfd_mips_elf_reloc_shuffle (input_bfd, r_type, !bfd_link_relocatable (info),
location);
return TRUE;
}
/* Create a rel.dyn relocation for the dynamic linker to resolve. REL
is the original relocation, which is now being transformed into a
dynamic relocation. The ADDENDP is adjusted if necessary; the
caller should store the result in place of the original addend. */
static bfd_boolean
mips_elf_create_dynamic_relocation (bfd *output_bfd,
struct bfd_link_info *info,
const Elf_Internal_Rela *rel,
struct mips_elf_link_hash_entry *h,
asection *sec, bfd_vma symbol,
bfd_vma *addendp, asection *input_section)
{
Elf_Internal_Rela outrel[3];
asection *sreloc;
bfd *dynobj;
int r_type;
long indx;
bfd_boolean defined_p;
struct mips_elf_link_hash_table *htab;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
r_type = ELF_R_TYPE (output_bfd, rel->r_info);
dynobj = elf_hash_table (info)->dynobj;
sreloc = mips_elf_rel_dyn_section (info, FALSE);
BFD_ASSERT (sreloc != NULL);
BFD_ASSERT (sreloc->contents != NULL);
BFD_ASSERT (sreloc->reloc_count * MIPS_ELF_REL_SIZE (output_bfd)
< sreloc->size);
outrel[0].r_offset =
_bfd_elf_section_offset (output_bfd, info, input_section, rel[0].r_offset);
if (ABI_64_P (output_bfd))
{
outrel[1].r_offset =
_bfd_elf_section_offset (output_bfd, info, input_section, rel[1].r_offset);
outrel[2].r_offset =
_bfd_elf_section_offset (output_bfd, info, input_section, rel[2].r_offset);
}
if (outrel[0].r_offset == MINUS_ONE)
/* The relocation field has been deleted. */
return TRUE;
if (outrel[0].r_offset == MINUS_TWO)
{
/* The relocation field has been converted into a relative value of
some sort. Functions like _bfd_elf_write_section_eh_frame expect
the field to be fully relocated, so add in the symbol's value. */
*addendp += symbol;
return TRUE;
}
/* We must now calculate the dynamic symbol table index to use
in the relocation. */
if (h != NULL && ! SYMBOL_REFERENCES_LOCAL (info, &h->root))
{
BFD_ASSERT (htab->root.target_os == is_vxworks
|| h->global_got_area != GGA_NONE);
indx = h->root.dynindx;
if (SGI_COMPAT (output_bfd))
defined_p = h->root.def_regular;
else
/* ??? glibc's ld.so just adds the final GOT entry to the
relocation field. It therefore treats relocs against
defined symbols in the same way as relocs against
undefined symbols. */
defined_p = FALSE;
}
else
{
if (sec != NULL && bfd_is_abs_section (sec))
indx = 0;
else if (sec == NULL || sec->owner == NULL)
{
bfd_set_error (bfd_error_bad_value);
return FALSE;
}
else
{
indx = elf_section_data (sec->output_section)->dynindx;
if (indx == 0)
{
asection *osec = htab->root.text_index_section;
indx = elf_section_data (osec)->dynindx;
}
if (indx == 0)
abort ();
}
/* Instead of generating a relocation using the section
symbol, we may as well make it a fully relative
relocation. We want to avoid generating relocations to
local symbols because we used to generate them
incorrectly, without adding the original symbol value,
which is mandated by the ABI for section symbols. In
order to give dynamic loaders and applications time to
phase out the incorrect use, we refrain from emitting
section-relative relocations. It's not like they're
useful, after all. This should be a bit more efficient
as well. */
/* ??? Although this behavior is compatible with glibc's ld.so,
the ABI says that relocations against STN_UNDEF should have
a symbol value of 0. Irix rld honors this, so relocations
against STN_UNDEF have no effect. */
if (!SGI_COMPAT (output_bfd))
indx = 0;
defined_p = TRUE;
}
/* If the relocation was previously an absolute relocation and
this symbol will not be referred to by the relocation, we must
adjust it by the value we give it in the dynamic symbol table.
Otherwise leave the job up to the dynamic linker. */
if (defined_p && r_type != R_MIPS_REL32)
*addendp += symbol;
if (htab->root.target_os == is_vxworks)
/* VxWorks uses non-relative relocations for this. */
outrel[0].r_info = ELF32_R_INFO (indx, R_MIPS_32);
else
/* The relocation is always an REL32 relocation because we don't
know where the shared library will wind up at load-time. */
outrel[0].r_info = ELF_R_INFO (output_bfd, (unsigned long) indx,
R_MIPS_REL32);
/* For strict adherence to the ABI specification, we should
generate a R_MIPS_64 relocation record by itself before the
_REL32/_64 record as well, such that the addend is read in as
a 64-bit value (REL32 is a 32-bit relocation, after all).
However, since none of the existing ELF64 MIPS dynamic
loaders seems to care, we don't waste space with these
artificial relocations. If this turns out to not be true,
mips_elf_allocate_dynamic_relocation() should be tweaked so
as to make room for a pair of dynamic relocations per
invocation if ABI_64_P, and here we should generate an
additional relocation record with R_MIPS_64 by itself for a
NULL symbol before this relocation record. */
outrel[1].r_info = ELF_R_INFO (output_bfd, 0,
ABI_64_P (output_bfd)
? R_MIPS_64
: R_MIPS_NONE);
outrel[2].r_info = ELF_R_INFO (output_bfd, 0, R_MIPS_NONE);
/* Adjust the output offset of the relocation to reference the
correct location in the output file. */
outrel[0].r_offset += (input_section->output_section->vma
+ input_section->output_offset);
outrel[1].r_offset += (input_section->output_section->vma
+ input_section->output_offset);
outrel[2].r_offset += (input_section->output_section->vma
+ input_section->output_offset);
/* Put the relocation back out. We have to use the special
relocation outputter in the 64-bit case since the 64-bit
relocation format is non-standard. */
if (ABI_64_P (output_bfd))
{
(*get_elf_backend_data (output_bfd)->s->swap_reloc_out)
(output_bfd, &outrel[0],
(sreloc->contents
+ sreloc->reloc_count * sizeof (Elf64_Mips_External_Rel)));
}
else if (htab->root.target_os == is_vxworks)
{
/* VxWorks uses RELA rather than REL dynamic relocations. */
outrel[0].r_addend = *addendp;
bfd_elf32_swap_reloca_out
(output_bfd, &outrel[0],
(sreloc->contents
+ sreloc->reloc_count * sizeof (Elf32_External_Rela)));
}
else
bfd_elf32_swap_reloc_out
(output_bfd, &outrel[0],
(sreloc->contents + sreloc->reloc_count * sizeof (Elf32_External_Rel)));
/* We've now added another relocation. */
++sreloc->reloc_count;
/* Make sure the output section is writable. The dynamic linker
will be writing to it. */
elf_section_data (input_section->output_section)->this_hdr.sh_flags
|= SHF_WRITE;
/* On IRIX5, make an entry of compact relocation info. */
if (IRIX_COMPAT (output_bfd) == ict_irix5)
{
asection *scpt = bfd_get_linker_section (dynobj, ".compact_rel");
bfd_byte *cr;
if (scpt)
{
Elf32_crinfo cptrel;
mips_elf_set_cr_format (cptrel, CRF_MIPS_LONG);
cptrel.vaddr = (rel->r_offset
+ input_section->output_section->vma
+ input_section->output_offset);
if (r_type == R_MIPS_REL32)
mips_elf_set_cr_type (cptrel, CRT_MIPS_REL32);
else
mips_elf_set_cr_type (cptrel, CRT_MIPS_WORD);
mips_elf_set_cr_dist2to (cptrel, 0);
cptrel.konst = *addendp;
cr = (scpt->contents
+ sizeof (Elf32_External_compact_rel));
mips_elf_set_cr_relvaddr (cptrel, 0);
bfd_elf32_swap_crinfo_out (output_bfd, &cptrel,
((Elf32_External_crinfo *) cr
+ scpt->reloc_count));
++scpt->reloc_count;
}
}
/* If we've written this relocation for a readonly section,
we need to set DF_TEXTREL again, so that we do not delete the
DT_TEXTREL tag. */
if (MIPS_ELF_READONLY_SECTION (input_section))
info->flags |= DF_TEXTREL;
return TRUE;
}
/* Return the MACH for a MIPS e_flags value. */
unsigned long
_bfd_elf_mips_mach (flagword flags)
{
switch (flags & EF_MIPS_MACH)
{
case E_MIPS_MACH_3900:
return bfd_mach_mips3900;
case E_MIPS_MACH_4010:
return bfd_mach_mips4010;
case E_MIPS_MACH_4100:
return bfd_mach_mips4100;
case E_MIPS_MACH_4111:
return bfd_mach_mips4111;
case E_MIPS_MACH_4120:
return bfd_mach_mips4120;
case E_MIPS_MACH_4650:
return bfd_mach_mips4650;
case E_MIPS_MACH_5400:
return bfd_mach_mips5400;
case E_MIPS_MACH_5500:
return bfd_mach_mips5500;
case E_MIPS_MACH_5900:
return bfd_mach_mips5900;
case E_MIPS_MACH_9000:
return bfd_mach_mips9000;
case E_MIPS_MACH_SB1:
return bfd_mach_mips_sb1;
case E_MIPS_MACH_LS2E:
return bfd_mach_mips_loongson_2e;
case E_MIPS_MACH_LS2F:
return bfd_mach_mips_loongson_2f;
case E_MIPS_MACH_GS464:
return bfd_mach_mips_gs464;
case E_MIPS_MACH_GS464E:
return bfd_mach_mips_gs464e;
case E_MIPS_MACH_GS264E:
return bfd_mach_mips_gs264e;
case E_MIPS_MACH_OCTEON3:
return bfd_mach_mips_octeon3;
case E_MIPS_MACH_OCTEON2:
return bfd_mach_mips_octeon2;
case E_MIPS_MACH_OCTEON:
return bfd_mach_mips_octeon;
case E_MIPS_MACH_XLR:
return bfd_mach_mips_xlr;
case E_MIPS_MACH_IAMR2:
return bfd_mach_mips_interaptiv_mr2;
default:
switch (flags & EF_MIPS_ARCH)
{
default:
case E_MIPS_ARCH_1:
return bfd_mach_mips3000;
case E_MIPS_ARCH_2:
return bfd_mach_mips6000;
case E_MIPS_ARCH_3:
return bfd_mach_mips4000;
case E_MIPS_ARCH_4:
return bfd_mach_mips8000;
case E_MIPS_ARCH_5:
return bfd_mach_mips5;
case E_MIPS_ARCH_32:
return bfd_mach_mipsisa32;
case E_MIPS_ARCH_64:
return bfd_mach_mipsisa64;
case E_MIPS_ARCH_32R2:
return bfd_mach_mipsisa32r2;
case E_MIPS_ARCH_64R2:
return bfd_mach_mipsisa64r2;
case E_MIPS_ARCH_32R6:
return bfd_mach_mipsisa32r6;
case E_MIPS_ARCH_64R6:
return bfd_mach_mipsisa64r6;
}
}
return 0;
}
/* Return printable name for ABI. */
static INLINE char *
elf_mips_abi_name (bfd *abfd)
{
flagword flags;
flags = elf_elfheader (abfd)->e_flags;
switch (flags & EF_MIPS_ABI)
{
case 0:
if (ABI_N32_P (abfd))
return "N32";
else if (ABI_64_P (abfd))
return "64";
else
return "none";
case E_MIPS_ABI_O32:
return "O32";
case E_MIPS_ABI_O64:
return "O64";
case E_MIPS_ABI_EABI32:
return "EABI32";
case E_MIPS_ABI_EABI64:
return "EABI64";
default:
return "unknown abi";
}
}
/* MIPS ELF uses two common sections. One is the usual one, and the
other is for small objects. All the small objects are kept
together, and then referenced via the gp pointer, which yields
faster assembler code. This is what we use for the small common
section. This approach is copied from ecoff.c. */
static asection mips_elf_scom_section;
static const asymbol mips_elf_scom_symbol =
GLOBAL_SYM_INIT (".scommon", &mips_elf_scom_section);
static asection mips_elf_scom_section =
BFD_FAKE_SECTION (mips_elf_scom_section, &mips_elf_scom_symbol,
".scommon", 0, SEC_IS_COMMON | SEC_SMALL_DATA);
/* MIPS ELF also uses an acommon section, which represents an
allocated common symbol which may be overridden by a
definition in a shared library. */
static asection mips_elf_acom_section;
static const asymbol mips_elf_acom_symbol =
GLOBAL_SYM_INIT (".acommon", &mips_elf_acom_section);
static asection mips_elf_acom_section =
BFD_FAKE_SECTION (mips_elf_acom_section, &mips_elf_acom_symbol,
".acommon", 0, SEC_ALLOC);
/* This is used for both the 32-bit and the 64-bit ABI. */
void
_bfd_mips_elf_symbol_processing (bfd *abfd, asymbol *asym)
{
elf_symbol_type *elfsym;
/* Handle the special MIPS section numbers that a symbol may use. */
elfsym = (elf_symbol_type *) asym;
switch (elfsym->internal_elf_sym.st_shndx)
{
case SHN_MIPS_ACOMMON:
/* This section is used in a dynamically linked executable file.
It is an allocated common section. The dynamic linker can
either resolve these symbols to something in a shared
library, or it can just leave them here. For our purposes,
we can consider these symbols to be in a new section. */
asym->section = &mips_elf_acom_section;
break;
case SHN_COMMON:
/* Common symbols less than the GP size are automatically
treated as SHN_MIPS_SCOMMON symbols on IRIX5. */
if (asym->value > elf_gp_size (abfd)
|| ELF_ST_TYPE (elfsym->internal_elf_sym.st_info) == STT_TLS
|| IRIX_COMPAT (abfd) == ict_irix6)
break;
/* Fall through. */
case SHN_MIPS_SCOMMON:
asym->section = &mips_elf_scom_section;
asym->value = elfsym->internal_elf_sym.st_size;
break;
case SHN_MIPS_SUNDEFINED:
asym->section = bfd_und_section_ptr;
break;
case SHN_MIPS_TEXT:
{
asection *section = bfd_get_section_by_name (abfd, ".text");
if (section != NULL)
{
asym->section = section;
/* MIPS_TEXT is a bit special, the address is not an offset
to the base of the .text section. So subtract the section
base address to make it an offset. */
asym->value -= section->vma;
}
}
break;
case SHN_MIPS_DATA:
{
asection *section = bfd_get_section_by_name (abfd, ".data");
if (section != NULL)
{
asym->section = section;
/* MIPS_DATA is a bit special, the address is not an offset
to the base of the .data section. So subtract the section
base address to make it an offset. */
asym->value -= section->vma;
}
}
break;
}
/* If this is an odd-valued function symbol, assume it's a MIPS16
or microMIPS one. */
if (ELF_ST_TYPE (elfsym->internal_elf_sym.st_info) == STT_FUNC
&& (asym->value & 1) != 0)
{
asym->value--;
if (MICROMIPS_P (abfd))
elfsym->internal_elf_sym.st_other
= ELF_ST_SET_MICROMIPS (elfsym->internal_elf_sym.st_other);
else
elfsym->internal_elf_sym.st_other
= ELF_ST_SET_MIPS16 (elfsym->internal_elf_sym.st_other);
}
}
/* Implement elf_backend_eh_frame_address_size. This differs from
the default in the way it handles EABI64.
EABI64 was originally specified as an LP64 ABI, and that is what
-mabi=eabi normally gives on a 64-bit target. However, gcc has
historically accepted the combination of -mabi=eabi and -mlong32,
and this ILP32 variation has become semi-official over time.
Both forms use elf32 and have pointer-sized FDE addresses.
If an EABI object was generated by GCC 4.0 or above, it will have
an empty .gcc_compiled_longXX section, where XX is the size of longs
in bits. Unfortunately, ILP32 objects generated by earlier compilers
have no special marking to distinguish them from LP64 objects.
We don't want users of the official LP64 ABI to be punished for the
existence of the ILP32 variant, but at the same time, we don't want
to mistakenly interpret pre-4.0 ILP32 objects as being LP64 objects.
We therefore take the following approach:
- If ABFD contains a .gcc_compiled_longXX section, use it to
determine the pointer size.
- Otherwise check the type of the first relocation. Assume that
the LP64 ABI is being used if the relocation is of type R_MIPS_64.
- Otherwise punt.
The second check is enough to detect LP64 objects generated by pre-4.0
compilers because, in the kind of output generated by those compilers,
the first relocation will be associated with either a CIE personality
routine or an FDE start address. Furthermore, the compilers never
used a special (non-pointer) encoding for this ABI.
Checking the relocation type should also be safe because there is no
reason to use R_MIPS_64 in an ILP32 object. Pre-4.0 compilers never
did so. */
unsigned int
_bfd_mips_elf_eh_frame_address_size (bfd *abfd, const asection *sec)
{
if (elf_elfheader (abfd)->e_ident[EI_CLASS] == ELFCLASS64)
return 8;
if ((elf_elfheader (abfd)->e_flags & EF_MIPS_ABI) == E_MIPS_ABI_EABI64)
{
bfd_boolean long32_p, long64_p;
long32_p = bfd_get_section_by_name (abfd, ".gcc_compiled_long32") != 0;
long64_p = bfd_get_section_by_name (abfd, ".gcc_compiled_long64") != 0;
if (long32_p && long64_p)
return 0;
if (long32_p)
return 4;
if (long64_p)
return 8;
if (sec->reloc_count > 0
&& elf_section_data (sec)->relocs != NULL
&& (ELF32_R_TYPE (elf_section_data (sec)->relocs[0].r_info)
== R_MIPS_64))
return 8;
return 0;
}
return 4;
}
/* There appears to be a bug in the MIPSpro linker that causes GOT_DISP
relocations against two unnamed section symbols to resolve to the
same address. For example, if we have code like:
lw $4,%got_disp(.data)($gp)
lw $25,%got_disp(.text)($gp)
jalr $25
then the linker will resolve both relocations to .data and the program
will jump there rather than to .text.
We can work around this problem by giving names to local section symbols.
This is also what the MIPSpro tools do. */
bfd_boolean
_bfd_mips_elf_name_local_section_symbols (bfd *abfd)
{
return elf_elfheader (abfd)->e_type == ET_REL && SGI_COMPAT (abfd);
}
/* Work over a section just before writing it out. This routine is
used by both the 32-bit and the 64-bit ABI. FIXME: We recognize
sections that need the SHF_MIPS_GPREL flag by name; there has to be
a better way. */
bfd_boolean
_bfd_mips_elf_section_processing (bfd *abfd, Elf_Internal_Shdr *hdr)
{
if (hdr->sh_type == SHT_MIPS_REGINFO
&& hdr->sh_size > 0)
{
bfd_byte buf[4];
BFD_ASSERT (hdr->contents == NULL);
if (hdr->sh_size != sizeof (Elf32_External_RegInfo))
{
_bfd_error_handler
(_("%pB: incorrect `.reginfo' section size; "
"expected %" PRIu64 ", got %" PRIu64),
abfd, (uint64_t) sizeof (Elf32_External_RegInfo),
(uint64_t) hdr->sh_size);
bfd_set_error (bfd_error_bad_value);
return FALSE;
}
if (bfd_seek (abfd,
hdr->sh_offset + sizeof (Elf32_External_RegInfo) - 4,
SEEK_SET) != 0)
return FALSE;
H_PUT_32 (abfd, elf_gp (abfd), buf);
if (bfd_bwrite (buf, 4, abfd) != 4)
return FALSE;
}
if (hdr->sh_type == SHT_MIPS_OPTIONS
&& hdr->bfd_section != NULL
&& mips_elf_section_data (hdr->bfd_section) != NULL
&& mips_elf_section_data (hdr->bfd_section)->u.tdata != NULL)
{
bfd_byte *contents, *l, *lend;
/* We stored the section contents in the tdata field in the
set_section_contents routine. We save the section contents
so that we don't have to read them again.
At this point we know that elf_gp is set, so we can look
through the section contents to see if there is an
ODK_REGINFO structure. */
contents = mips_elf_section_data (hdr->bfd_section)->u.tdata;
l = contents;
lend = contents + hdr->sh_size;
while (l + sizeof (Elf_External_Options) <= lend)
{
Elf_Internal_Options intopt;
bfd_mips_elf_swap_options_in (abfd, (Elf_External_Options *) l,
&intopt);
if (intopt.size < sizeof (Elf_External_Options))
{
_bfd_error_handler
/* xgettext:c-format */
(_("%pB: warning: bad `%s' option size %u smaller than"
" its header"),
abfd, MIPS_ELF_OPTIONS_SECTION_NAME (abfd), intopt.size);
break;
}
if (ABI_64_P (abfd) && intopt.kind == ODK_REGINFO)
{
bfd_byte buf[8];
if (bfd_seek (abfd,
(hdr->sh_offset
+ (l - contents)
+ sizeof (Elf_External_Options)
+ (sizeof (Elf64_External_RegInfo) - 8)),
SEEK_SET) != 0)
return FALSE;
H_PUT_64 (abfd, elf_gp (abfd), buf);
if (bfd_bwrite (buf, 8, abfd) != 8)
return FALSE;
}
else if (intopt.kind == ODK_REGINFO)
{
bfd_byte buf[4];
if (bfd_seek (abfd,
(hdr->sh_offset
+ (l - contents)
+ sizeof (Elf_External_Options)
+ (sizeof (Elf32_External_RegInfo) - 4)),
SEEK_SET) != 0)
return FALSE;
H_PUT_32 (abfd, elf_gp (abfd), buf);
if (bfd_bwrite (buf, 4, abfd) != 4)
return FALSE;
}
l += intopt.size;
}
}
if (hdr->bfd_section != NULL)
{
const char *name = bfd_section_name (hdr->bfd_section);
/* .sbss is not handled specially here because the GNU/Linux
prelinker can convert .sbss from NOBITS to PROGBITS and
changing it back to NOBITS breaks the binary. The entry in
_bfd_mips_elf_special_sections will ensure the correct flags
are set on .sbss if BFD creates it without reading it from an
input file, and without special handling here the flags set
on it in an input file will be followed. */
if (strcmp (name, ".sdata") == 0
|| strcmp (name, ".lit8") == 0
|| strcmp (name, ".lit4") == 0)
hdr->sh_flags |= SHF_ALLOC | SHF_WRITE | SHF_MIPS_GPREL;
else if (strcmp (name, ".srdata") == 0)
hdr->sh_flags |= SHF_ALLOC | SHF_MIPS_GPREL;
else if (strcmp (name, ".compact_rel") == 0)
hdr->sh_flags = 0;
else if (strcmp (name, ".rtproc") == 0)
{
if (hdr->sh_addralign != 0 && hdr->sh_entsize == 0)
{
unsigned int adjust;
adjust = hdr->sh_size % hdr->sh_addralign;
if (adjust != 0)
hdr->sh_size += hdr->sh_addralign - adjust;
}
}
}
return TRUE;
}
/* Handle a MIPS specific section when reading an object file. This
is called when elfcode.h finds a section with an unknown type.
This routine supports both the 32-bit and 64-bit ELF ABI. */
bfd_boolean
_bfd_mips_elf_section_from_shdr (bfd *abfd,
Elf_Internal_Shdr *hdr,
const char *name,
int shindex)
{
flagword flags = 0;
/* There ought to be a place to keep ELF backend specific flags, but
at the moment there isn't one. We just keep track of the
sections by their name, instead. Fortunately, the ABI gives
suggested names for all the MIPS specific sections, so we will
probably get away with this. */
switch (hdr->sh_type)
{
case SHT_MIPS_LIBLIST:
if (strcmp (name, ".liblist") != 0)
return FALSE;
break;
case SHT_MIPS_MSYM:
if (strcmp (name, ".msym") != 0)
return FALSE;
break;
case SHT_MIPS_CONFLICT:
if (strcmp (name, ".conflict") != 0)
return FALSE;
break;
case SHT_MIPS_GPTAB:
if (! startswith (name, ".gptab."))
return FALSE;
break;
case SHT_MIPS_UCODE:
if (strcmp (name, ".ucode") != 0)
return FALSE;
break;
case SHT_MIPS_DEBUG:
if (strcmp (name, ".mdebug") != 0)
return FALSE;
flags = SEC_DEBUGGING;
break;
case SHT_MIPS_REGINFO:
if (strcmp (name, ".reginfo") != 0
|| hdr->sh_size != sizeof (Elf32_External_RegInfo))
return FALSE;
flags = (SEC_LINK_ONCE | SEC_LINK_DUPLICATES_SAME_SIZE);
break;
case SHT_MIPS_IFACE:
if (strcmp (name, ".MIPS.interfaces") != 0)
return FALSE;
break;
case SHT_MIPS_CONTENT:
if (! startswith (name, ".MIPS.content"))
return FALSE;
break;
case SHT_MIPS_OPTIONS:
if (!MIPS_ELF_OPTIONS_SECTION_NAME_P (name))
return FALSE;
break;
case SHT_MIPS_ABIFLAGS:
if (!MIPS_ELF_ABIFLAGS_SECTION_NAME_P (name))
return FALSE;
flags = (SEC_LINK_ONCE | SEC_LINK_DUPLICATES_SAME_SIZE);
break;
case SHT_MIPS_DWARF:
if (! startswith (name, ".debug_")
&& ! startswith (name, ".zdebug_"))
return FALSE;
break;
case SHT_MIPS_SYMBOL_LIB:
if (strcmp (name, ".MIPS.symlib") != 0)
return FALSE;
break;
case SHT_MIPS_EVENTS:
if (! startswith (name, ".MIPS.events")
&& ! startswith (name, ".MIPS.post_rel"))
return FALSE;
break;
case SHT_MIPS_XHASH:
if (strcmp (name, ".MIPS.xhash") != 0)
return FALSE;
default:
break;
}
if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
return FALSE;
if (hdr->sh_flags & SHF_MIPS_GPREL)
flags |= SEC_SMALL_DATA;
if (flags)
{
if (!bfd_set_section_flags (hdr->bfd_section,
(bfd_section_flags (hdr->bfd_section)
| flags)))
return FALSE;
}
if (hdr->sh_type == SHT_MIPS_ABIFLAGS)
{
Elf_External_ABIFlags_v0 ext;
if (! bfd_get_section_contents (abfd, hdr->bfd_section,
&ext, 0, sizeof ext))
return FALSE;
bfd_mips_elf_swap_abiflags_v0_in (abfd, &ext,
&mips_elf_tdata (abfd)->abiflags);
if (mips_elf_tdata (abfd)->abiflags.version != 0)
return FALSE;
mips_elf_tdata (abfd)->abiflags_valid = TRUE;
}
/* FIXME: We should record sh_info for a .gptab section. */
/* For a .reginfo section, set the gp value in the tdata information
from the contents of this section. We need the gp value while
processing relocs, so we just get it now. The .reginfo section
is not used in the 64-bit MIPS ELF ABI. */
if (hdr->sh_type == SHT_MIPS_REGINFO)
{
Elf32_External_RegInfo ext;
Elf32_RegInfo s;
if (! bfd_get_section_contents (abfd, hdr->bfd_section,
&ext, 0, sizeof ext))
return FALSE;
bfd_mips_elf32_swap_reginfo_in (abfd, &ext, &s);
elf_gp (abfd) = s.ri_gp_value;
}
/* For a SHT_MIPS_OPTIONS section, look for a ODK_REGINFO entry, and
set the gp value based on what we find. We may see both
SHT_MIPS_REGINFO and SHT_MIPS_OPTIONS/ODK_REGINFO; in that case,
they should agree. */
if (hdr->sh_type == SHT_MIPS_OPTIONS)
{
bfd_byte *contents, *l, *lend;
contents = bfd_malloc (hdr->sh_size);
if (contents == NULL)
return FALSE;
if (! bfd_get_section_contents (abfd, hdr->bfd_section, contents,
0, hdr->sh_size))
{
free (contents);
return FALSE;
}
l = contents;
lend = contents + hdr->sh_size;
while (l + sizeof (Elf_External_Options) <= lend)
{
Elf_Internal_Options intopt;
bfd_mips_elf_swap_options_in (abfd, (Elf_External_Options *) l,
&intopt);
if (intopt.size < sizeof (Elf_External_Options))
{
_bfd_error_handler
/* xgettext:c-format */
(_("%pB: warning: bad `%s' option size %u smaller than"
" its header"),
abfd, MIPS_ELF_OPTIONS_SECTION_NAME (abfd), intopt.size);
break;
}
if (ABI_64_P (abfd) && intopt.kind == ODK_REGINFO)
{
Elf64_Internal_RegInfo intreg;
bfd_mips_elf64_swap_reginfo_in
(abfd,
((Elf64_External_RegInfo *)
(l + sizeof (Elf_External_Options))),
&intreg);
elf_gp (abfd) = intreg.ri_gp_value;
}
else if (intopt.kind == ODK_REGINFO)
{
Elf32_RegInfo intreg;
bfd_mips_elf32_swap_reginfo_in
(abfd,
((Elf32_External_RegInfo *)
(l + sizeof (Elf_External_Options))),
&intreg);
elf_gp (abfd) = intreg.ri_gp_value;
}
l += intopt.size;
}
free (contents);
}
return TRUE;
}
/* Set the correct type for a MIPS ELF section. We do this by the
section name, which is a hack, but ought to work. This routine is
used by both the 32-bit and the 64-bit ABI. */
bfd_boolean
_bfd_mips_elf_fake_sections (bfd *abfd, Elf_Internal_Shdr *hdr, asection *sec)
{
const char *name = bfd_section_name (sec);
if (strcmp (name, ".liblist") == 0)
{
hdr->sh_type = SHT_MIPS_LIBLIST;
hdr->sh_info = sec->size / sizeof (Elf32_Lib);
/* The sh_link field is set in final_write_processing. */
}
else if (strcmp (name, ".conflict") == 0)
hdr->sh_type = SHT_MIPS_CONFLICT;
else if (startswith (name, ".gptab."))
{
hdr->sh_type = SHT_MIPS_GPTAB;
hdr->sh_entsize = sizeof (Elf32_External_gptab);
/* The sh_info field is set in final_write_processing. */
}
else if (strcmp (name, ".ucode") == 0)
hdr->sh_type = SHT_MIPS_UCODE;
else if (strcmp (name, ".mdebug") == 0)
{
hdr->sh_type = SHT_MIPS_DEBUG;
/* In a shared object on IRIX 5.3, the .mdebug section has an
entsize of 0. FIXME: Does this matter? */
if (SGI_COMPAT (abfd) && (abfd->flags & DYNAMIC) != 0)
hdr->sh_entsize = 0;
else
hdr->sh_entsize = 1;
}
else if (strcmp (name, ".reginfo") == 0)
{
hdr->sh_type = SHT_MIPS_REGINFO;
/* In a shared object on IRIX 5.3, the .reginfo section has an
entsize of 0x18. FIXME: Does this matter? */
if (SGI_COMPAT (abfd))
{
if ((abfd->flags & DYNAMIC) != 0)
hdr->sh_entsize = sizeof (Elf32_External_RegInfo);
else
hdr->sh_entsize = 1;
}
else
hdr->sh_entsize = sizeof (Elf32_External_RegInfo);
}
else if (SGI_COMPAT (abfd)
&& (strcmp (name, ".hash") == 0
|| strcmp (name, ".dynamic") == 0
|| strcmp (name, ".dynstr") == 0))
{
if (SGI_COMPAT (abfd))
hdr->sh_entsize = 0;
#if 0
/* This isn't how the IRIX6 linker behaves. */
hdr->sh_info = SIZEOF_MIPS_DYNSYM_SECNAMES;
#endif
}
else if (strcmp (name, ".got") == 0
|| strcmp (name, ".srdata") == 0
|| strcmp (name, ".sdata") == 0
|| strcmp (name, ".sbss") == 0
|| strcmp (name, ".lit4") == 0
|| strcmp (name, ".lit8") == 0)
hdr->sh_flags |= SHF_MIPS_GPREL;
else if (strcmp (name, ".MIPS.interfaces") == 0)
{
hdr->sh_type = SHT_MIPS_IFACE;
hdr->sh_flags |= SHF_MIPS_NOSTRIP;
}
else if (startswith (name, ".MIPS.content"))
{
hdr->sh_type = SHT_MIPS_CONTENT;
hdr->sh_flags |= SHF_MIPS_NOSTRIP;
/* The sh_info field is set in final_write_processing. */
}
else if (MIPS_ELF_OPTIONS_SECTION_NAME_P (name))
{
hdr->sh_type = SHT_MIPS_OPTIONS;
hdr->sh_entsize = 1;
hdr->sh_flags |= SHF_MIPS_NOSTRIP;
}
else if (startswith (name, ".MIPS.abiflags"))
{
hdr->sh_type = SHT_MIPS_ABIFLAGS;
hdr->sh_entsize = sizeof (Elf_External_ABIFlags_v0);
}
else if (startswith (name, ".debug_")
|| startswith (name, ".zdebug_"))
{
hdr->sh_type = SHT_MIPS_DWARF;
/* Irix facilities such as libexc expect a single .debug_frame
per executable, the system ones have NOSTRIP set and the linker
doesn't merge sections with different flags so ... */
if (SGI_COMPAT (abfd) && startswith (name, ".debug_frame"))
hdr->sh_flags |= SHF_MIPS_NOSTRIP;
}
else if (strcmp (name, ".MIPS.symlib") == 0)
{
hdr->sh_type = SHT_MIPS_SYMBOL_LIB;
/* The sh_link and sh_info fields are set in
final_write_processing. */
}
else if (startswith (name, ".MIPS.events")
|| startswith (name, ".MIPS.post_rel"))
{
hdr->sh_type = SHT_MIPS_EVENTS;
hdr->sh_flags |= SHF_MIPS_NOSTRIP;
/* The sh_link field is set in final_write_processing. */
}
else if (strcmp (name, ".msym") == 0)
{
hdr->sh_type = SHT_MIPS_MSYM;
hdr->sh_flags |= SHF_ALLOC;
hdr->sh_entsize = 8;
}
else if (strcmp (name, ".MIPS.xhash") == 0)
{
hdr->sh_type = SHT_MIPS_XHASH;
hdr->sh_flags |= SHF_ALLOC;
hdr->sh_entsize = get_elf_backend_data(abfd)->s->arch_size == 64 ? 0 : 4;
}
/* The generic elf_fake_sections will set up REL_HDR using the default
kind of relocations. We used to set up a second header for the
non-default kind of relocations here, but only NewABI would use
these, and the IRIX ld doesn't like resulting empty RELA sections.
Thus we create those header only on demand now. */
return TRUE;
}
/* Given a BFD section, try to locate the corresponding ELF section
index. This is used by both the 32-bit and the 64-bit ABI.
Actually, it's not clear to me that the 64-bit ABI supports these,
but for non-PIC objects we will certainly want support for at least
the .scommon section. */
bfd_boolean
_bfd_mips_elf_section_from_bfd_section (bfd *abfd ATTRIBUTE_UNUSED,
asection *sec, int *retval)
{
if (strcmp (bfd_section_name (sec), ".scommon") == 0)
{
*retval = SHN_MIPS_SCOMMON;
return TRUE;
}
if (strcmp (bfd_section_name (sec), ".acommon") == 0)
{
*retval = SHN_MIPS_ACOMMON;
return TRUE;
}
return FALSE;
}
/* Hook called by the linker routine which adds symbols from an object
file. We must handle the special MIPS section numbers here. */
bfd_boolean
_bfd_mips_elf_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
Elf_Internal_Sym *sym, const char **namep,
flagword *flagsp ATTRIBUTE_UNUSED,
asection **secp, bfd_vma *valp)
{
if (SGI_COMPAT (abfd)
&& (abfd->flags & DYNAMIC) != 0
&& strcmp (*namep, "_rld_new_interface") == 0)
{
/* Skip IRIX5 rld entry name. */
*namep = NULL;
return TRUE;
}
/* Shared objects may have a dynamic symbol '_gp_disp' defined as
a SECTION *ABS*. This causes ld to think it can resolve _gp_disp
by setting a DT_NEEDED for the shared object. Since _gp_disp is
a magic symbol resolved by the linker, we ignore this bogus definition
of _gp_disp. New ABI objects do not suffer from this problem so this
is not done for them. */
if (!NEWABI_P(abfd)
&& (sym->st_shndx == SHN_ABS)
&& (strcmp (*namep, "_gp_disp") == 0))
{
*namep = NULL;
return TRUE;
}
switch (sym->st_shndx)
{
case SHN_COMMON:
/* Common symbols less than the GP size are automatically
treated as SHN_MIPS_SCOMMON symbols. */
if (sym->st_size > elf_gp_size (abfd)
|| ELF_ST_TYPE (sym->st_info) == STT_TLS
|| IRIX_COMPAT (abfd) == ict_irix6)
break;
/* Fall through. */
case SHN_MIPS_SCOMMON:
*secp = bfd_make_section_old_way (abfd, ".scommon");
(*secp)->flags |= SEC_IS_COMMON | SEC_SMALL_DATA;
*valp = sym->st_size;
break;
case SHN_MIPS_TEXT:
/* This section is used in a shared object. */
if (mips_elf_tdata (abfd)->elf_text_section == NULL)
{
asymbol *elf_text_symbol;
asection *elf_text_section;
size_t amt = sizeof (asection);
elf_text_section = bfd_zalloc (abfd, amt);
if (elf_text_section == NULL)
return FALSE;
amt = sizeof (asymbol);
elf_text_symbol = bfd_zalloc (abfd, amt);
if (elf_text_symbol == NULL)
return FALSE;
/* Initialize the section. */
mips_elf_tdata (abfd)->elf_text_section = elf_text_section;
mips_elf_tdata (abfd)->elf_text_symbol = elf_text_symbol;
elf_text_section->symbol = elf_text_symbol;
elf_text_section->symbol_ptr_ptr = &mips_elf_tdata (abfd)->elf_text_symbol;
elf_text_section->name = ".text";
elf_text_section->flags = SEC_NO_FLAGS;
elf_text_section->output_section = NULL;
elf_text_section->owner = abfd;
elf_text_symbol->name = ".text";
elf_text_symbol->flags = BSF_SECTION_SYM | BSF_DYNAMIC;
elf_text_symbol->section = elf_text_section;
}
/* This code used to do *secp = bfd_und_section_ptr if
bfd_link_pic (info). I don't know why, and that doesn't make sense,
so I took it out. */
*secp = mips_elf_tdata (abfd)->elf_text_section;
break;
case SHN_MIPS_ACOMMON:
/* Fall through. XXX Can we treat this as allocated data? */
case SHN_MIPS_DATA:
/* This section is used in a shared object. */
if (mips_elf_tdata (abfd)->elf_data_section == NULL)
{
asymbol *elf_data_symbol;
asection *elf_data_section;
size_t amt = sizeof (asection);
elf_data_section = bfd_zalloc (abfd, amt);
if (elf_data_section == NULL)
return FALSE;
amt = sizeof (asymbol);
elf_data_symbol = bfd_zalloc (abfd, amt);
if (elf_data_symbol == NULL)
return FALSE;
/* Initialize the section. */
mips_elf_tdata (abfd)->elf_data_section = elf_data_section;
mips_elf_tdata (abfd)->elf_data_symbol = elf_data_symbol;
elf_data_section->symbol = elf_data_symbol;
elf_data_section->symbol_ptr_ptr = &mips_elf_tdata (abfd)->elf_data_symbol;
elf_data_section->name = ".data";
elf_data_section->flags = SEC_NO_FLAGS;
elf_data_section->output_section = NULL;
elf_data_section->owner = abfd;
elf_data_symbol->name = ".data";
elf_data_symbol->flags = BSF_SECTION_SYM | BSF_DYNAMIC;
elf_data_symbol->section = elf_data_section;
}
/* This code used to do *secp = bfd_und_section_ptr if
bfd_link_pic (info). I don't know why, and that doesn't make sense,
so I took it out. */
*secp = mips_elf_tdata (abfd)->elf_data_section;
break;
case SHN_MIPS_SUNDEFINED:
*secp = bfd_und_section_ptr;
break;
}
if (SGI_COMPAT (abfd)
&& ! bfd_link_pic (info)
&& info->output_bfd->xvec == abfd->xvec
&& strcmp (*namep, "__rld_obj_head") == 0)
{
struct elf_link_hash_entry *h;
struct bfd_link_hash_entry *bh;
/* Mark __rld_obj_head as dynamic. */
bh = NULL;
if (! (_bfd_generic_link_add_one_symbol
(info, abfd, *namep, BSF_GLOBAL, *secp, *valp, NULL, FALSE,
get_elf_backend_data (abfd)->collect, &bh)))
return FALSE;
h = (struct elf_link_hash_entry *) bh;
h->non_elf = 0;
h->def_regular = 1;
h->type = STT_OBJECT;
if (! bfd_elf_link_record_dynamic_symbol (info, h))
return FALSE;
mips_elf_hash_table (info)->use_rld_obj_head = TRUE;
mips_elf_hash_table (info)->rld_symbol = h;
}
/* If this is a mips16 text symbol, add 1 to the value to make it
odd. This will cause something like .word SYM to come up with
the right value when it is loaded into the PC. */
if (ELF_ST_IS_COMPRESSED (sym->st_other))
++*valp;
return TRUE;
}
/* This hook function is called before the linker writes out a global
symbol. We mark symbols as small common if appropriate. This is
also where we undo the increment of the value for a mips16 symbol. */
int
_bfd_mips_elf_link_output_symbol_hook
(struct bfd_link_info *info ATTRIBUTE_UNUSED,
const char *name ATTRIBUTE_UNUSED, Elf_Internal_Sym *sym,
asection *input_sec, struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
{
/* If we see a common symbol, which implies a relocatable link, then
if a symbol was small common in an input file, mark it as small
common in the output file. */
if (sym->st_shndx == SHN_COMMON
&& strcmp (input_sec->name, ".scommon") == 0)
sym->st_shndx = SHN_MIPS_SCOMMON;
if (ELF_ST_IS_COMPRESSED (sym->st_other))
sym->st_value &= ~1;
return 1;
}
/* Functions for the dynamic linker. */
/* Create dynamic sections when linking against a dynamic object. */
bfd_boolean
_bfd_mips_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info)
{
struct elf_link_hash_entry *h;
struct bfd_link_hash_entry *bh;
flagword flags;
register asection *s;
const char * const *namep;
struct mips_elf_link_hash_table *htab;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
| SEC_LINKER_CREATED | SEC_READONLY);
/* The psABI requires a read-only .dynamic section, but the VxWorks
EABI doesn't. */
if (htab->root.target_os != is_vxworks)
{
s = bfd_get_linker_section (abfd, ".dynamic");
if (s != NULL)
{
if (!bfd_set_section_flags (s, flags))
return FALSE;
}
}
/* We need to create .got section. */
if (!mips_elf_create_got_section (abfd, info))
return FALSE;
if (! mips_elf_rel_dyn_section (info, TRUE))
return FALSE;
/* Create .stub section. */
s = bfd_make_section_anyway_with_flags (abfd,
MIPS_ELF_STUB_SECTION_NAME (abfd),
flags | SEC_CODE);
if (s == NULL
|| !bfd_set_section_alignment (s, MIPS_ELF_LOG_FILE_ALIGN (abfd)))
return FALSE;
htab->sstubs = s;
if (!mips_elf_hash_table (info)->use_rld_obj_head
&& bfd_link_executable (info)
&& bfd_get_linker_section (abfd, ".rld_map") == NULL)
{
s = bfd_make_section_anyway_with_flags (abfd, ".rld_map",
flags &~ (flagword) SEC_READONLY);
if (s == NULL
|| !bfd_set_section_alignment (s, MIPS_ELF_LOG_FILE_ALIGN (abfd)))
return FALSE;
}
/* Create .MIPS.xhash section. */
if (info->emit_gnu_hash)
s = bfd_make_section_anyway_with_flags (abfd, ".MIPS.xhash",
flags | SEC_READONLY);
/* On IRIX5, we adjust add some additional symbols and change the
alignments of several sections. There is no ABI documentation
indicating that this is necessary on IRIX6, nor any evidence that
the linker takes such action. */
if (IRIX_COMPAT (abfd) == ict_irix5)
{
for (namep = mips_elf_dynsym_rtproc_names; *namep != NULL; namep++)
{
bh = NULL;
if (! (_bfd_generic_link_add_one_symbol
(info, abfd, *namep, BSF_GLOBAL, bfd_und_section_ptr, 0,
NULL, FALSE, get_elf_backend_data (abfd)->collect, &bh)))
return FALSE;
h = (struct elf_link_hash_entry *) bh;
h->mark = 1;
h->non_elf = 0;
h->def_regular = 1;
h->type = STT_SECTION;
if (! bfd_elf_link_record_dynamic_symbol (info, h))
return FALSE;
}
/* We need to create a .compact_rel section. */
if (SGI_COMPAT (abfd))
{
if (!mips_elf_create_compact_rel_section (abfd, info))
return FALSE;
}
/* Change alignments of some sections. */
s = bfd_get_linker_section (abfd, ".hash");
if (s != NULL)
bfd_set_section_alignment (s, MIPS_ELF_LOG_FILE_ALIGN (abfd));
s = bfd_get_linker_section (abfd, ".dynsym");
if (s != NULL)
bfd_set_section_alignment (s, MIPS_ELF_LOG_FILE_ALIGN (abfd));
s = bfd_get_linker_section (abfd, ".dynstr");
if (s != NULL)
bfd_set_section_alignment (s, MIPS_ELF_LOG_FILE_ALIGN (abfd));
/* ??? */
s = bfd_get_section_by_name (abfd, ".reginfo");
if (s != NULL)
bfd_set_section_alignment (s, MIPS_ELF_LOG_FILE_ALIGN (abfd));
s = bfd_get_linker_section (abfd, ".dynamic");
if (s != NULL)
bfd_set_section_alignment (s, MIPS_ELF_LOG_FILE_ALIGN (abfd));
}
if (bfd_link_executable (info))
{
const char *name;
name = SGI_COMPAT (abfd) ? "_DYNAMIC_LINK" : "_DYNAMIC_LINKING";
bh = NULL;
if (!(_bfd_generic_link_add_one_symbol
(info, abfd, name, BSF_GLOBAL, bfd_abs_section_ptr, 0,
NULL, FALSE, get_elf_backend_data (abfd)->collect, &bh)))
return FALSE;
h = (struct elf_link_hash_entry *) bh;
h->non_elf = 0;
h->def_regular = 1;
h->type = STT_SECTION;
if (! bfd_elf_link_record_dynamic_symbol (info, h))
return FALSE;
if (! mips_elf_hash_table (info)->use_rld_obj_head)
{
/* __rld_map is a four byte word located in the .data section
and is filled in by the rtld to contain a pointer to
the _r_debug structure. Its symbol value will be set in
_bfd_mips_elf_finish_dynamic_symbol. */
s = bfd_get_linker_section (abfd, ".rld_map");
BFD_ASSERT (s != NULL);
name = SGI_COMPAT (abfd) ? "__rld_map" : "__RLD_MAP";
bh = NULL;
if (!(_bfd_generic_link_add_one_symbol
(info, abfd, name, BSF_GLOBAL, s, 0, NULL, FALSE,
get_elf_backend_data (abfd)->collect, &bh)))
return FALSE;
h = (struct elf_link_hash_entry *) bh;
h->non_elf = 0;
h->def_regular = 1;
h->type = STT_OBJECT;
if (! bfd_elf_link_record_dynamic_symbol (info, h))
return FALSE;
mips_elf_hash_table (info)->rld_symbol = h;
}
}
/* Create the .plt, .rel(a).plt, .dynbss and .rel(a).bss sections.
Also, on VxWorks, create the _PROCEDURE_LINKAGE_TABLE_ symbol. */
if (!_bfd_elf_create_dynamic_sections (abfd, info))
return FALSE;
/* Do the usual VxWorks handling. */
if (htab->root.target_os == is_vxworks
&& !elf_vxworks_create_dynamic_sections (abfd, info, &htab->srelplt2))
return FALSE;
return TRUE;
}
/* Return true if relocation REL against section SEC is a REL rather than
RELA relocation. RELOCS is the first relocation in the section and
ABFD is the bfd that contains SEC. */
static bfd_boolean
mips_elf_rel_relocation_p (bfd *abfd, asection *sec,
const Elf_Internal_Rela *relocs,
const Elf_Internal_Rela *rel)
{
Elf_Internal_Shdr *rel_hdr;
const struct elf_backend_data *bed;
/* To determine which flavor of relocation this is, we depend on the
fact that the INPUT_SECTION's REL_HDR is read before RELA_HDR. */
rel_hdr = elf_section_data (sec)->rel.hdr;
if (rel_hdr == NULL)
return FALSE;
bed = get_elf_backend_data (abfd);
return ((size_t) (rel - relocs)
< NUM_SHDR_ENTRIES (rel_hdr) * bed->s->int_rels_per_ext_rel);
}
/* Read the addend for REL relocation REL, which belongs to bfd ABFD.
HOWTO is the relocation's howto and CONTENTS points to the contents
of the section that REL is against. */
static bfd_vma
mips_elf_read_rel_addend (bfd *abfd, const Elf_Internal_Rela *rel,
reloc_howto_type *howto, bfd_byte *contents)
{
bfd_byte *location;
unsigned int r_type;
bfd_vma addend;
bfd_vma bytes;
r_type = ELF_R_TYPE (abfd, rel->r_info);
location = contents + rel->r_offset;
/* Get the addend, which is stored in the input file. */
_bfd_mips_elf_reloc_unshuffle (abfd, r_type, FALSE, location);
bytes = mips_elf_obtain_contents (howto, rel, abfd, contents);
_bfd_mips_elf_reloc_shuffle (abfd, r_type, FALSE, location);
addend = bytes & howto->src_mask;
/* Shift is 2, unusually, for microMIPS JALX. Adjust the addend
accordingly. */
if (r_type == R_MICROMIPS_26_S1 && (bytes >> 26) == 0x3c)
addend <<= 1;
return addend;
}
/* REL is a relocation in ABFD that needs a partnering LO16 relocation
and *ADDEND is the addend for REL itself. Look for the LO16 relocation
and update *ADDEND with the final addend. Return true on success
or false if the LO16 could not be found. RELEND is the exclusive
upper bound on the relocations for REL's section. */
static bfd_boolean
mips_elf_add_lo16_rel_addend (bfd *abfd,
const Elf_Internal_Rela *rel,
const Elf_Internal_Rela *relend,
bfd_byte *contents, bfd_vma *addend)
{
unsigned int r_type, lo16_type;
const Elf_Internal_Rela *lo16_relocation;
reloc_howto_type *lo16_howto;
bfd_vma l;
r_type = ELF_R_TYPE (abfd, rel->r_info);
if (mips16_reloc_p (r_type))
lo16_type = R_MIPS16_LO16;
else if (micromips_reloc_p (r_type))
lo16_type = R_MICROMIPS_LO16;
else if (r_type == R_MIPS_PCHI16)
lo16_type = R_MIPS_PCLO16;
else
lo16_type = R_MIPS_LO16;
/* The combined value is the sum of the HI16 addend, left-shifted by
sixteen bits, and the LO16 addend, sign extended. (Usually, the
code does a `lui' of the HI16 value, and then an `addiu' of the
LO16 value.)
Scan ahead to find a matching LO16 relocation.
According to the MIPS ELF ABI, the R_MIPS_LO16 relocation must
be immediately following. However, for the IRIX6 ABI, the next
relocation may be a composed relocation consisting of several
relocations for the same address. In that case, the R_MIPS_LO16
relocation may occur as one of these. We permit a similar
extension in general, as that is useful for GCC.
In some cases GCC dead code elimination removes the LO16 but keeps
the corresponding HI16. This is strictly speaking a violation of
the ABI but not immediately harmful. */
lo16_relocation = mips_elf_next_relocation (abfd, lo16_type, rel, relend);
if (lo16_relocation == NULL)
return FALSE;
/* Obtain the addend kept there. */
lo16_howto = MIPS_ELF_RTYPE_TO_HOWTO (abfd, lo16_type, FALSE);
l = mips_elf_read_rel_addend (abfd, lo16_relocation, lo16_howto, contents);
l <<= lo16_howto->rightshift;
l = _bfd_mips_elf_sign_extend (l, 16);
*addend <<= 16;
*addend += l;
return TRUE;
}
/* Try to read the contents of section SEC in bfd ABFD. Return true and
store the contents in *CONTENTS on success. Assume that *CONTENTS
already holds the contents if it is nonull on entry. */
static bfd_boolean
mips_elf_get_section_contents (bfd *abfd, asection *sec, bfd_byte **contents)
{
if (*contents)
return TRUE;
/* Get cached copy if it exists. */
if (elf_section_data (sec)->this_hdr.contents != NULL)
{
*contents = elf_section_data (sec)->this_hdr.contents;
return TRUE;
}
return bfd_malloc_and_get_section (abfd, sec, contents);
}
/* Make a new PLT record to keep internal data. */
static struct plt_entry *
mips_elf_make_plt_record (bfd *abfd)
{
struct plt_entry *entry;
entry = bfd_zalloc (abfd, sizeof (*entry));
if (entry == NULL)
return NULL;
entry->stub_offset = MINUS_ONE;
entry->mips_offset = MINUS_ONE;
entry->comp_offset = MINUS_ONE;
entry->gotplt_index = MINUS_ONE;
return entry;
}
/* Define the special `__gnu_absolute_zero' symbol. We only need this
for PIC code, as otherwise there is no load-time relocation involved
and local GOT entries whose value is zero at static link time will
retain their value at load time. */
static bfd_boolean
mips_elf_define_absolute_zero (bfd *abfd, struct bfd_link_info *info,
struct mips_elf_link_hash_table *htab,
unsigned int r_type)
{
union
{
struct elf_link_hash_entry *eh;
struct bfd_link_hash_entry *bh;
}
hzero;
BFD_ASSERT (!htab->use_absolute_zero);
BFD_ASSERT (bfd_link_pic (info));
hzero.bh = NULL;
if (!_bfd_generic_link_add_one_symbol (info, abfd, "__gnu_absolute_zero",
BSF_GLOBAL, bfd_abs_section_ptr, 0,
NULL, FALSE, FALSE, &hzero.bh))
return FALSE;
BFD_ASSERT (hzero.bh != NULL);
hzero.eh->size = 0;
hzero.eh->type = STT_NOTYPE;
hzero.eh->other = STV_PROTECTED;
hzero.eh->def_regular = 1;
hzero.eh->non_elf = 0;
if (!mips_elf_record_global_got_symbol (hzero.eh, abfd, info, TRUE, r_type))
return FALSE;
htab->use_absolute_zero = TRUE;
return TRUE;
}
/* Look through the relocs for a section during the first phase, and
allocate space in the global offset table and record the need for
standard MIPS and compressed procedure linkage table entries. */
bfd_boolean
_bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
asection *sec, const Elf_Internal_Rela *relocs)
{
const char *name;
bfd *dynobj;
Elf_Internal_Shdr *symtab_hdr;
struct elf_link_hash_entry **sym_hashes;
size_t extsymoff;
const Elf_Internal_Rela *rel;
const Elf_Internal_Rela *rel_end;
asection *sreloc;
const struct elf_backend_data *bed;
struct mips_elf_link_hash_table *htab;
bfd_byte *contents;
bfd_vma addend;
reloc_howto_type *howto;
if (bfd_link_relocatable (info))
return TRUE;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
dynobj = elf_hash_table (info)->dynobj;
symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
sym_hashes = elf_sym_hashes (abfd);
extsymoff = (elf_bad_symtab (abfd)) ? 0 : symtab_hdr->sh_info;
bed = get_elf_backend_data (abfd);
rel_end = relocs + sec->reloc_count;
/* Check for the mips16 stub sections. */
name = bfd_section_name (sec);
if (FN_STUB_P (name))
{
unsigned long r_symndx;
/* Look at the relocation information to figure out which symbol
this is for. */
r_symndx = mips16_stub_symndx (bed, sec, relocs, rel_end);
if (r_symndx == 0)
{
_bfd_error_handler
/* xgettext:c-format */
(_("%pB: warning: cannot determine the target function for"
" stub section `%s'"),
abfd, name);
bfd_set_error (bfd_error_bad_value);
return FALSE;
}
if (r_symndx < extsymoff
|| sym_hashes[r_symndx - extsymoff] == NULL)
{
asection *o;
/* This stub is for a local symbol. This stub will only be
needed if there is some relocation in this BFD, other
than a 16 bit function call, which refers to this symbol. */
for (o = abfd->sections; o != NULL; o = o->next)
{
Elf_Internal_Rela *sec_relocs;
const Elf_Internal_Rela *r, *rend;
/* We can ignore stub sections when looking for relocs. */
if ((o->flags & SEC_RELOC) == 0
|| o->reloc_count == 0
|| section_allows_mips16_refs_p (o))
continue;
sec_relocs
= _bfd_elf_link_read_relocs (abfd, o, NULL, NULL,
info->keep_memory);
if (sec_relocs == NULL)
return FALSE;
rend = sec_relocs + o->reloc_count;
for (r = sec_relocs; r < rend; r++)
if (ELF_R_SYM (abfd, r->r_info) == r_symndx
&& !mips16_call_reloc_p (ELF_R_TYPE (abfd, r->r_info)))
break;
if (elf_section_data (o)->relocs != sec_relocs)
free (sec_relocs);
if (r < rend)
break;
}
if (o == NULL)
{
/* There is no non-call reloc for this stub, so we do
not need it. Since this function is called before
the linker maps input sections to output sections, we
can easily discard it by setting the SEC_EXCLUDE
flag. */
sec->flags |= SEC_EXCLUDE;
return TRUE;
}
/* Record this stub in an array of local symbol stubs for
this BFD. */
if (mips_elf_tdata (abfd)->local_stubs == NULL)
{
unsigned long symcount;
asection **n;
bfd_size_type amt;
if (elf_bad_symtab (abfd))
symcount = NUM_SHDR_ENTRIES (symtab_hdr);
else
symcount = symtab_hdr->sh_info;
amt = symcount * sizeof (asection *);
n = bfd_zalloc (abfd, amt);
if (n == NULL)
return FALSE;
mips_elf_tdata (abfd)->local_stubs = n;
}
sec->flags |= SEC_KEEP;
mips_elf_tdata (abfd)->local_stubs[r_symndx] = sec;
/* We don't need to set mips16_stubs_seen in this case.
That flag is used to see whether we need to look through
the global symbol table for stubs. We don't need to set
it here, because we just have a local stub. */
}
else
{
struct mips_elf_link_hash_entry *h;
h = ((struct mips_elf_link_hash_entry *)
sym_hashes[r_symndx - extsymoff]);
while (h->root.root.type == bfd_link_hash_indirect
|| h->root.root.type == bfd_link_hash_warning)
h = (struct mips_elf_link_hash_entry *) h->root.root.u.i.link;
/* H is the symbol this stub is for. */
/* If we already have an appropriate stub for this function, we
don't need another one, so we can discard this one. Since
this function is called before the linker maps input sections
to output sections, we can easily discard it by setting the
SEC_EXCLUDE flag. */
if (h->fn_stub != NULL)
{
sec->flags |= SEC_EXCLUDE;
return TRUE;
}
sec->flags |= SEC_KEEP;
h->fn_stub = sec;
mips_elf_hash_table (info)->mips16_stubs_seen = TRUE;
}
}
else if (CALL_STUB_P (name) || CALL_FP_STUB_P (name))
{
unsigned long r_symndx;
struct mips_elf_link_hash_entry *h;
asection **loc;
/* Look at the relocation information to figure out which symbol
this is for. */
r_symndx = mips16_stub_symndx (bed, sec, relocs, rel_end);
if (r_symndx == 0)
{
_bfd_error_handler
/* xgettext:c-format */
(_("%pB: warning: cannot determine the target function for"
" stub section `%s'"),
abfd, name);
bfd_set_error (bfd_error_bad_value);
return FALSE;
}
if (r_symndx < extsymoff
|| sym_hashes[r_symndx - extsymoff] == NULL)
{
asection *o;
/* This stub is for a local symbol. This stub will only be
needed if there is some relocation (R_MIPS16_26) in this BFD
that refers to this symbol. */
for (o = abfd->sections; o != NULL; o = o->next)
{
Elf_Internal_Rela *sec_relocs;
const Elf_Internal_Rela *r, *rend;
/* We can ignore stub sections when looking for relocs. */
if ((o->flags & SEC_RELOC) == 0
|| o->reloc_count == 0
|| section_allows_mips16_refs_p (o))
continue;
sec_relocs
= _bfd_elf_link_read_relocs (abfd, o, NULL, NULL,
info->keep_memory);
if (sec_relocs == NULL)
return FALSE;
rend = sec_relocs + o->reloc_count;
for (r = sec_relocs; r < rend; r++)
if (ELF_R_SYM (abfd, r->r_info) == r_symndx
&& ELF_R_TYPE (abfd, r->r_info) == R_MIPS16_26)
break;
if (elf_section_data (o)->relocs != sec_relocs)
free (sec_relocs);
if (r < rend)
break;
}
if (o == NULL)
{
/* There is no non-call reloc for this stub, so we do
not need it. Since this function is called before
the linker maps input sections to output sections, we
can easily discard it by setting the SEC_EXCLUDE
flag. */
sec->flags |= SEC_EXCLUDE;
return TRUE;
}
/* Record this stub in an array of local symbol call_stubs for
this BFD. */
if (mips_elf_tdata (abfd)->local_call_stubs == NULL)
{
unsigned long symcount;
asection **n;
bfd_size_type amt;
if (elf_bad_symtab (abfd))
symcount = NUM_SHDR_ENTRIES (symtab_hdr);
else
symcount = symtab_hdr->sh_info;
amt = symcount * sizeof (asection *);
n = bfd_zalloc (abfd, amt);
if (n == NULL)
return FALSE;
mips_elf_tdata (abfd)->local_call_stubs = n;
}
sec->flags |= SEC_KEEP;
mips_elf_tdata (abfd)->local_call_stubs[r_symndx] = sec;
/* We don't need to set mips16_stubs_seen in this case.
That flag is used to see whether we need to look through
the global symbol table for stubs. We don't need to set
it here, because we just have a local stub. */
}
else
{
h = ((struct mips_elf_link_hash_entry *)
sym_hashes[r_symndx - extsymoff]);
/* H is the symbol this stub is for. */
if (CALL_FP_STUB_P (name))
loc = &h->call_fp_stub;
else
loc = &h->call_stub;
/* If we already have an appropriate stub for this function, we
don't need another one, so we can discard this one. Since
this function is called before the linker maps input sections
to output sections, we can easily discard it by setting the
SEC_EXCLUDE flag. */
if (*loc != NULL)
{
sec->flags |= SEC_EXCLUDE;
return TRUE;
}
sec->flags |= SEC_KEEP;
*loc = sec;
mips_elf_hash_table (info)->mips16_stubs_seen = TRUE;
}
}
sreloc = NULL;
contents = NULL;
for (rel = relocs; rel < rel_end; ++rel)
{
unsigned long r_symndx;
unsigned int r_type;
struct elf_link_hash_entry *h;
bfd_boolean can_make_dynamic_p;
bfd_boolean call_reloc_p;
bfd_boolean constrain_symbol_p;
r_symndx = ELF_R_SYM (abfd, rel->r_info);
r_type = ELF_R_TYPE (abfd, rel->r_info);
if (r_symndx < extsymoff)
h = NULL;
else if (r_symndx >= extsymoff + NUM_SHDR_ENTRIES (symtab_hdr))
{
_bfd_error_handler
/* xgettext:c-format */
(_("%pB: malformed reloc detected for section %s"),
abfd, name);
bfd_set_error (bfd_error_bad_value);
return FALSE;
}
else
{
h = sym_hashes[r_symndx - extsymoff];
if (h != NULL)
{
while (h->root.type == bfd_link_hash_indirect
|| h->root.type == bfd_link_hash_warning)
h = (struct elf_link_hash_entry *) h->root.u.i.link;
}
}
/* Set CAN_MAKE_DYNAMIC_P to true if we can convert this
relocation into a dynamic one. */
can_make_dynamic_p = FALSE;
/* Set CALL_RELOC_P to true if the relocation is for a call,
and if pointer equality therefore doesn't matter. */
call_reloc_p = FALSE;
/* Set CONSTRAIN_SYMBOL_P if we need to take the relocation
into account when deciding how to define the symbol. */
constrain_symbol_p = TRUE;
switch (r_type)
{
case R_MIPS_CALL16:
case R_MIPS_CALL_HI16:
case R_MIPS_CALL_LO16:
case R_MIPS16_CALL16:
case R_MICROMIPS_CALL16:
case R_MICROMIPS_CALL_HI16:
case R_MICROMIPS_CALL_LO16:
call_reloc_p = TRUE;
/* Fall through. */
case R_MIPS_GOT16:
case R_MIPS_GOT_LO16:
case R_MIPS_GOT_PAGE:
case R_MIPS_GOT_DISP:
case R_MIPS16_GOT16:
case R_MICROMIPS_GOT16:
case R_MICROMIPS_GOT_LO16:
case R_MICROMIPS_GOT_PAGE:
case R_MICROMIPS_GOT_DISP:
/* If we have a symbol that will resolve to zero at static link
time and it is used by a GOT relocation applied to code we
cannot relax to an immediate zero load, then we will be using
the special `__gnu_absolute_zero' symbol whose value is zero
at dynamic load time. We ignore HI16-type GOT relocations at
this stage, because their handling will depend entirely on
the corresponding LO16-type GOT relocation. */
if (!call_hi16_reloc_p (r_type)
&& h != NULL
&& bfd_link_pic (info)
&& !htab->use_absolute_zero
&& UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
{
bfd_boolean rel_reloc;
if (!mips_elf_get_section_contents (abfd, sec, &contents))
return FALSE;
rel_reloc = mips_elf_rel_relocation_p (abfd, sec, relocs, rel);
howto = MIPS_ELF_RTYPE_TO_HOWTO (abfd, r_type, !rel_reloc);
if (!mips_elf_nullify_got_load (abfd, contents, rel, howto,
FALSE))
if (!mips_elf_define_absolute_zero (abfd, info, htab, r_type))
return FALSE;
}
/* Fall through. */
case R_MIPS_GOT_HI16:
case R_MIPS_GOT_OFST:
case R_MIPS_TLS_GOTTPREL:
case R_MIPS_TLS_GD:
case R_MIPS_TLS_LDM:
case R_MIPS16_TLS_GOTTPREL:
case R_MIPS16_TLS_GD:
case R_MIPS16_TLS_LDM:
case R_MICROMIPS_GOT_HI16:
case R_MICROMIPS_GOT_OFST:
case R_MICROMIPS_TLS_GOTTPREL:
case R_MICROMIPS_TLS_GD:
case R_MICROMIPS_TLS_LDM:
if (dynobj == NULL)
elf_hash_table (info)->dynobj = dynobj = abfd;
if (!mips_elf_create_got_section (dynobj, info))
return FALSE;
if (htab->root.target_os == is_vxworks
&& !bfd_link_pic (info))
{
_bfd_error_handler
/* xgettext:c-format */
(_("%pB: GOT reloc at %#" PRIx64 " not expected in executables"),
abfd, (uint64_t) rel->r_offset);
bfd_set_error (bfd_error_bad_value);
return FALSE;
}
can_make_dynamic_p = TRUE;
break;
case R_MIPS_NONE:
case R_MIPS_JALR:
case R_MICROMIPS_JALR:
/* These relocations have empty fields and are purely there to
provide link information. The symbol value doesn't matter. */
constrain_symbol_p = FALSE;
break;
case R_MIPS_GPREL16:
case R_MIPS_GPREL32:
case R_MIPS16_GPREL:
case R_MICROMIPS_GPREL16:
/* GP-relative relocations always resolve to a definition in a
regular input file, ignoring the one-definition rule. This is
important for the GP setup sequence in NewABI code, which
always resolves to a local function even if other relocations
against the symbol wouldn't. */
constrain_symbol_p = FALSE;
break;
case R_MIPS_32:
case R_MIPS_REL32:
case R_MIPS_64:
/* In VxWorks executables, references to external symbols
must be handled using copy relocs or PLT entries; it is not
possible to convert this relocation into a dynamic one.
For executables that use PLTs and copy-relocs, we have a
choice between converting the relocation into a dynamic
one or using copy relocations or PLT entries. It is
usually better to do the former, unless the relocation is
against a read-only section. */
if ((bfd_link_pic (info)
|| (h != NULL
&& htab->root.target_os != is_vxworks
&& strcmp (h->root.root.string, "__gnu_local_gp") != 0
&& !(!info->nocopyreloc
&& !PIC_OBJECT_P (abfd)
&& MIPS_ELF_READONLY_SECTION (sec))))
&& (sec->flags & SEC_ALLOC) != 0)
{
can_make_dynamic_p = TRUE;
if (dynobj == NULL)
elf_hash_table (info)->dynobj = dynobj = abfd;
}
break;
case R_MIPS_26:
case R_MIPS_PC16:
case R_MIPS_PC21_S2:
case R_MIPS_PC26_S2:
case R_MIPS16_26:
case R_MIPS16_PC16_S1:
case R_MICROMIPS_26_S1:
case R_MICROMIPS_PC7_S1:
case R_MICROMIPS_PC10_S1:
case R_MICROMIPS_PC16_S1:
case R_MICROMIPS_PC23_S2:
call_reloc_p = TRUE;
break;
}
if (h)
{
if (constrain_symbol_p)
{
if (!can_make_dynamic_p)
((struct mips_elf_link_hash_entry *) h)->has_static_relocs = 1;
if (!call_reloc_p)
h->pointer_equality_needed = 1;
/* We must not create a stub for a symbol that has
relocations related to taking the function's address.
This doesn't apply to VxWorks, where CALL relocs refer
to a .got.plt entry instead of a normal .got entry. */
if (htab->root.target_os != is_vxworks
&& (!can_make_dynamic_p || !call_reloc_p))
((struct mips_elf_link_hash_entry *) h)->no_fn_stub = TRUE;
}
/* Relocations against the special VxWorks __GOTT_BASE__ and
__GOTT_INDEX__ symbols must be left to the loader. Allocate
room for them in .rela.dyn. */
if (is_gott_symbol (info, h))
{
if (sreloc == NULL)
{
sreloc = mips_elf_rel_dyn_section (info, TRUE);
if (sreloc == NULL)
return FALSE;
}
mips_elf_allocate_dynamic_relocations (dynobj, info, 1);
if (MIPS_ELF_READONLY_SECTION (sec))
/* We tell the dynamic linker that there are
relocations against the text segment. */
info->flags |= DF_TEXTREL;
}
}
else if (call_lo16_reloc_p (r_type)
|| got_lo16_reloc_p (r_type)
|| got_disp_reloc_p (r_type)
|| (got16_reloc_p (r_type)
&& htab->root.target_os == is_vxworks))
{
/* We may need a local GOT entry for this relocation. We
don't count R_MIPS_GOT_PAGE because we can estimate the
maximum number of pages needed by looking at the size of
the segment. Similar comments apply to R_MIPS*_GOT16 and
R_MIPS*_CALL16, except on VxWorks, where GOT relocations
always evaluate to "G". We don't count R_MIPS_GOT_HI16, or
R_MIPS_CALL_HI16 because these are always followed by an
R_MIPS_GOT_LO16 or R_MIPS_CALL_LO16. */
if (!mips_elf_record_local_got_symbol (abfd, r_symndx,
rel->r_addend, info, r_type))
return FALSE;
}
if (h != NULL
&& mips_elf_relocation_needs_la25_stub (abfd, r_type,
ELF_ST_IS_MIPS16 (h->other)))
((struct mips_elf_link_hash_entry *) h)->has_nonpic_branches = TRUE;
switch (r_type)
{
case R_MIPS_CALL16:
case R_MIPS16_CALL16:
case R_MICROMIPS_CALL16:
if (h == NULL)
{
_bfd_error_handler
/* xgettext:c-format */
(_("%pB: CALL16 reloc at %#" PRIx64 " not against global symbol"),
abfd, (uint64_t) rel->r_offset);
bfd_set_error (bfd_error_bad_value);
return FALSE;
}
/* Fall through. */
case R_MIPS_CALL_HI16:
case R_MIPS_CALL_LO16:
case R_MICROMIPS_CALL_HI16:
case R_MICROMIPS_CALL_LO16:
if (h != NULL)
{
/* Make sure there is room in the regular GOT to hold the
function's address. We may eliminate it in favour of
a .got.plt entry later; see mips_elf_count_got_symbols. */
if (!mips_elf_record_global_got_symbol (h, abfd, info, TRUE,
r_type))
return FALSE;
/* We need a stub, not a plt entry for the undefined
function. But we record it as if it needs plt. See
_bfd_elf_adjust_dynamic_symbol. */
h->needs_plt = 1;
h->type = STT_FUNC;
}
break;
case R_MIPS_GOT_PAGE:
case R_MICROMIPS_GOT_PAGE:
case R_MIPS16_GOT16:
case R_MIPS_GOT16:
case R_MIPS_GOT_HI16:
case R_MIPS_GOT_LO16:
case R_MICROMIPS_GOT16:
case R_MICROMIPS_GOT_HI16:
case R_MICROMIPS_GOT_LO16:
if (!h || got_page_reloc_p (r_type))
{
/* This relocation needs (or may need, if h != NULL) a
page entry in the GOT. For R_MIPS_GOT_PAGE we do not
know for sure until we know whether the symbol is
preemptible. */
if (mips_elf_rel_relocation_p (abfd, sec, relocs, rel))
{
if (!mips_elf_get_section_contents (abfd, sec, &contents))
return FALSE;
howto = MIPS_ELF_RTYPE_TO_HOWTO (abfd, r_type, FALSE);
addend = mips_elf_read_rel_addend (abfd, rel,
howto, contents);
if (got16_reloc_p (r_type))
mips_elf_add_lo16_rel_addend (abfd, rel, rel_end,
contents, &addend);
else
addend <<= howto->rightshift;
}
else
addend = rel->r_addend;
if (!mips_elf_record_got_page_ref (info, abfd, r_symndx,
h, addend))
return FALSE;
if (h)
{
struct mips_elf_link_hash_entry *hmips =
(struct mips_elf_link_hash_entry *) h;
/* This symbol is definitely not overridable. */
if (hmips->root.def_regular
&& ! (bfd_link_pic (info) && ! info->symbolic
&& ! hmips->root.forced_local))
h = NULL;
}
}
/* If this is a global, overridable symbol, GOT_PAGE will
decay to GOT_DISP, so we'll need a GOT entry for it. */
/* Fall through. */
case R_MIPS_GOT_DISP:
case R_MICROMIPS_GOT_DISP:
if (h && !mips_elf_record_global_got_symbol (h, abfd, info,
FALSE, r_type))
return FALSE;
break;
case R_MIPS_TLS_GOTTPREL:
case R_MIPS16_TLS_GOTTPREL:
case R_MICROMIPS_TLS_GOTTPREL:
if (bfd_link_pic (info))
info->flags |= DF_STATIC_TLS;
/* Fall through */
case R_MIPS_TLS_LDM:
case R_MIPS16_TLS_LDM:
case R_MICROMIPS_TLS_LDM:
if (tls_ldm_reloc_p (r_type))
{
r_symndx = STN_UNDEF;
h = NULL;
}
/* Fall through */
case R_MIPS_TLS_GD:
case R_MIPS16_TLS_GD:
case R_MICROMIPS_TLS_GD:
/* This symbol requires a global offset table entry, or two
for TLS GD relocations. */
if (h != NULL)
{
if (!mips_elf_record_global_got_symbol (h, abfd, info,
FALSE, r_type))
return FALSE;
}
else
{
if (!mips_elf_record_local_got_symbol (abfd, r_symndx,
rel->r_addend,
info, r_type))
return FALSE;
}
break;
case R_MIPS_32:
case R_MIPS_REL32:
case R_MIPS_64:
/* In VxWorks executables, references to external symbols
are handled using copy relocs or PLT stubs, so there's
no need to add a .rela.dyn entry for this relocation. */
if (can_make_dynamic_p)
{
if (sreloc == NULL)
{
sreloc = mips_elf_rel_dyn_section (info, TRUE);
if (sreloc == NULL)
return FALSE;
}
if (bfd_link_pic (info) && h == NULL)
{
/* When creating a shared object, we must copy these
reloc types into the output file as R_MIPS_REL32
relocs. Make room for this reloc in .rel(a).dyn. */
mips_elf_allocate_dynamic_relocations (dynobj, info, 1);
if (MIPS_ELF_READONLY_SECTION (sec))
/* We tell the dynamic linker that there are
relocations against the text segment. */
info->flags |= DF_TEXTREL;
}
else
{
struct mips_elf_link_hash_entry *hmips;
/* For a shared object, we must copy this relocation
unless the symbol turns out to be undefined and
weak with non-default visibility, in which case
it will be left as zero.
We could elide R_MIPS_REL32 for locally binding symbols
in shared libraries, but do not yet do so.
For an executable, we only need to copy this
reloc if the symbol is defined in a dynamic
object. */
hmips = (struct mips_elf_link_hash_entry *) h;
++hmips->possibly_dynamic_relocs;
if (MIPS_ELF_READONLY_SECTION (sec))
/* We need it to tell the dynamic linker if there
are relocations against the text segment. */
hmips->readonly_reloc = TRUE;
}
}
if (SGI_COMPAT (abfd))
mips_elf_hash_table (info)->compact_rel_size +=
sizeof (Elf32_External_crinfo);
break;
case R_MIPS_26:
case R_MIPS_GPREL16:
case R_MIPS_LITERAL:
case R_MIPS_GPREL32:
case R_MICROMIPS_26_S1:
case R_MICROMIPS_GPREL16:
case R_MICROMIPS_LITERAL:
case R_MICROMIPS_GPREL7_S2:
if (SGI_COMPAT (abfd))
mips_elf_hash_table (info)->compact_rel_size +=
sizeof (Elf32_External_crinfo);
break;
/* This relocation describes the C++ object vtable hierarchy.
Reconstruct it for later use during GC. */
case R_MIPS_GNU_VTINHERIT:
if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
return FALSE;
break;
/* This relocation describes which C++ vtable entries are actually
used. Record for later use during GC. */
case R_MIPS_GNU_VTENTRY:
if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
return FALSE;
break;
default:
break;
}
/* Record the need for a PLT entry. At this point we don't know
yet if we are going to create a PLT in the first place, but
we only record whether the relocation requires a standard MIPS
or a compressed code entry anyway. If we don't make a PLT after
all, then we'll just ignore these arrangements. Likewise if
a PLT entry is not created because the symbol is satisfied
locally. */
if (h != NULL
&& (branch_reloc_p (r_type)
|| mips16_branch_reloc_p (r_type)
|| micromips_branch_reloc_p (r_type))
&& !SYMBOL_CALLS_LOCAL (info, h))
{
if (h->plt.plist == NULL)
h->plt.plist = mips_elf_make_plt_record (abfd);
if (h->plt.plist == NULL)
return FALSE;
if (branch_reloc_p (r_type))
h->plt.plist->need_mips = TRUE;
else
h->plt.plist->need_comp = TRUE;
}
/* See if this reloc would need to refer to a MIPS16 hard-float stub,
if there is one. We only need to handle global symbols here;
we decide whether to keep or delete stubs for local symbols
when processing the stub's relocations. */
if (h != NULL
&& !mips16_call_reloc_p (r_type)
&& !section_allows_mips16_refs_p (sec))
{
struct mips_elf_link_hash_entry *mh;
mh = (struct mips_elf_link_hash_entry *) h;
mh->need_fn_stub = TRUE;
}
/* Refuse some position-dependent relocations when creating a
shared library. Do not refuse R_MIPS_32 / R_MIPS_64; they're
not PIC, but we can create dynamic relocations and the result
will be fine. Also do not refuse R_MIPS_LO16, which can be
combined with R_MIPS_GOT16. */
if (bfd_link_pic (info))
{
switch (r_type)
{
case R_MIPS_TLS_TPREL_HI16:
case R_MIPS16_TLS_TPREL_HI16:
case R_MICROMIPS_TLS_TPREL_HI16:
case R_MIPS_TLS_TPREL_LO16:
case R_MIPS16_TLS_TPREL_LO16:
case R_MICROMIPS_TLS_TPREL_LO16:
/* These are okay in PIE, but not in a shared library. */
if (bfd_link_executable (info))
break;
/* FALLTHROUGH */
case R_MIPS16_HI16:
case R_MIPS_HI16:
case R_MIPS_HIGHER:
case R_MIPS_HIGHEST:
case R_MICROMIPS_HI16:
case R_MICROMIPS_HIGHER:
case R_MICROMIPS_HIGHEST:
/* Don't refuse a high part relocation if it's against
no symbol (e.g. part of a compound relocation). */
if (r_symndx == STN_UNDEF)
break;
/* Likewise an absolute symbol. */
if (h != NULL && bfd_is_abs_symbol (&h->root))
break;
/* R_MIPS_HI16 against _gp_disp is used for $gp setup,
and has a special meaning. */
if (!NEWABI_P (abfd) && h != NULL
&& strcmp (h->root.root.string, "_gp_disp") == 0)
break;
/* Likewise __GOTT_BASE__ and __GOTT_INDEX__ on VxWorks. */
if (is_gott_symbol (info, h))
break;
/* FALLTHROUGH */
case R_MIPS16_26:
case R_MIPS_26:
case R_MICROMIPS_26_S1:
howto = MIPS_ELF_RTYPE_TO_HOWTO (abfd, r_type, NEWABI_P (abfd));
/* An error for unsupported relocations is raised as part
of the above search, so we can skip the following. */
if (howto != NULL)
info->callbacks->einfo
/* xgettext:c-format */
(_("%X%H: relocation %s against `%s' cannot be used"
" when making a shared object; recompile with -fPIC\n"),
abfd, sec, rel->r_offset, howto->name,
(h) ? h->root.root.string : "a local symbol");
break;
default:
break;
}
}
}
return TRUE;
}
/* Allocate space for global sym dynamic relocs. */
static bfd_boolean
allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
{
struct bfd_link_info *info = inf;
bfd *dynobj;
struct mips_elf_link_hash_entry *hmips;
struct mips_elf_link_hash_table *htab;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
dynobj = elf_hash_table (info)->dynobj;
hmips = (struct mips_elf_link_hash_entry *) h;
/* VxWorks executables are handled elsewhere; we only need to
allocate relocations in shared objects. */
if (htab->root.target_os == is_vxworks && !bfd_link_pic (info))
return TRUE;
/* Ignore indirect symbols. All relocations against such symbols
will be redirected to the target symbol. */
if (h->root.type == bfd_link_hash_indirect)
return TRUE;
/* If this symbol is defined in a dynamic object, or we are creating
a shared library, we will need to copy any R_MIPS_32 or
R_MIPS_REL32 relocs against it into the output file. */
if (! bfd_link_relocatable (info)
&& hmips->possibly_dynamic_relocs != 0
&& (h->root.type == bfd_link_hash_defweak
|| (!h->def_regular && !ELF_COMMON_DEF_P (h))
|| bfd_link_pic (info)))
{
bfd_boolean do_copy = TRUE;
if (h->root.type == bfd_link_hash_undefweak)
{
/* Do not copy relocations for undefined weak symbols that
we are not going to export. */
if (UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
do_copy = FALSE;
/* Make sure undefined weak symbols are output as a dynamic
symbol in PIEs. */
else if (h->dynindx == -1 && !h->forced_local)
{
if (! bfd_elf_link_record_dynamic_symbol (info, h))
return FALSE;
}
}
if (do_copy)
{
/* Even though we don't directly need a GOT entry for this symbol,
the SVR4 psABI requires it to have a dynamic symbol table
index greater that DT_MIPS_GOTSYM if there are dynamic
relocations against it.
VxWorks does not enforce the same mapping between the GOT
and the symbol table, so the same requirement does not
apply there. */
if (htab->root.target_os != is_vxworks)
{
if (hmips->global_got_area > GGA_RELOC_ONLY)
hmips->global_got_area = GGA_RELOC_ONLY;
hmips->got_only_for_calls = FALSE;
}
mips_elf_allocate_dynamic_relocations
(dynobj, info, hmips->possibly_dynamic_relocs);
if (hmips->readonly_reloc)
/* We tell the dynamic linker that there are relocations
against the text segment. */
info->flags |= DF_TEXTREL;
}
}
return TRUE;
}
/* Adjust a symbol defined by a dynamic object and referenced by a
regular object. The current definition is in some section of the
dynamic object, but we're not including those sections. We have to
change the definition to something the rest of the link can
understand. */
bfd_boolean
_bfd_mips_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
struct elf_link_hash_entry *h)
{
bfd *dynobj;
struct mips_elf_link_hash_entry *hmips;
struct mips_elf_link_hash_table *htab;
asection *s, *srel;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
dynobj = elf_hash_table (info)->dynobj;
hmips = (struct mips_elf_link_hash_entry *) h;
/* Make sure we know what is going on here. */
if (dynobj == NULL
|| (! h->needs_plt
&& ! h->is_weakalias
&& (! h->def_dynamic
|| ! h->ref_regular
|| h->def_regular)))
{
if (h->type == STT_GNU_IFUNC)
_bfd_error_handler (_("IFUNC symbol %s in dynamic symbol table - IFUNCS are not supported"),
h->root.root.string);
else
_bfd_error_handler (_("non-dynamic symbol %s in dynamic symbol table"),
h->root.root.string);
return TRUE;
}
hmips = (struct mips_elf_link_hash_entry *) h;
/* If there are call relocations against an externally-defined symbol,
see whether we can create a MIPS lazy-binding stub for it. We can
only do this if all references to the function are through call
relocations, and in that case, the traditional lazy-binding stubs
are much more efficient than PLT entries.
Traditional stubs are only available on SVR4 psABI-based systems;
VxWorks always uses PLTs instead. */
if (htab->root.target_os != is_vxworks
&& h->needs_plt
&& !hmips->no_fn_stub)
{
if (! elf_hash_table (info)->dynamic_sections_created)
return TRUE;
/* If this symbol is not defined in a regular file, then set
the symbol to the stub location. This is required to make
function pointers compare as equal between the normal
executable and the shared library. */
if (!h->def_regular
&& !bfd_is_abs_section (htab->sstubs->output_section))
{
hmips->needs_lazy_stub = TRUE;
htab->lazy_stub_count++;
return TRUE;
}
}
/* As above, VxWorks requires PLT entries for externally-defined
functions that are only accessed through call relocations.
Both VxWorks and non-VxWorks targets also need PLT entries if there
are static-only relocations against an externally-defined function.
This can technically occur for shared libraries if there are
branches to the symbol, although it is unlikely that this will be
used in practice due to the short ranges involved. It can occur
for any relative or absolute relocation in executables; in that
case, the PLT entry becomes the function's canonical address. */
else if (((h->needs_plt && !hmips->no_fn_stub)
|| (h->type == STT_FUNC && hmips->has_static_relocs))
&& htab->use_plts_and_copy_relocs
&& !SYMBOL_CALLS_LOCAL (info, h)
&& !(ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
&& h->root.type == bfd_link_hash_undefweak))
{
bfd_boolean micromips_p = MICROMIPS_P (info->output_bfd);
bfd_boolean newabi_p = NEWABI_P (info->output_bfd);
/* If this is the first symbol to need a PLT entry, then make some
basic setup. Also work out PLT entry sizes. We'll need them
for PLT offset calculations. */
if (htab->plt_mips_offset + htab->plt_comp_offset == 0)
{
BFD_ASSERT (htab->root.sgotplt->size == 0);
BFD_ASSERT (htab->plt_got_index == 0);
/* If we're using the PLT additions to the psABI, each PLT
entry is 16 bytes and the PLT0 entry is 32 bytes.
Encourage better cache usage by aligning. We do this
lazily to avoid pessimizing traditional objects. */
if (htab->root.target_os != is_vxworks
&& !bfd_set_section_alignment (htab->root.splt, 5))
return FALSE;
/* Make sure that .got.plt is word-aligned. We do this lazily
for the same reason as above. */
if (!bfd_set_section_alignment (htab->root.sgotplt,
MIPS_ELF_LOG_FILE_ALIGN (dynobj)))
return FALSE;
/* On non-VxWorks targets, the first two entries in .got.plt
are reserved. */
if (htab->root.target_os != is_vxworks)
htab->plt_got_index
+= (get_elf_backend_data (dynobj)->got_header_size
/ MIPS_ELF_GOT_SIZE (dynobj));
/* On VxWorks, also allocate room for the header's
.rela.plt.unloaded entries. */
if (htab->root.target_os == is_vxworks
&& !bfd_link_pic (info))
htab->srelplt2->size += 2 * sizeof (Elf32_External_Rela);
/* Now work out the sizes of individual PLT entries. */
if (htab->root.target_os == is_vxworks
&& bfd_link_pic (info))
htab->plt_mips_entry_size
= 4 * ARRAY_SIZE (mips_vxworks_shared_plt_entry);
else if (htab->root.target_os == is_vxworks)
htab->plt_mips_entry_size
= 4 * ARRAY_SIZE (mips_vxworks_exec_plt_entry);
else if (newabi_p)
htab->plt_mips_entry_size
= 4 * ARRAY_SIZE (mips_exec_plt_entry);
else if (!micromips_p)
{
htab->plt_mips_entry_size
= 4 * ARRAY_SIZE (mips_exec_plt_entry);
htab->plt_comp_entry_size
= 2 * ARRAY_SIZE (mips16_o32_exec_plt_entry);
}
else if (htab->insn32)
{
htab->plt_mips_entry_size
= 4 * ARRAY_SIZE (mips_exec_plt_entry);
htab->plt_comp_entry_size
= 2 * ARRAY_SIZE (micromips_insn32_o32_exec_plt_entry);
}
else
{
htab->plt_mips_entry_size
= 4 * ARRAY_SIZE (mips_exec_plt_entry);
htab->plt_comp_entry_size
= 2 * ARRAY_SIZE (micromips_o32_exec_plt_entry);
}
}
if (h->plt.plist == NULL)
h->plt.plist = mips_elf_make_plt_record (dynobj);
if (h->plt.plist == NULL)
return FALSE;
/* There are no defined MIPS16 or microMIPS PLT entries for VxWorks,
n32 or n64, so always use a standard entry there.
If the symbol has a MIPS16 call stub and gets a PLT entry, then
all MIPS16 calls will go via that stub, and there is no benefit
to having a MIPS16 entry. And in the case of call_stub a
standard entry actually has to be used as the stub ends with a J
instruction. */
if (newabi_p
|| htab->root.target_os == is_vxworks
|| hmips->call_stub
|| hmips->call_fp_stub)
{
h->plt.plist->need_mips = TRUE;
h->plt.plist->need_comp = FALSE;
}
/* Otherwise, if there are no direct calls to the function, we
have a free choice of whether to use standard or compressed
entries. Prefer microMIPS entries if the object is known to
contain microMIPS code, so that it becomes possible to create
pure microMIPS binaries. Prefer standard entries otherwise,
because MIPS16 ones are no smaller and are usually slower. */
if (!h->plt.plist->need_mips && !h->plt.plist->need_comp)
{
if (micromips_p)
h->plt.plist->need_comp = TRUE;
else
h->plt.plist->need_mips = TRUE;
}
if (h->plt.plist->need_mips)
{
h->plt.plist->mips_offset = htab->plt_mips_offset;
htab->plt_mips_offset += htab->plt_mips_entry_size;
}
if (h->plt.plist->need_comp)
{
h->plt.plist->comp_offset = htab->plt_comp_offset;
htab->plt_comp_offset += htab->plt_comp_entry_size;
}
/* Reserve the corresponding .got.plt entry now too. */
h->plt.plist->gotplt_index = htab->plt_got_index++;
/* If the output file has no definition of the symbol, set the
symbol's value to the address of the stub. */
if (!bfd_link_pic (info) && !h->def_regular)
hmips->use_plt_entry = TRUE;
/* Make room for the R_MIPS_JUMP_SLOT relocation. */
htab->root.srelplt->size += (htab->root.target_os == is_vxworks
? MIPS_ELF_RELA_SIZE (dynobj)
: MIPS_ELF_REL_SIZE (dynobj));
/* Make room for the .rela.plt.unloaded relocations. */
if (htab->root.target_os == is_vxworks && !bfd_link_pic (info))
htab->srelplt2->size += 3 * sizeof (Elf32_External_Rela);
/* All relocations against this symbol that could have been made
dynamic will now refer to the PLT entry instead. */
hmips->possibly_dynamic_relocs = 0;
return TRUE;
}
/* If this is a weak symbol, and there is a real definition, the
processor independent code will have arranged for us to see the
real definition first, and we can just use the same value. */
if (h->is_weakalias)
{
struct elf_link_hash_entry *def = weakdef (h);
BFD_ASSERT (def->root.type == bfd_link_hash_defined);
h->root.u.def.section = def->root.u.def.section;
h->root.u.def.value = def->root.u.def.value;
return TRUE;
}
/* Otherwise, there is nothing further to do for symbols defined
in regular objects. */
if (h->def_regular)
return TRUE;
/* There's also nothing more to do if we'll convert all relocations
against this symbol into dynamic relocations. */
if (!hmips->has_static_relocs)
return TRUE;
/* We're now relying on copy relocations. Complain if we have
some that we can't convert. */
if (!htab->use_plts_and_copy_relocs || bfd_link_pic (info))
{
_bfd_error_handler (_("non-dynamic relocations refer to "
"dynamic symbol %s"),
h->root.root.string);
bfd_set_error (bfd_error_bad_value);
return FALSE;
}
/* We must allocate the symbol in our .dynbss section, which will
become part of the .bss section of the executable. There will be
an entry for this symbol in the .dynsym section. The dynamic
object will contain position independent code, so all references
from the dynamic object to this symbol will go through the global
offset table. The dynamic linker will use the .dynsym entry to
determine the address it must put in the global offset table, so
both the dynamic object and the regular object will refer to the
same memory location for the variable. */
if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
{
s = htab->root.sdynrelro;
srel = htab->root.sreldynrelro;
}
else
{
s = htab->root.sdynbss;
srel = htab->root.srelbss;
}
if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
{
if (htab->root.target_os == is_vxworks)
srel->size += sizeof (Elf32_External_Rela);
else
mips_elf_allocate_dynamic_relocations (dynobj, info, 1);
h->needs_copy = 1;
}
/* All relocations against this symbol that could have been made
dynamic will now refer to the local copy instead. */
hmips->possibly_dynamic_relocs = 0;
return _bfd_elf_adjust_dynamic_copy (info, h, s);
}
/* This function is called after all the input files have been read,
and the input sections have been assigned to output sections. We
check for any mips16 stub sections that we can discard. */
bfd_boolean
_bfd_mips_elf_always_size_sections (bfd *output_bfd,
struct bfd_link_info *info)
{
asection *sect;
struct mips_elf_link_hash_table *htab;
struct mips_htab_traverse_info hti;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
/* The .reginfo section has a fixed size. */
sect = bfd_get_section_by_name (output_bfd, ".reginfo");
if (sect != NULL)
{
bfd_set_section_size (sect, sizeof (Elf32_External_RegInfo));
sect->flags |= SEC_FIXED_SIZE | SEC_HAS_CONTENTS;
}
/* The .MIPS.abiflags section has a fixed size. */
sect = bfd_get_section_by_name (output_bfd, ".MIPS.abiflags");
if (sect != NULL)
{
bfd_set_section_size (sect, sizeof (Elf_External_ABIFlags_v0));
sect->flags |= SEC_FIXED_SIZE | SEC_HAS_CONTENTS;
}
hti.info = info;
hti.output_bfd = output_bfd;
hti.error = FALSE;
mips_elf_link_hash_traverse (mips_elf_hash_table (info),
mips_elf_check_symbols, &hti);
if (hti.error)
return FALSE;
return TRUE;
}
/* If the link uses a GOT, lay it out and work out its size. */
static bfd_boolean
mips_elf_lay_out_got (bfd *output_bfd, struct bfd_link_info *info)
{
bfd *dynobj;
asection *s;
struct mips_got_info *g;
bfd_size_type loadable_size = 0;
bfd_size_type page_gotno;
bfd *ibfd;
struct mips_elf_traverse_got_arg tga;
struct mips_elf_link_hash_table *htab;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
s = htab->root.sgot;
if (s == NULL)
return TRUE;
dynobj = elf_hash_table (info)->dynobj;
g = htab->got_info;
/* Allocate room for the reserved entries. VxWorks always reserves
3 entries; other objects only reserve 2 entries. */
BFD_ASSERT (g->assigned_low_gotno == 0);
if (htab->root.target_os == is_vxworks)
htab->reserved_gotno = 3;
else
htab->reserved_gotno = 2;
g->local_gotno += htab->reserved_gotno;
g->assigned_low_gotno = htab->reserved_gotno;
/* Decide which symbols need to go in the global part of the GOT and
count the number of reloc-only GOT symbols. */
mips_elf_link_hash_traverse (htab, mips_elf_count_got_symbols, info);
if (!mips_elf_resolve_final_got_entries (info, g))
return FALSE;
/* Calculate the total loadable size of the output. That
will give us the maximum number of GOT_PAGE entries
required. */
for (ibfd = info->input_bfds; ibfd; ibfd = ibfd->link.next)
{
asection *subsection;
for (subsection = ibfd->sections;
subsection;
subsection = subsection->next)
{
if ((subsection->flags & SEC_ALLOC) == 0)
continue;
loadable_size += ((subsection->size + 0xf)
&~ (bfd_size_type) 0xf);
}
}
if (htab->root.target_os == is_vxworks)
/* There's no need to allocate page entries for VxWorks; R_MIPS*_GOT16
relocations against local symbols evaluate to "G", and the EABI does
not include R_MIPS_GOT_PAGE. */
page_gotno = 0;
else
/* Assume there are two loadable segments consisting of contiguous
sections. Is 5 enough? */
page_gotno = (loadable_size >> 16) + 5;
/* Choose the smaller of the two page estimates; both are intended to be
conservative. */
if (page_gotno > g->page_gotno)
page_gotno = g->page_gotno;
g->local_gotno += page_gotno;
g->assigned_high_gotno = g->local_gotno - 1;
s->size += g->local_gotno * MIPS_ELF_GOT_SIZE (output_bfd);
s->size += g->global_gotno * MIPS_ELF_GOT_SIZE (output_bfd);
s->size += g->tls_gotno * MIPS_ELF_GOT_SIZE (output_bfd);
/* VxWorks does not support multiple GOTs. It initializes $gp to
__GOTT_BASE__[__GOTT_INDEX__], the value of which is set by the
dynamic loader. */
if (htab->root.target_os != is_vxworks
&& s->size > MIPS_ELF_GOT_MAX_SIZE (info))
{
if (!mips_elf_multi_got (output_bfd, info, s, page_gotno))
return FALSE;
}
else
{
/* Record that all bfds use G. This also has the effect of freeing
the per-bfd GOTs, which we no longer need. */
for (ibfd = info->input_bfds; ibfd; ibfd = ibfd->link.next)
if (mips_elf_bfd_got (ibfd, FALSE))
mips_elf_replace_bfd_got (ibfd, g);
mips_elf_replace_bfd_got (output_bfd, g);
/* Set up TLS entries. */
g->tls_assigned_gotno = g->global_gotno + g->local_gotno;
tga.info = info;
tga.g = g;
tga.value = MIPS_ELF_GOT_SIZE (output_bfd);
htab_traverse (g->got_entries, mips_elf_initialize_tls_index, &tga);
if (!tga.g)
return FALSE;
BFD_ASSERT (g->tls_assigned_gotno
== g->global_gotno + g->local_gotno + g->tls_gotno);
/* Each VxWorks GOT entry needs an explicit relocation. */
if (htab->root.target_os == is_vxworks && bfd_link_pic (info))
g->relocs += g->global_gotno + g->local_gotno - htab->reserved_gotno;
/* Allocate room for the TLS relocations. */
if (g->relocs)
mips_elf_allocate_dynamic_relocations (dynobj, info, g->relocs);
}
return TRUE;
}
/* Estimate the size of the .MIPS.stubs section. */
static void
mips_elf_estimate_stub_size (bfd *output_bfd, struct bfd_link_info *info)
{
struct mips_elf_link_hash_table *htab;
bfd_size_type dynsymcount;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
if (htab->lazy_stub_count == 0)
return;
/* IRIX rld assumes that a function stub isn't at the end of the .text
section, so add a dummy entry to the end. */
htab->lazy_stub_count++;
/* Get a worst-case estimate of the number of dynamic symbols needed.
At this point, dynsymcount does not account for section symbols
and count_section_dynsyms may overestimate the number that will
be needed. */
dynsymcount = (elf_hash_table (info)->dynsymcount
+ count_section_dynsyms (output_bfd, info));
/* Determine the size of one stub entry. There's no disadvantage
from using microMIPS code here, so for the sake of pure-microMIPS
binaries we prefer it whenever there's any microMIPS code in
output produced at all. This has a benefit of stubs being
shorter by 4 bytes each too, unless in the insn32 mode. */
if (!MICROMIPS_P (output_bfd))
htab->function_stub_size = (dynsymcount > 0x10000
? MIPS_FUNCTION_STUB_BIG_SIZE
: MIPS_FUNCTION_STUB_NORMAL_SIZE);
else if (htab->insn32)
htab->function_stub_size = (dynsymcount > 0x10000
? MICROMIPS_INSN32_FUNCTION_STUB_BIG_SIZE
: MICROMIPS_INSN32_FUNCTION_STUB_NORMAL_SIZE);
else
htab->function_stub_size = (dynsymcount > 0x10000
? MICROMIPS_FUNCTION_STUB_BIG_SIZE
: MICROMIPS_FUNCTION_STUB_NORMAL_SIZE);
htab->sstubs->size = htab->lazy_stub_count * htab->function_stub_size;
}
/* A mips_elf_link_hash_traverse callback for which DATA points to a
mips_htab_traverse_info. If H needs a traditional MIPS lazy-binding
stub, allocate an entry in the stubs section. */
static bfd_boolean
mips_elf_allocate_lazy_stub (struct mips_elf_link_hash_entry *h, void *data)
{
struct mips_htab_traverse_info *hti = data;
struct mips_elf_link_hash_table *htab;
struct bfd_link_info *info;
bfd *output_bfd;
info = hti->info;
output_bfd = hti->output_bfd;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
if (h->needs_lazy_stub)
{
bfd_boolean micromips_p = MICROMIPS_P (output_bfd);
unsigned int other = micromips_p ? STO_MICROMIPS : 0;
bfd_vma isa_bit = micromips_p;
BFD_ASSERT (htab->root.dynobj != NULL);
if (h->root.plt.plist == NULL)
h->root.plt.plist = mips_elf_make_plt_record (htab->sstubs->owner);
if (h->root.plt.plist == NULL)
{
hti->error = TRUE;
return FALSE;
}
h->root.root.u.def.section = htab->sstubs;
h->root.root.u.def.value = htab->sstubs->size + isa_bit;
h->root.plt.plist->stub_offset = htab->sstubs->size;
h->root.other = other;
htab->sstubs->size += htab->function_stub_size;
}
return TRUE;
}
/* Allocate offsets in the stubs section to each symbol that needs one.
Set the final size of the .MIPS.stub section. */
static bfd_boolean
mips_elf_lay_out_lazy_stubs (struct bfd_link_info *info)
{
bfd *output_bfd = info->output_bfd;
bfd_boolean micromips_p = MICROMIPS_P (output_bfd);
unsigned int other = micromips_p ? STO_MICROMIPS : 0;
bfd_vma isa_bit = micromips_p;
struct mips_elf_link_hash_table *htab;
struct mips_htab_traverse_info hti;
struct elf_link_hash_entry *h;
bfd *dynobj;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
if (htab->lazy_stub_count == 0)
return TRUE;
htab->sstubs->size = 0;
hti.info = info;
hti.output_bfd = output_bfd;
hti.error = FALSE;
mips_elf_link_hash_traverse (htab, mips_elf_allocate_lazy_stub, &hti);
if (hti.error)
return FALSE;
htab->sstubs->size += htab->function_stub_size;
BFD_ASSERT (htab->sstubs->size
== htab->lazy_stub_count * htab->function_stub_size);
dynobj = elf_hash_table (info)->dynobj;
BFD_ASSERT (dynobj != NULL);
h = _bfd_elf_define_linkage_sym (dynobj, info, htab->sstubs, "_MIPS_STUBS_");
if (h == NULL)
return FALSE;
h->root.u.def.value = isa_bit;
h->other = other;
h->type = STT_FUNC;
return TRUE;
}
/* A mips_elf_link_hash_traverse callback for which DATA points to a
bfd_link_info. If H uses the address of a PLT entry as the value
of the symbol, then set the entry in the symbol table now. Prefer
a standard MIPS PLT entry. */
static bfd_boolean
mips_elf_set_plt_sym_value (struct mips_elf_link_hash_entry *h, void *data)
{
struct bfd_link_info *info = data;
bfd_boolean micromips_p = MICROMIPS_P (info->output_bfd);
struct mips_elf_link_hash_table *htab;
unsigned int other;
bfd_vma isa_bit;
bfd_vma val;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
if (h->use_plt_entry)
{
BFD_ASSERT (h->root.plt.plist != NULL);
BFD_ASSERT (h->root.plt.plist->mips_offset != MINUS_ONE
|| h->root.plt.plist->comp_offset != MINUS_ONE);
val = htab->plt_header_size;
if (h->root.plt.plist->mips_offset != MINUS_ONE)
{
isa_bit = 0;
val += h->root.plt.plist->mips_offset;
other = 0;
}
else
{
isa_bit = 1;
val += htab->plt_mips_offset + h->root.plt.plist->comp_offset;
other = micromips_p ? STO_MICROMIPS : STO_MIPS16;
}
val += isa_bit;
/* For VxWorks, point at the PLT load stub rather than the lazy
resolution stub; this stub will become the canonical function
address. */
if (htab->root.target_os == is_vxworks)
val += 8;
h->root.root.u.def.section = htab->root.splt;
h->root.root.u.def.value = val;
h->root.other = other;
}
return TRUE;
}
/* Set the sizes of the dynamic sections. */
bfd_boolean
_bfd_mips_elf_size_dynamic_sections (bfd *output_bfd,
struct bfd_link_info *info)
{
bfd *dynobj;
asection *s, *sreldyn;
bfd_boolean reltext;
struct mips_elf_link_hash_table *htab;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
dynobj = elf_hash_table (info)->dynobj;
BFD_ASSERT (dynobj != NULL);
if (elf_hash_table (info)->dynamic_sections_created)
{
/* Set the contents of the .interp section to the interpreter. */
if (bfd_link_executable (info) && !info->nointerp)
{
s = bfd_get_linker_section (dynobj, ".interp");
BFD_ASSERT (s != NULL);
s->size
= strlen (ELF_DYNAMIC_INTERPRETER (output_bfd)) + 1;
s->contents
= (bfd_byte *) ELF_DYNAMIC_INTERPRETER (output_bfd);
}
/* Figure out the size of the PLT header if we know that we
are using it. For the sake of cache alignment always use
a standard header whenever any standard entries are present
even if microMIPS entries are present as well. This also
lets the microMIPS header rely on the value of $v0 only set
by microMIPS entries, for a small size reduction.
Set symbol table entry values for symbols that use the
address of their PLT entry now that we can calculate it.
Also create the _PROCEDURE_LINKAGE_TABLE_ symbol if we
haven't already in _bfd_elf_create_dynamic_sections. */
if (htab->root.splt && htab->plt_mips_offset + htab->plt_comp_offset != 0)
{
bfd_boolean micromips_p = (MICROMIPS_P (output_bfd)
&& !htab->plt_mips_offset);
unsigned int other = micromips_p ? STO_MICROMIPS : 0;
bfd_vma isa_bit = micromips_p;
struct elf_link_hash_entry *h;
bfd_vma size;
BFD_ASSERT (htab->use_plts_and_copy_relocs);
BFD_ASSERT (htab->root.sgotplt->size == 0);
BFD_ASSERT (htab->root.splt->size == 0);
if (htab->root.target_os == is_vxworks && bfd_link_pic (info))
size = 4 * ARRAY_SIZE (mips_vxworks_shared_plt0_entry);
else if (htab->root.target_os == is_vxworks)
size = 4 * ARRAY_SIZE (mips_vxworks_exec_plt0_entry);
else if (ABI_64_P (output_bfd))
size = 4 * ARRAY_SIZE (mips_n64_exec_plt0_entry);
else if (ABI_N32_P (output_bfd))
size = 4 * ARRAY_SIZE (mips_n32_exec_plt0_entry);
else if (!micromips_p)
size = 4 * ARRAY_SIZE (mips_o32_exec_plt0_entry);
else if (htab->insn32)
size = 2 * ARRAY_SIZE (micromips_insn32_o32_exec_plt0_entry);
else
size = 2 * ARRAY_SIZE (micromips_o32_exec_plt0_entry);
htab->plt_header_is_comp = micromips_p;
htab->plt_header_size = size;
htab->root.splt->size = (size
+ htab->plt_mips_offset
+ htab->plt_comp_offset);
htab->root.sgotplt->size = (htab->plt_got_index
* MIPS_ELF_GOT_SIZE (dynobj));
mips_elf_link_hash_traverse (htab, mips_elf_set_plt_sym_value, info);
if (htab->root.hplt == NULL)
{
h = _bfd_elf_define_linkage_sym (dynobj, info, htab->root.splt,
"_PROCEDURE_LINKAGE_TABLE_");
htab->root.hplt = h;
if (h == NULL)
return FALSE;
}
h = htab->root.hplt;
h->root.u.def.value = isa_bit;
h->other = other;
h->type = STT_FUNC;
}
}
/* Allocate space for global sym dynamic relocs. */
elf_link_hash_traverse (&htab->root, allocate_dynrelocs, info);
mips_elf_estimate_stub_size (output_bfd, info);
if (!mips_elf_lay_out_got (output_bfd, info))
return FALSE;
mips_elf_lay_out_lazy_stubs (info);
/* The check_relocs and adjust_dynamic_symbol entry points have
determined the sizes of the various dynamic sections. Allocate
memory for them. */
reltext = FALSE;
for (s = dynobj->sections; s != NULL; s = s->next)
{
const char *name;
/* It's OK to base decisions on the section name, because none
of the dynobj section names depend upon the input files. */
name = bfd_section_name (s);
if ((s->flags & SEC_LINKER_CREATED) == 0)
continue;
if (startswith (name, ".rel"))
{
if (s->size != 0)
{
const char *outname;
asection *target;
/* If this relocation section applies to a read only
section, then we probably need a DT_TEXTREL entry.
If the relocation section is .rel(a).dyn, we always
assert a DT_TEXTREL entry rather than testing whether
there exists a relocation to a read only section or
not. */
outname = bfd_section_name (s->output_section);
target = bfd_get_section_by_name (output_bfd, outname + 4);
if ((target != NULL
&& (target->flags & SEC_READONLY) != 0
&& (target->flags & SEC_ALLOC) != 0)
|| strcmp (outname, MIPS_ELF_REL_DYN_NAME (info)) == 0)
reltext = TRUE;
/* We use the reloc_count field as a counter if we need
to copy relocs into the output file. */
if (strcmp (name, MIPS_ELF_REL_DYN_NAME (info)) != 0)
s->reloc_count = 0;
/* If combreloc is enabled, elf_link_sort_relocs() will
sort relocations, but in a different way than we do,
and before we're done creating relocations. Also, it
will move them around between input sections'
relocation's contents, so our sorting would be
broken, so don't let it run. */
info->combreloc = 0;
}
}
else if (bfd_link_executable (info)
&& ! mips_elf_hash_table (info)->use_rld_obj_head
&& startswith (name, ".rld_map"))
{
/* We add a room for __rld_map. It will be filled in by the
rtld to contain a pointer to the _r_debug structure. */
s->size += MIPS_ELF_RLD_MAP_SIZE (output_bfd);
}
else if (SGI_COMPAT (output_bfd)
&& startswith (name, ".compact_rel"))
s->size += mips_elf_hash_table (info)->compact_rel_size;
else if (s == htab->root.splt)
{
/* If the last PLT entry has a branch delay slot, allocate
room for an extra nop to fill the delay slot. This is
for CPUs without load interlocking. */
if (! LOAD_INTERLOCKS_P (output_bfd)
&& htab->root.target_os != is_vxworks
&& s->size > 0)
s->size += 4;
}
else if (! startswith (name, ".init")
&& s != htab->root.sgot
&& s != htab->root.sgotplt
&& s != htab->sstubs
&& s != htab->root.sdynbss
&& s != htab->root.sdynrelro)
{
/* It's not one of our sections, so don't allocate space. */
continue;
}
if (s->size == 0)
{
s->flags |= SEC_EXCLUDE;
continue;
}
if ((s->flags & SEC_HAS_CONTENTS) == 0)
continue;
/* Allocate memory for the section contents. */
s->contents = bfd_zalloc (dynobj, s->size);
if (s->contents == NULL)
{
bfd_set_error (bfd_error_no_memory);
return FALSE;
}
}
if (elf_hash_table (info)->dynamic_sections_created)
{
/* Add some entries to the .dynamic section. We fill in the
values later, in _bfd_mips_elf_finish_dynamic_sections, but we
must add the entries now so that we get the correct size for
the .dynamic section. */
/* SGI object has the equivalence of DT_DEBUG in the
DT_MIPS_RLD_MAP entry. This must come first because glibc
only fills in DT_MIPS_RLD_MAP (not DT_DEBUG) and some tools
may only look at the first one they see. */
if (!bfd_link_pic (info)
&& !MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_RLD_MAP, 0))
return FALSE;
if (bfd_link_executable (info)
&& !MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_RLD_MAP_REL, 0))
return FALSE;
/* The DT_DEBUG entry may be filled in by the dynamic linker and
used by the debugger. */
if (bfd_link_executable (info)
&& !SGI_COMPAT (output_bfd)
&& !MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_DEBUG, 0))
return FALSE;
if (reltext
&& (SGI_COMPAT (output_bfd)
|| htab->root.target_os == is_vxworks))
info->flags |= DF_TEXTREL;
if ((info->flags & DF_TEXTREL) != 0)
{
if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_TEXTREL, 0))
return FALSE;
/* Clear the DF_TEXTREL flag. It will be set again if we
write out an actual text relocation; we may not, because
at this point we do not know whether e.g. any .eh_frame
absolute relocations have been converted to PC-relative. */
info->flags &= ~DF_TEXTREL;
}
if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_PLTGOT, 0))
return FALSE;
sreldyn = mips_elf_rel_dyn_section (info, FALSE);
if (htab->root.target_os == is_vxworks)
{
/* VxWorks uses .rela.dyn instead of .rel.dyn. It does not
use any of the DT_MIPS_* tags. */
if (sreldyn && sreldyn->size > 0)
{
if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_RELA, 0))
return FALSE;
if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_RELASZ, 0))
return FALSE;
if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_RELAENT, 0))
return FALSE;
}
}
else
{
if (sreldyn && sreldyn->size > 0
&& !bfd_is_abs_section (sreldyn->output_section))
{
if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_REL, 0))
return FALSE;
if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_RELSZ, 0))
return FALSE;
if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_RELENT, 0))
return FALSE;
}
if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_RLD_VERSION, 0))
return FALSE;
if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_FLAGS, 0))
return FALSE;
if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_BASE_ADDRESS, 0))
return FALSE;
if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_LOCAL_GOTNO, 0))
return FALSE;
if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_SYMTABNO, 0))
return FALSE;
if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_UNREFEXTNO, 0))
return FALSE;
if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_GOTSYM, 0))
return FALSE;
if (info->emit_gnu_hash
&& ! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_XHASH, 0))
return FALSE;
if (IRIX_COMPAT (dynobj) == ict_irix5
&& ! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_HIPAGENO, 0))
return FALSE;
if (IRIX_COMPAT (dynobj) == ict_irix6
&& (bfd_get_section_by_name
(output_bfd, MIPS_ELF_OPTIONS_SECTION_NAME (dynobj)))
&& !MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_OPTIONS, 0))
return FALSE;
}
if (htab->root.splt->size > 0)
{
if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_PLTREL, 0))
return FALSE;
if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_JMPREL, 0))
return FALSE;
if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_PLTRELSZ, 0))
return FALSE;
if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_PLTGOT, 0))
return FALSE;
}
if (htab->root.target_os == is_vxworks
&& !elf_vxworks_add_dynamic_entries (output_bfd, info))
return FALSE;
}
return TRUE;
}
/* REL is a relocation in INPUT_BFD that is being copied to OUTPUT_BFD.
Adjust its R_ADDEND field so that it is correct for the output file.
LOCAL_SYMS and LOCAL_SECTIONS are arrays of INPUT_BFD's local symbols
and sections respectively; both use symbol indexes. */
static void
mips_elf_adjust_addend (bfd *output_bfd, struct bfd_link_info *info,
bfd *input_bfd, Elf_Internal_Sym *local_syms,
asection **local_sections, Elf_Internal_Rela *rel)
{
unsigned int r_type, r_symndx;
Elf_Internal_Sym *sym;
asection *sec;
if (mips_elf_local_relocation_p (input_bfd, rel, local_sections))
{
r_type = ELF_R_TYPE (output_bfd, rel->r_info);
if (gprel16_reloc_p (r_type)
|| r_type == R_MIPS_GPREL32
|| literal_reloc_p (r_type))
{
rel->r_addend += _bfd_get_gp_value (input_bfd);
rel->r_addend -= _bfd_get_gp_value (output_bfd);
}
r_symndx = ELF_R_SYM (output_bfd, rel->r_info);
sym = local_syms + r_symndx;
/* Adjust REL's addend to account for section merging. */
if (!bfd_link_relocatable (info))
{
sec = local_sections[r_symndx];
_bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
}
/* This would normally be done by the rela_normal code in elflink.c. */
if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
rel->r_addend += local_sections[r_symndx]->output_offset;
}
}
/* Handle relocations against symbols from removed linkonce sections,
or sections discarded by a linker script. We use this wrapper around
RELOC_AGAINST_DISCARDED_SECTION to handle triplets of compound relocs
on 64-bit ELF targets. In this case for any relocation handled, which
always be the first in a triplet, the remaining two have to be processed
together with the first, even if they are R_MIPS_NONE. It is the symbol
index referred by the first reloc that applies to all the three and the
remaining two never refer to an object symbol. And it is the final
relocation (the last non-null one) that determines the output field of
the whole relocation so retrieve the corresponding howto structure for
the relocatable field to be cleared by RELOC_AGAINST_DISCARDED_SECTION.
Note that RELOC_AGAINST_DISCARDED_SECTION is a macro that uses "continue"
and therefore requires to be pasted in a loop. It also defines a block
and does not protect any of its arguments, hence the extra brackets. */
static void
mips_reloc_against_discarded_section (bfd *output_bfd,
struct bfd_link_info *info,
bfd *input_bfd, asection *input_section,
Elf_Internal_Rela **rel,
const Elf_Internal_Rela **relend,
bfd_boolean rel_reloc,
reloc_howto_type *howto,
bfd_byte *contents)
{
const struct elf_backend_data *bed = get_elf_backend_data (output_bfd);
int count = bed->s->int_rels_per_ext_rel;
unsigned int r_type;
int i;
for (i = count - 1; i > 0; i--)
{
r_type = ELF_R_TYPE (output_bfd, (*rel)[i].r_info);
if (r_type != R_MIPS_NONE)
{
howto = MIPS_ELF_RTYPE_TO_HOWTO (input_bfd, r_type, !rel_reloc);
break;
}
}
do
{
RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
(*rel), count, (*relend),
howto, i, contents);
}
while (0);
}
/* Relocate a MIPS ELF section. */
int
_bfd_mips_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info,
bfd *input_bfd, asection *input_section,
bfd_byte *contents, Elf_Internal_Rela *relocs,
Elf_Internal_Sym *local_syms,
asection **local_sections)
{
Elf_Internal_Rela *rel;
const Elf_Internal_Rela *relend;
bfd_vma addend = 0;
bfd_boolean use_saved_addend_p = FALSE;
relend = relocs + input_section->reloc_count;
for (rel = relocs; rel < relend; ++rel)
{
const char *name;
bfd_vma value = 0;
reloc_howto_type *howto;
bfd_boolean cross_mode_jump_p = FALSE;
/* TRUE if the relocation is a RELA relocation, rather than a
REL relocation. */
bfd_boolean rela_relocation_p = TRUE;
unsigned int r_type = ELF_R_TYPE (output_bfd, rel->r_info);
const char *msg;
unsigned long r_symndx;
asection *sec;
Elf_Internal_Shdr *symtab_hdr;
struct elf_link_hash_entry *h;
bfd_boolean rel_reloc;
rel_reloc = (NEWABI_P (input_bfd)
&& mips_elf_rel_relocation_p (input_bfd, input_section,
relocs, rel));
/* Find the relocation howto for this relocation. */
howto = MIPS_ELF_RTYPE_TO_HOWTO (input_bfd, r_type, !rel_reloc);
r_symndx = ELF_R_SYM (input_bfd, rel->r_info);
symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
if (mips_elf_local_relocation_p (input_bfd, rel, local_sections))
{
sec = local_sections[r_symndx];
h = NULL;
}
else
{
unsigned long extsymoff;
extsymoff = 0;
if (!elf_bad_symtab (input_bfd))
extsymoff = symtab_hdr->sh_info;
h = elf_sym_hashes (input_bfd) [r_symndx - extsymoff];
while (h->root.type == bfd_link_hash_indirect
|| h->root.type == bfd_link_hash_warning)
h = (struct elf_link_hash_entry *) h->root.u.i.link;
sec = NULL;
if (h->root.type == bfd_link_hash_defined
|| h->root.type == bfd_link_hash_defweak)
sec = h->root.u.def.section;
}
if (sec != NULL && discarded_section (sec))
{
mips_reloc_against_discarded_section (output_bfd, info, input_bfd,
input_section, &rel, &relend,
rel_reloc, howto, contents);
continue;
}
if (r_type == R_MIPS_64 && ! NEWABI_P (input_bfd))
{
/* Some 32-bit code uses R_MIPS_64. In particular, people use
64-bit code, but make sure all their addresses are in the
lowermost or uppermost 32-bit section of the 64-bit address
space. Thus, when they use an R_MIPS_64 they mean what is
usually meant by R_MIPS_32, with the exception that the
stored value is sign-extended to 64 bits. */
howto = MIPS_ELF_RTYPE_TO_HOWTO (input_bfd, R_MIPS_32, FALSE);
/* On big-endian systems, we need to lie about the position
of the reloc. */
if (bfd_big_endian (input_bfd))
rel->r_offset += 4;
}
if (!use_saved_addend_p)
{
/* If these relocations were originally of the REL variety,
we must pull the addend out of the field that will be
relocated. Otherwise, we simply use the contents of the
RELA relocation. */
if (mips_elf_rel_relocation_p (input_bfd, input_section,
relocs, rel))
{
rela_relocation_p = FALSE;
addend = mips_elf_read_rel_addend (input_bfd, rel,
howto, contents);
if (hi16_reloc_p (r_type)
|| (got16_reloc_p (r_type)
&& mips_elf_local_relocation_p (input_bfd, rel,
local_sections)))
{
if (!mips_elf_add_lo16_rel_addend (input_bfd, rel, relend,
contents, &addend))
{
if (h)
name = h->root.root.string;
else
name = bfd_elf_sym_name (input_bfd, symtab_hdr,
local_syms + r_symndx,
sec);
_bfd_error_handler
/* xgettext:c-format */
(_("%pB: can't find matching LO16 reloc against `%s'"
" for %s at %#" PRIx64 " in section `%pA'"),
input_bfd, name,
howto->name, (uint64_t) rel->r_offset, input_section);
}
}
else
addend <<= howto->rightshift;
}
else
addend = rel->r_addend;
mips_elf_adjust_addend (output_bfd, info, input_bfd,
local_syms, local_sections, rel);
}
if (bfd_link_relocatable (info))
{
if (r_type == R_MIPS_64 && ! NEWABI_P (output_bfd)
&& bfd_big_endian (input_bfd))
rel->r_offset -= 4;
if (!rela_relocation_p && rel->r_addend)
{
addend += rel->r_addend;
if (hi16_reloc_p (r_type) || got16_reloc_p (r_type))
addend = mips_elf_high (addend);
else if (r_type == R_MIPS_HIGHER)
addend = mips_elf_higher (addend);
else if (r_type == R_MIPS_HIGHEST)
addend = mips_elf_highest (addend);
else
addend >>= howto->rightshift;
/* We use the source mask, rather than the destination
mask because the place to which we are writing will be
source of the addend in the final link. */
addend &= howto->src_mask;
if (r_type == R_MIPS_64 && ! NEWABI_P (output_bfd))
/* See the comment above about using R_MIPS_64 in the 32-bit
ABI. Here, we need to update the addend. It would be
possible to get away with just using the R_MIPS_32 reloc
but for endianness. */
{
bfd_vma sign_bits;
bfd_vma low_bits;
bfd_vma high_bits;
if (addend & ((bfd_vma) 1 << 31))
#ifdef BFD64
sign_bits = ((bfd_vma) 1 << 32) - 1;
#else
sign_bits = -1;
#endif
else
sign_bits = 0;
/* If we don't know that we have a 64-bit type,
do two separate stores. */
if (bfd_big_endian (input_bfd))
{
/* Store the sign-bits (which are most significant)
first. */
low_bits = sign_bits;
high_bits = addend;
}
else
{
low_bits = addend;
high_bits = sign_bits;
}
bfd_put_32 (input_bfd, low_bits,
contents + rel->r_offset);
bfd_put_32 (input_bfd, high_bits,
contents + rel->r_offset + 4);
continue;
}
if (! mips_elf_perform_relocation (info, howto, rel, addend,
input_bfd, input_section,
contents, FALSE))
return FALSE;
}
/* Go on to the next relocation. */
continue;
}
/* In the N32 and 64-bit ABIs there may be multiple consecutive
relocations for the same offset. In that case we are
supposed to treat the output of each relocation as the addend
for the next. */
if (rel + 1 < relend
&& rel->r_offset == rel[1].r_offset
&& ELF_R_TYPE (input_bfd, rel[1].r_info) != R_MIPS_NONE)
use_saved_addend_p = TRUE;
else
use_saved_addend_p = FALSE;
/* Figure out what value we are supposed to relocate. */
switch (mips_elf_calculate_relocation (output_bfd, input_bfd,
input_section, contents,
info, rel, addend, howto,
local_syms, local_sections,
&value, &name, &cross_mode_jump_p,
use_saved_addend_p))
{
case bfd_reloc_continue:
/* There's nothing to do. */
continue;
case bfd_reloc_undefined:
/* mips_elf_calculate_relocation already called the
undefined_symbol callback. There's no real point in
trying to perform the relocation at this point, so we
just skip ahead to the next relocation. */
continue;
case bfd_reloc_notsupported:
msg = _("internal error: unsupported relocation error");
info->callbacks->warning
(info, msg, name, input_bfd, input_section, rel->r_offset);
return FALSE;
case bfd_reloc_overflow:
if (use_saved_addend_p)
/* Ignore overflow until we reach the last relocation for
a given location. */
;
else
{
struct mips_elf_link_hash_table *htab;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
BFD_ASSERT (name != NULL);
if (!htab->small_data_overflow_reported
&& (gprel16_reloc_p (howto->type)
|| literal_reloc_p (howto->type)))
{
msg = _("small-data section exceeds 64KB;"
" lower small-data size limit (see option -G)");
htab->small_data_overflow_reported = TRUE;
(*info->callbacks->einfo) ("%P: %s\n", msg);
}
(*info->callbacks->reloc_overflow)
(info, NULL, name, howto->name, (bfd_vma) 0,
input_bfd, input_section, rel->r_offset);
}
break;
case bfd_reloc_ok:
break;
case bfd_reloc_outofrange:
msg = NULL;
if (jal_reloc_p (howto->type))
msg = (cross_mode_jump_p
? _("cannot convert a jump to JALX "
"for a non-word-aligned address")
: (howto->type == R_MIPS16_26
? _("jump to a non-word-aligned address")
: _("jump to a non-instruction-aligned address")));
else if (b_reloc_p (howto->type))
msg = (cross_mode_jump_p
? _("cannot convert a branch to JALX "
"for a non-word-aligned address")
: _("branch to a non-instruction-aligned address"));
else if (aligned_pcrel_reloc_p (howto->type))
msg = _("PC-relative load from unaligned address");
if (msg)
{
info->callbacks->einfo
("%X%H: %s\n", input_bfd, input_section, rel->r_offset, msg);
break;
}
/* Fall through. */
default:
abort ();
break;
}
/* If we've got another relocation for the address, keep going
until we reach the last one. */
if (use_saved_addend_p)
{
addend = value;
continue;
}
if (r_type == R_MIPS_64 && ! NEWABI_P (output_bfd))
/* See the comment above about using R_MIPS_64 in the 32-bit
ABI. Until now, we've been using the HOWTO for R_MIPS_32;
that calculated the right value. Now, however, we
sign-extend the 32-bit result to 64-bits, and store it as a
64-bit value. We are especially generous here in that we
go to extreme lengths to support this usage on systems with
only a 32-bit VMA. */
{
bfd_vma sign_bits;
bfd_vma low_bits;
bfd_vma high_bits;
if (value & ((bfd_vma) 1 << 31))
#ifdef BFD64
sign_bits = ((bfd_vma) 1 << 32) - 1;
#else
sign_bits = -1;
#endif
else
sign_bits = 0;
/* If we don't know that we have a 64-bit type,
do two separate stores. */
if (bfd_big_endian (input_bfd))
{
/* Undo what we did above. */
rel->r_offset -= 4;
/* Store the sign-bits (which are most significant)
first. */
low_bits = sign_bits;
high_bits = value;
}
else
{
low_bits = value;
high_bits = sign_bits;
}
bfd_put_32 (input_bfd, low_bits,
contents + rel->r_offset);
bfd_put_32 (input_bfd, high_bits,
contents + rel->r_offset + 4);
continue;
}
/* Actually perform the relocation. */
if (! mips_elf_perform_relocation (info, howto, rel, value,
input_bfd, input_section,
contents, cross_mode_jump_p))
return FALSE;
}
return TRUE;
}
/* A function that iterates over each entry in la25_stubs and fills
in the code for each one. DATA points to a mips_htab_traverse_info. */
static int
mips_elf_create_la25_stub (void **slot, void *data)
{
struct mips_htab_traverse_info *hti;
struct mips_elf_link_hash_table *htab;
struct mips_elf_la25_stub *stub;
asection *s;
bfd_byte *loc;
bfd_vma offset, target, target_high, target_low;
bfd_vma branch_pc;
bfd_signed_vma pcrel_offset = 0;
stub = (struct mips_elf_la25_stub *) *slot;
hti = (struct mips_htab_traverse_info *) data;
htab = mips_elf_hash_table (hti->info);
BFD_ASSERT (htab != NULL);
/* Create the section contents, if we haven't already. */
s = stub->stub_section;
loc = s->contents;
if (loc == NULL)
{
loc = bfd_malloc (s->size);
if (loc == NULL)
{
hti->error = TRUE;
return FALSE;
}
s->contents = loc;
}
/* Work out where in the section this stub should go. */
offset = stub->offset;
/* We add 8 here to account for the LUI/ADDIU instructions
before the branch instruction. This cannot be moved down to
where pcrel_offset is calculated as 's' is updated in
mips_elf_get_la25_target. */
branch_pc = s->output_section->vma + s->output_offset + offset + 8;
/* Work out the target address. */
target = mips_elf_get_la25_target (stub, &s);
target += s->output_section->vma + s->output_offset;
target_high = ((target + 0x8000) >> 16) & 0xffff;
target_low = (target & 0xffff);
/* Calculate the PC of the compact branch instruction (for the case where
compact branches are used for either microMIPSR6 or MIPSR6 with
compact branches. Add 4-bytes to account for BC using the PC of the
next instruction as the base. */
pcrel_offset = target - (branch_pc + 4);
if (stub->stub_section != htab->strampoline)
{
/* This is a simple LUI/ADDIU stub. Zero out the beginning
of the section and write the two instructions at the end. */
memset (loc, 0, offset);
loc += offset;
if (ELF_ST_IS_MICROMIPS (stub->h->root.other))
{
bfd_put_micromips_32 (hti->output_bfd,
LA25_LUI_MICROMIPS (target_high),
loc);
bfd_put_micromips_32 (hti->output_bfd,
LA25_ADDIU_MICROMIPS (target_low),
loc + 4);
}
else
{
bfd_put_32 (hti->output_bfd, LA25_LUI (target_high), loc);
bfd_put_32 (hti->output_bfd, LA25_ADDIU (target_low), loc + 4);
}
}
else
{
/* This is trampoline. */
loc += offset;
if (ELF_ST_IS_MICROMIPS (stub->h->root.other))
{
bfd_put_micromips_32 (hti->output_bfd,
LA25_LUI_MICROMIPS (target_high), loc);
bfd_put_micromips_32 (hti->output_bfd,
LA25_J_MICROMIPS (target), loc + 4);
bfd_put_micromips_32 (hti->output_bfd,
LA25_ADDIU_MICROMIPS (target_low), loc + 8);
bfd_put_32 (hti->output_bfd, 0, loc + 12);
}
else
{
bfd_put_32 (hti->output_bfd, LA25_LUI (target_high), loc);
if (MIPSR6_P (hti->output_bfd) && htab->compact_branches)
{
bfd_put_32 (hti->output_bfd, LA25_ADDIU (target_low), loc + 4);
bfd_put_32 (hti->output_bfd, LA25_BC (pcrel_offset), loc + 8);
}
else
{
bfd_put_32 (hti->output_bfd, LA25_J (target), loc + 4);
bfd_put_32 (hti->output_bfd, LA25_ADDIU (target_low), loc + 8);
}
bfd_put_32 (hti->output_bfd, 0, loc + 12);
}
}
return TRUE;
}
/* If NAME is one of the special IRIX6 symbols defined by the linker,
adjust it appropriately now. */
static void
mips_elf_irix6_finish_dynamic_symbol (bfd *abfd ATTRIBUTE_UNUSED,
const char *name, Elf_Internal_Sym *sym)
{
/* The linker script takes care of providing names and values for
these, but we must place them into the right sections. */
static const char* const text_section_symbols[] = {
"_ftext",
"_etext",
"__dso_displacement",
"__elf_header",
"__program_header_table",
NULL
};
static const char* const data_section_symbols[] = {
"_fdata",
"_edata",
"_end",
"_fbss",
NULL
};
const char* const *p;
int i;
for (i = 0; i < 2; ++i)
for (p = (i == 0) ? text_section_symbols : data_section_symbols;
*p;
++p)
if (strcmp (*p, name) == 0)
{
/* All of these symbols are given type STT_SECTION by the
IRIX6 linker. */
sym->st_info = ELF_ST_INFO (STB_GLOBAL, STT_SECTION);
sym->st_other = STO_PROTECTED;
/* The IRIX linker puts these symbols in special sections. */
if (i == 0)
sym->st_shndx = SHN_MIPS_TEXT;
else
sym->st_shndx = SHN_MIPS_DATA;
break;
}
}
/* Finish up dynamic symbol handling. We set the contents of various
dynamic sections here. */
bfd_boolean
_bfd_mips_elf_finish_dynamic_symbol (bfd *output_bfd,
struct bfd_link_info *info,
struct elf_link_hash_entry *h,
Elf_Internal_Sym *sym)
{
bfd *dynobj;
asection *sgot;
struct mips_got_info *g, *gg;
const char *name;
int idx;
struct mips_elf_link_hash_table *htab;
struct mips_elf_link_hash_entry *hmips;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
dynobj = elf_hash_table (info)->dynobj;
hmips = (struct mips_elf_link_hash_entry *) h;
BFD_ASSERT (htab->root.target_os != is_vxworks);
if (h->plt.plist != NULL
&& (h->plt.plist->mips_offset != MINUS_ONE
|| h->plt.plist->comp_offset != MINUS_ONE))
{
/* We've decided to create a PLT entry for this symbol. */
bfd_byte *loc;
bfd_vma header_address, got_address;
bfd_vma got_address_high, got_address_low, load;
bfd_vma got_index;
bfd_vma isa_bit;
got_index = h->plt.plist->gotplt_index;
BFD_ASSERT (htab->use_plts_and_copy_relocs);
BFD_ASSERT (h->dynindx != -1);
BFD_ASSERT (htab->root.splt != NULL);
BFD_ASSERT (got_index != MINUS_ONE);
BFD_ASSERT (!h->def_regular);
/* Calculate the address of the PLT header. */
isa_bit = htab->plt_header_is_comp;
header_address = (htab->root.splt->output_section->vma
+ htab->root.splt->output_offset + isa_bit);
/* Calculate the address of the .got.plt entry. */
got_address = (htab->root.sgotplt->output_section->vma
+ htab->root.sgotplt->output_offset
+ got_index * MIPS_ELF_GOT_SIZE (dynobj));
got_address_high = ((got_address + 0x8000) >> 16) & 0xffff;
got_address_low = got_address & 0xffff;
/* The PLT sequence is not safe for N64 if .got.plt entry's address
cannot be loaded in two instructions. */
if (ABI_64_P (output_bfd)
&& ((got_address + 0x80008000) & ~(bfd_vma) 0xffffffff) != 0)
{
_bfd_error_handler
/* xgettext:c-format */
(_("%pB: `%pA' entry VMA of %#" PRIx64 " outside the 32-bit range "
"supported; consider using `-Ttext-segment=...'"),
output_bfd,
htab->root.sgotplt->output_section,
(int64_t) got_address);
bfd_set_error (bfd_error_no_error);
return FALSE;
}
/* Initially point the .got.plt entry at the PLT header. */
loc = (htab->root.sgotplt->contents
+ got_index * MIPS_ELF_GOT_SIZE (dynobj));
if (ABI_64_P (output_bfd))
bfd_put_64 (output_bfd, header_address, loc);
else
bfd_put_32 (output_bfd, header_address, loc);
/* Now handle the PLT itself. First the standard entry (the order
does not matter, we just have to pick one). */
if (h->plt.plist->mips_offset != MINUS_ONE)
{
const bfd_vma *plt_entry;
bfd_vma plt_offset;
plt_offset = htab->plt_header_size + h->plt.plist->mips_offset;
BFD_ASSERT (plt_offset <= htab->root.splt->size);
/* Find out where the .plt entry should go. */
loc = htab->root.splt->contents + plt_offset;
/* Pick the load opcode. */
load = MIPS_ELF_LOAD_WORD (output_bfd);
/* Fill in the PLT entry itself. */
if (MIPSR6_P (output_bfd))
plt_entry = htab->compact_branches ? mipsr6_exec_plt_entry_compact
: mipsr6_exec_plt_entry;
else
plt_entry = mips_exec_plt_entry;
bfd_put_32 (output_bfd, plt_entry[0] | got_address_high, loc);
bfd_put_32 (output_bfd, plt_entry[1] | got_address_low | load,
loc + 4);
if (! LOAD_INTERLOCKS_P (output_bfd)
|| (MIPSR6_P (output_bfd) && htab->compact_branches))
{
bfd_put_32 (output_bfd, plt_entry[2] | got_address_low, loc + 8);
bfd_put_32 (output_bfd, plt_entry[3], loc + 12);
}
else
{
bfd_put_32 (output_bfd, plt_entry[3], loc + 8);
bfd_put_32 (output_bfd, plt_entry[2] | got_address_low,
loc + 12);
}
}
/* Now the compressed entry. They come after any standard ones. */
if (h->plt.plist->comp_offset != MINUS_ONE)
{
bfd_vma plt_offset;
plt_offset = (htab->plt_header_size + htab->plt_mips_offset
+ h->plt.plist->comp_offset);
BFD_ASSERT (plt_offset <= htab->root.splt->size);
/* Find out where the .plt entry should go. */
loc = htab->root.splt->contents + plt_offset;
/* Fill in the PLT entry itself. */
if (!MICROMIPS_P (output_bfd))
{
const bfd_vma *plt_entry = mips16_o32_exec_plt_entry;
bfd_put_16 (output_bfd, plt_entry[0], loc);
bfd_put_16 (output_bfd, plt_entry[1], loc + 2);
bfd_put_16 (output_bfd, plt_entry[2], loc + 4);
bfd_put_16 (output_bfd, plt_entry[3], loc + 6);
bfd_put_16 (output_bfd, plt_entry[4], loc + 8);
bfd_put_16 (output_bfd, plt_entry[5], loc + 10);
bfd_put_32 (output_bfd, got_address, loc + 12);
}
else if (htab->insn32)
{
const bfd_vma *plt_entry = micromips_insn32_o32_exec_plt_entry;
bfd_put_16 (output_bfd, plt_entry[0], loc);
bfd_put_16 (output_bfd, got_address_high, loc + 2);
bfd_put_16 (output_bfd, plt_entry[2], loc + 4);
bfd_put_16 (output_bfd, got_address_low, loc + 6);
bfd_put_16 (output_bfd, plt_entry[4], loc + 8);
bfd_put_16 (output_bfd, plt_entry[5], loc + 10);
bfd_put_16 (output_bfd, plt_entry[6], loc + 12);
bfd_put_16 (output_bfd, got_address_low, loc + 14);
}
else
{
const bfd_vma *plt_entry = micromips_o32_exec_plt_entry;
bfd_signed_vma gotpc_offset;
bfd_vma loc_address;
BFD_ASSERT (got_address % 4 == 0);
loc_address = (htab->root.splt->output_section->vma
+ htab->root.splt->output_offset + plt_offset);
gotpc_offset = got_address - ((loc_address | 3) ^ 3);
/* ADDIUPC has a span of +/-16MB, check we're in range. */
if (gotpc_offset + 0x1000000 >= 0x2000000)
{
_bfd_error_handler
/* xgettext:c-format */
(_("%pB: `%pA' offset of %" PRId64 " from `%pA' "
"beyond the range of ADDIUPC"),
output_bfd,
htab->root.sgotplt->output_section,
(int64_t) gotpc_offset,
htab->root.splt->output_section);
bfd_set_error (bfd_error_no_error);
return FALSE;
}
bfd_put_16 (output_bfd,
plt_entry[0] | ((gotpc_offset >> 18) & 0x7f), loc);
bfd_put_16 (output_bfd, (gotpc_offset >> 2) & 0xffff, loc + 2);
bfd_put_16 (output_bfd, plt_entry[2], loc + 4);
bfd_put_16 (output_bfd, plt_entry[3], loc + 6);
bfd_put_16 (output_bfd, plt_entry[4], loc + 8);
bfd_put_16 (output_bfd, plt_entry[5], loc + 10);
}
}
/* Emit an R_MIPS_JUMP_SLOT relocation against the .got.plt entry. */
mips_elf_output_dynamic_relocation (output_bfd, htab->root.srelplt,
got_index - 2, h->dynindx,
R_MIPS_JUMP_SLOT, got_address);
/* We distinguish between PLT entries and lazy-binding stubs by
giving the former an st_other value of STO_MIPS_PLT. Set the
flag and leave the value if there are any relocations in the
binary where pointer equality matters. */
sym->st_shndx = SHN_UNDEF;
if (h->pointer_equality_needed)
sym->st_other = ELF_ST_SET_MIPS_PLT (sym->st_other);
else
{
sym->st_value = 0;
sym->st_other = 0;
}
}
if (h->plt.plist != NULL && h->plt.plist->stub_offset != MINUS_ONE)
{
/* We've decided to create a lazy-binding stub. */
bfd_boolean micromips_p = MICROMIPS_P (output_bfd);
unsigned int other = micromips_p ? STO_MICROMIPS : 0;
bfd_vma stub_size = htab->function_stub_size;
bfd_byte stub[MIPS_FUNCTION_STUB_BIG_SIZE];
bfd_vma isa_bit = micromips_p;
bfd_vma stub_big_size;
if (!micromips_p)
stub_big_size = MIPS_FUNCTION_STUB_BIG_SIZE;
else if (htab->insn32)
stub_big_size = MICROMIPS_INSN32_FUNCTION_STUB_BIG_SIZE;
else
stub_big_size = MICROMIPS_FUNCTION_STUB_BIG_SIZE;
/* This symbol has a stub. Set it up. */
BFD_ASSERT (h->dynindx != -1);
BFD_ASSERT (stub_size == stub_big_size || h->dynindx <= 0xffff);
/* Values up to 2^31 - 1 are allowed. Larger values would cause
sign extension at runtime in the stub, resulting in a negative
index value. */
if (h->dynindx & ~0x7fffffff)
return FALSE;
/* Fill the stub. */
if (micromips_p)
{
idx = 0;
bfd_put_micromips_32 (output_bfd, STUB_LW_MICROMIPS (output_bfd),
stub + idx);
idx += 4;
if (htab->insn32)
{
bfd_put_micromips_32 (output_bfd,
STUB_MOVE32_MICROMIPS, stub + idx);
idx += 4;
}
else
{
bfd_put_16 (output_bfd, STUB_MOVE_MICROMIPS, stub + idx);
idx += 2;
}
if (stub_size == stub_big_size)
{
long dynindx_hi = (h->dynindx >> 16) & 0x7fff;
bfd_put_micromips_32 (output_bfd,
STUB_LUI_MICROMIPS (dynindx_hi),
stub + idx);
idx += 4;
}
if (htab->insn32)
{
bfd_put_micromips_32 (output_bfd, STUB_JALR32_MICROMIPS,
stub + idx);
idx += 4;
}
else
{
bfd_put_16 (output_bfd, STUB_JALR_MICROMIPS, stub + idx);
idx += 2;
}
/* If a large stub is not required and sign extension is not a
problem, then use legacy code in the stub. */
if (stub_size == stub_big_size)
bfd_put_micromips_32 (output_bfd,
STUB_ORI_MICROMIPS (h->dynindx & 0xffff),
stub + idx);
else if (h->dynindx & ~0x7fff)
bfd_put_micromips_32 (output_bfd,
STUB_LI16U_MICROMIPS (h->dynindx & 0xffff),
stub + idx);
else
bfd_put_micromips_32 (output_bfd,
STUB_LI16S_MICROMIPS (output_bfd,
h->dynindx),
stub + idx);
}
else
{
idx = 0;
bfd_put_32 (output_bfd, STUB_LW (output_bfd), stub + idx);
idx += 4;
bfd_put_32 (output_bfd, STUB_MOVE, stub + idx);
idx += 4;
if (stub_size == stub_big_size)
{
bfd_put_32 (output_bfd, STUB_LUI ((h->dynindx >> 16) & 0x7fff),
stub + idx);
idx += 4;
}
if (!(MIPSR6_P (output_bfd) && htab->compact_branches))
{
bfd_put_32 (output_bfd, STUB_JALR, stub + idx);
idx += 4;
}
/* If a large stub is not required and sign extension is not a
problem, then use legacy code in the stub. */
if (stub_size == stub_big_size)
bfd_put_32 (output_bfd, STUB_ORI (h->dynindx & 0xffff),
stub + idx);
else if (h->dynindx & ~0x7fff)
bfd_put_32 (output_bfd, STUB_LI16U (h->dynindx & 0xffff),
stub + idx);
else
bfd_put_32 (output_bfd, STUB_LI16S (output_bfd, h->dynindx),
stub + idx);
idx += 4;
if (MIPSR6_P (output_bfd) && htab->compact_branches)
bfd_put_32 (output_bfd, STUB_JALRC, stub + idx);
}
BFD_ASSERT (h->plt.plist->stub_offset <= htab->sstubs->size);
memcpy (htab->sstubs->contents + h->plt.plist->stub_offset,
stub, stub_size);
/* Mark the symbol as undefined. stub_offset != -1 occurs
only for the referenced symbol. */
sym->st_shndx = SHN_UNDEF;
/* The run-time linker uses the st_value field of the symbol
to reset the global offset table entry for this external
to its stub address when unlinking a shared object. */
sym->st_value = (htab->sstubs->output_section->vma
+ htab->sstubs->output_offset
+ h->plt.plist->stub_offset
+ isa_bit);
sym->st_other = other;
}
/* If we have a MIPS16 function with a stub, the dynamic symbol must
refer to the stub, since only the stub uses the standard calling
conventions. */
if (h->dynindx != -1 && hmips->fn_stub != NULL)
{
BFD_ASSERT (hmips->need_fn_stub);
sym->st_value = (hmips->fn_stub->output_section->vma
+ hmips->fn_stub->output_offset);
sym->st_size = hmips->fn_stub->size;
sym->st_other = ELF_ST_VISIBILITY (sym->st_other);
}
BFD_ASSERT (h->dynindx != -1
|| h->forced_local);
sgot = htab->root.sgot;
g = htab->got_info;
BFD_ASSERT (g != NULL);
/* Run through the global symbol table, creating GOT entries for all
the symbols that need them. */
if (hmips->global_got_area != GGA_NONE)
{
bfd_vma offset;
bfd_vma value;
value = sym->st_value;
offset = mips_elf_primary_global_got_index (output_bfd, info, h);
MIPS_ELF_PUT_WORD (output_bfd, value, sgot->contents + offset);
}
if (hmips->global_got_area != GGA_NONE && g->next)
{
struct mips_got_entry e, *p;
bfd_vma entry;
bfd_vma offset;
gg = g;
e.abfd = output_bfd;
e.symndx = -1;
e.d.h = hmips;
e.tls_type = GOT_TLS_NONE;
for (g = g->next; g->next != gg; g = g->next)
{
if (g->got_entries
&& (p = (struct mips_got_entry *) htab_find (g->got_entries,
&e)))
{
offset = p->gotidx;
BFD_ASSERT (offset > 0 && offset < htab->root.sgot->size);
if (bfd_link_pic (info)
|| (elf_hash_table (info)->dynamic_sections_created
&& p->d.h != NULL
&& p->d.h->root.def_dynamic
&& !p->d.h->root.def_regular))
{
/* Create an R_MIPS_REL32 relocation for this entry. Due to
the various compatibility problems, it's easier to mock
up an R_MIPS_32 or R_MIPS_64 relocation and leave
mips_elf_create_dynamic_relocation to calculate the
appropriate addend. */
Elf_Internal_Rela rel[3];
memset (rel, 0, sizeof (rel));
if (ABI_64_P (output_bfd))
rel[0].r_info = ELF_R_INFO (output_bfd, 0, R_MIPS_64);
else
rel[0].r_info = ELF_R_INFO (output_bfd, 0, R_MIPS_32);
rel[0].r_offset = rel[1].r_offset = rel[2].r_offset = offset;
entry = 0;
if (! (mips_elf_create_dynamic_relocation
(output_bfd, info, rel,
e.d.h, NULL, sym->st_value, &entry, sgot)))
return FALSE;
}
else
entry = sym->st_value;
MIPS_ELF_PUT_WORD (output_bfd, entry, sgot->contents + offset);
}
}
}
/* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. */
name = h->root.root.string;
if (h == elf_hash_table (info)->hdynamic
|| h == elf_hash_table (info)->hgot)
sym->st_shndx = SHN_ABS;
else if (strcmp (name, "_DYNAMIC_LINK") == 0
|| strcmp (name, "_DYNAMIC_LINKING") == 0)
{
sym->st_shndx = SHN_ABS;
sym->st_info = ELF_ST_INFO (STB_GLOBAL, STT_SECTION);
sym->st_value = 1;
}
else if (SGI_COMPAT (output_bfd))
{
if (strcmp (name, mips_elf_dynsym_rtproc_names[0]) == 0
|| strcmp (name, mips_elf_dynsym_rtproc_names[1]) == 0)
{
sym->st_info = ELF_ST_INFO (STB_GLOBAL, STT_SECTION);
sym->st_other = STO_PROTECTED;
sym->st_value = 0;
sym->st_shndx = SHN_MIPS_DATA;
}
else if (strcmp (name, mips_elf_dynsym_rtproc_names[2]) == 0)
{
sym->st_info = ELF_ST_INFO (STB_GLOBAL, STT_SECTION);
sym->st_other = STO_PROTECTED;
sym->st_value = mips_elf_hash_table (info)->procedure_count;
sym->st_shndx = SHN_ABS;
}
else if (sym->st_shndx != SHN_UNDEF && sym->st_shndx != SHN_ABS)
{
if (h->type == STT_FUNC)
sym->st_shndx = SHN_MIPS_TEXT;
else if (h->type == STT_OBJECT)
sym->st_shndx = SHN_MIPS_DATA;
}
}
/* Emit a copy reloc, if needed. */
if (h->needs_copy)
{
asection *s;
bfd_vma symval;
BFD_ASSERT (h->dynindx != -1);
BFD_ASSERT (htab->use_plts_and_copy_relocs);
s = mips_elf_rel_dyn_section (info, FALSE);
symval = (h->root.u.def.section->output_section->vma
+ h->root.u.def.section->output_offset
+ h->root.u.def.value);
mips_elf_output_dynamic_relocation (output_bfd, s, s->reloc_count++,
h->dynindx, R_MIPS_COPY, symval);
}
/* Handle the IRIX6-specific symbols. */
if (IRIX_COMPAT (output_bfd) == ict_irix6)
mips_elf_irix6_finish_dynamic_symbol (output_bfd, name, sym);
/* Keep dynamic compressed symbols odd. This allows the dynamic linker
to treat compressed symbols like any other. */
if (ELF_ST_IS_MIPS16 (sym->st_other))
{
BFD_ASSERT (sym->st_value & 1);
sym->st_other -= STO_MIPS16;
}
else if (ELF_ST_IS_MICROMIPS (sym->st_other))
{
BFD_ASSERT (sym->st_value & 1);
sym->st_other -= STO_MICROMIPS;
}
return TRUE;
}
/* Likewise, for VxWorks. */
bfd_boolean
_bfd_mips_vxworks_finish_dynamic_symbol (bfd *output_bfd,
struct bfd_link_info *info,
struct elf_link_hash_entry *h,
Elf_Internal_Sym *sym)
{
bfd *dynobj;
asection *sgot;
struct mips_got_info *g;
struct mips_elf_link_hash_table *htab;
struct mips_elf_link_hash_entry *hmips;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
dynobj = elf_hash_table (info)->dynobj;
hmips = (struct mips_elf_link_hash_entry *) h;
if (h->plt.plist != NULL && h->plt.plist->mips_offset != MINUS_ONE)
{
bfd_byte *loc;
bfd_vma plt_address, got_address, got_offset, branch_offset;
Elf_Internal_Rela rel;
static const bfd_vma *plt_entry;
bfd_vma gotplt_index;
bfd_vma plt_offset;
plt_offset = htab->plt_header_size + h->plt.plist->mips_offset;
gotplt_index = h->plt.plist->gotplt_index;
BFD_ASSERT (h->dynindx != -1);
BFD_ASSERT (htab->root.splt != NULL);
BFD_ASSERT (gotplt_index != MINUS_ONE);
BFD_ASSERT (plt_offset <= htab->root.splt->size);
/* Calculate the address of the .plt entry. */
plt_address = (htab->root.splt->output_section->vma
+ htab->root.splt->output_offset
+ plt_offset);
/* Calculate the address of the .got.plt entry. */
got_address = (htab->root.sgotplt->output_section->vma
+ htab->root.sgotplt->output_offset
+ gotplt_index * MIPS_ELF_GOT_SIZE (output_bfd));
/* Calculate the offset of the .got.plt entry from
_GLOBAL_OFFSET_TABLE_. */
got_offset = mips_elf_gotplt_index (info, h);
/* Calculate the offset for the branch at the start of the PLT
entry. The branch jumps to the beginning of .plt. */
branch_offset = -(plt_offset / 4 + 1) & 0xffff;
/* Fill in the initial value of the .got.plt entry. */
bfd_put_32 (output_bfd, plt_address,
(htab->root.sgotplt->contents
+ gotplt_index * MIPS_ELF_GOT_SIZE (output_bfd)));
/* Find out where the .plt entry should go. */
loc = htab->root.splt->contents + plt_offset;
if (bfd_link_pic (info))
{
plt_entry = mips_vxworks_shared_plt_entry;
bfd_put_32 (output_bfd, plt_entry[0] | branch_offset, loc);
bfd_put_32 (output_bfd, plt_entry[1] | gotplt_index, loc + 4);
}
else
{
bfd_vma got_address_high, got_address_low;
plt_entry = mips_vxworks_exec_plt_entry;
got_address_high = ((got_address + 0x8000) >> 16) & 0xffff;
got_address_low = got_address & 0xffff;
bfd_put_32 (output_bfd, plt_entry[0] | branch_offset, loc);
bfd_put_32 (output_bfd, plt_entry[1] | gotplt_index, loc + 4);
bfd_put_32 (output_bfd, plt_entry[2] | got_address_high, loc + 8);
bfd_put_32 (output_bfd, plt_entry[3] | got_address_low, loc + 12);
bfd_put_32 (output_bfd, plt_entry[4], loc + 16);
bfd_put_32 (output_bfd, plt_entry[5], loc + 20);
bfd_put_32 (output_bfd, plt_entry[6], loc + 24);
bfd_put_32 (output_bfd, plt_entry[7], loc + 28);
loc = (htab->srelplt2->contents
+ (gotplt_index * 3 + 2) * sizeof (Elf32_External_Rela));
/* Emit a relocation for the .got.plt entry. */
rel.r_offset = got_address;
rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_MIPS_32);
rel.r_addend = plt_offset;
bfd_elf32_swap_reloca_out (output_bfd, &rel, loc);
/* Emit a relocation for the lui of %hi(<.got.plt slot>). */
loc += sizeof (Elf32_External_Rela);
rel.r_offset = plt_address + 8;
rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_MIPS_HI16);
rel.r_addend = got_offset;
bfd_elf32_swap_reloca_out (output_bfd, &rel, loc);
/* Emit a relocation for the addiu of %lo(<.got.plt slot>). */
loc += sizeof (Elf32_External_Rela);
rel.r_offset += 4;
rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_MIPS_LO16);
bfd_elf32_swap_reloca_out (output_bfd, &rel, loc);
}
/* Emit an R_MIPS_JUMP_SLOT relocation against the .got.plt entry. */
loc = (htab->root.srelplt->contents
+ gotplt_index * sizeof (Elf32_External_Rela));
rel.r_offset = got_address;
rel.r_info = ELF32_R_INFO (h->dynindx, R_MIPS_JUMP_SLOT);
rel.r_addend = 0;
bfd_elf32_swap_reloca_out (output_bfd, &rel, loc);
if (!h->def_regular)
sym->st_shndx = SHN_UNDEF;
}
BFD_ASSERT (h->dynindx != -1 || h->forced_local);
sgot = htab->root.sgot;
g = htab->got_info;
BFD_ASSERT (g != NULL);
/* See if this symbol has an entry in the GOT. */
if (hmips->global_got_area != GGA_NONE)
{
bfd_vma offset;
Elf_Internal_Rela outrel;
bfd_byte *loc;
asection *s;
/* Install the symbol value in the GOT. */
offset = mips_elf_primary_global_got_index (output_bfd, info, h);
MIPS_ELF_PUT_WORD (output_bfd, sym->st_value, sgot->contents + offset);
/* Add a dynamic relocation for it. */
s = mips_elf_rel_dyn_section (info, FALSE);
loc = s->contents + (s->reloc_count++ * sizeof (Elf32_External_Rela));
outrel.r_offset = (sgot->output_section->vma
+ sgot->output_offset
+ offset);
outrel.r_info = ELF32_R_INFO (h->dynindx, R_MIPS_32);
outrel.r_addend = 0;
bfd_elf32_swap_reloca_out (dynobj, &outrel, loc);
}
/* Emit a copy reloc, if needed. */
if (h->needs_copy)
{
Elf_Internal_Rela rel;
asection *srel;
bfd_byte *loc;
BFD_ASSERT (h->dynindx != -1);
rel.r_offset = (h->root.u.def.section->output_section->vma
+ h->root.u.def.section->output_offset
+ h->root.u.def.value);
rel.r_info = ELF32_R_INFO (h->dynindx, R_MIPS_COPY);
rel.r_addend = 0;
if (h->root.u.def.section == htab->root.sdynrelro)
srel = htab->root.sreldynrelro;
else
srel = htab->root.srelbss;
loc = srel->contents + srel->reloc_count * sizeof (Elf32_External_Rela);
bfd_elf32_swap_reloca_out (output_bfd, &rel, loc);
++srel->reloc_count;
}
/* If this is a mips16/microMIPS symbol, force the value to be even. */
if (ELF_ST_IS_COMPRESSED (sym->st_other))
sym->st_value &= ~1;
return TRUE;
}
/* Write out a plt0 entry to the beginning of .plt. */
static bfd_boolean
mips_finish_exec_plt (bfd *output_bfd, struct bfd_link_info *info)
{
bfd_byte *loc;
bfd_vma gotplt_value, gotplt_value_high, gotplt_value_low;
static const bfd_vma *plt_entry;
struct mips_elf_link_hash_table *htab;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
if (ABI_64_P (output_bfd))
plt_entry = (htab->compact_branches
? mipsr6_n64_exec_plt0_entry_compact
: mips_n64_exec_plt0_entry);
else if (ABI_N32_P (output_bfd))
plt_entry = (htab->compact_branches
? mipsr6_n32_exec_plt0_entry_compact
: mips_n32_exec_plt0_entry);
else if (!htab->plt_header_is_comp)
plt_entry = (htab->compact_branches
? mipsr6_o32_exec_plt0_entry_compact
: mips_o32_exec_plt0_entry);
else if (htab->insn32)
plt_entry = micromips_insn32_o32_exec_plt0_entry;
else
plt_entry = micromips_o32_exec_plt0_entry;
/* Calculate the value of .got.plt. */
gotplt_value = (htab->root.sgotplt->output_section->vma
+ htab->root.sgotplt->output_offset);
gotplt_value_high = ((gotplt_value + 0x8000) >> 16) & 0xffff;
gotplt_value_low = gotplt_value & 0xffff;
/* The PLT sequence is not safe for N64 if .got.plt's address can
not be loaded in two instructions. */
if (ABI_64_P (output_bfd)
&& ((gotplt_value + 0x80008000) & ~(bfd_vma) 0xffffffff) != 0)
{
_bfd_error_handler
/* xgettext:c-format */
(_("%pB: `%pA' start VMA of %#" PRIx64 " outside the 32-bit range "
"supported; consider using `-Ttext-segment=...'"),
output_bfd,
htab->root.sgotplt->output_section,
(int64_t) gotplt_value);
bfd_set_error (bfd_error_no_error);
return FALSE;
}
/* Install the PLT header. */
loc = htab->root.splt->contents;
if (plt_entry == micromips_o32_exec_plt0_entry)
{
bfd_vma gotpc_offset;
bfd_vma loc_address;
size_t i;
BFD_ASSERT (gotplt_value % 4 == 0);
loc_address = (htab->root.splt->output_section->vma
+ htab->root.splt->output_offset);
gotpc_offset = gotplt_value - ((loc_address | 3) ^ 3);
/* ADDIUPC has a span of +/-16MB, check we're in range. */
if (gotpc_offset + 0x1000000 >= 0x2000000)
{
_bfd_error_handler
/* xgettext:c-format */
(_("%pB: `%pA' offset of %" PRId64 " from `%pA' "
"beyond the range of ADDIUPC"),
output_bfd,
htab->root.sgotplt->output_section,
(int64_t) gotpc_offset,
htab->root.splt->output_section);
bfd_set_error (bfd_error_no_error);
return FALSE;
}
bfd_put_16 (output_bfd,
plt_entry[0] | ((gotpc_offset >> 18) & 0x7f), loc);
bfd_put_16 (output_bfd, (gotpc_offset >> 2) & 0xffff, loc + 2);
for (i = 2; i < ARRAY_SIZE (micromips_o32_exec_plt0_entry); i++)
bfd_put_16 (output_bfd, plt_entry[i], loc + (i * 2));
}
else if (plt_entry == micromips_insn32_o32_exec_plt0_entry)
{
size_t i;
bfd_put_16 (output_bfd, plt_entry[0], loc);
bfd_put_16 (output_bfd, gotplt_value_high, loc + 2);
bfd_put_16 (output_bfd, plt_entry[2], loc + 4);
bfd_put_16 (output_bfd, gotplt_value_low, loc + 6);
bfd_put_16 (output_bfd, plt_entry[4], loc + 8);
bfd_put_16 (output_bfd, gotplt_value_low, loc + 10);
for (i = 6; i < ARRAY_SIZE (micromips_insn32_o32_exec_plt0_entry); i++)
bfd_put_16 (output_bfd, plt_entry[i], loc + (i * 2));
}
else
{
bfd_put_32 (output_bfd, plt_entry[0] | gotplt_value_high, loc);
bfd_put_32 (output_bfd, plt_entry[1] | gotplt_value_low, loc + 4);
bfd_put_32 (output_bfd, plt_entry[2] | gotplt_value_low, loc + 8);
bfd_put_32 (output_bfd, plt_entry[3], loc + 12);
bfd_put_32 (output_bfd, plt_entry[4], loc + 16);
bfd_put_32 (output_bfd, plt_entry[5], loc + 20);
bfd_put_32 (output_bfd, plt_entry[6], loc + 24);
bfd_put_32 (output_bfd, plt_entry[7], loc + 28);
}
return TRUE;
}
/* Install the PLT header for a VxWorks executable and finalize the
contents of .rela.plt.unloaded. */
static void
mips_vxworks_finish_exec_plt (bfd *output_bfd, struct bfd_link_info *info)
{
Elf_Internal_Rela rela;
bfd_byte *loc;
bfd_vma got_value, got_value_high, got_value_low, plt_address;
static const bfd_vma *plt_entry;
struct mips_elf_link_hash_table *htab;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
plt_entry = mips_vxworks_exec_plt0_entry;
/* Calculate the value of _GLOBAL_OFFSET_TABLE_. */
got_value = (htab->root.hgot->root.u.def.section->output_section->vma
+ htab->root.hgot->root.u.def.section->output_offset
+ htab->root.hgot->root.u.def.value);
got_value_high = ((got_value + 0x8000) >> 16) & 0xffff;
got_value_low = got_value & 0xffff;
/* Calculate the address of the PLT header. */
plt_address = (htab->root.splt->output_section->vma
+ htab->root.splt->output_offset);
/* Install the PLT header. */
loc = htab->root.splt->contents;
bfd_put_32 (output_bfd, plt_entry[0] | got_value_high, loc);
bfd_put_32 (output_bfd, plt_entry[1] | got_value_low, loc + 4);
bfd_put_32 (output_bfd, plt_entry[2], loc + 8);
bfd_put_32 (output_bfd, plt_entry[3], loc + 12);
bfd_put_32 (output_bfd, plt_entry[4], loc + 16);
bfd_put_32 (output_bfd, plt_entry[5], loc + 20);
/* Output the relocation for the lui of %hi(_GLOBAL_OFFSET_TABLE_). */
loc = htab->srelplt2->contents;
rela.r_offset = plt_address;
rela.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_MIPS_HI16);
rela.r_addend = 0;
bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
loc += sizeof (Elf32_External_Rela);
/* Output the relocation for the following addiu of
%lo(_GLOBAL_OFFSET_TABLE_). */
rela.r_offset += 4;
rela.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_MIPS_LO16);
bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
loc += sizeof (Elf32_External_Rela);
/* Fix up the remaining relocations. They may have the wrong
symbol index for _G_O_T_ or _P_L_T_ depending on the order
in which symbols were output. */
while (loc < htab->srelplt2->contents + htab->srelplt2->size)
{
Elf_Internal_Rela rel;
bfd_elf32_swap_reloca_in (output_bfd, loc, &rel);
rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_MIPS_32);
bfd_elf32_swap_reloca_out (output_bfd, &rel, loc);
loc += sizeof (Elf32_External_Rela);
bfd_elf32_swap_reloca_in (output_bfd, loc, &rel);
rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_MIPS_HI16);
bfd_elf32_swap_reloca_out (output_bfd, &rel, loc);
loc += sizeof (Elf32_External_Rela);
bfd_elf32_swap_reloca_in (output_bfd, loc, &rel);
rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_MIPS_LO16);
bfd_elf32_swap_reloca_out (output_bfd, &rel, loc);
loc += sizeof (Elf32_External_Rela);
}
}
/* Install the PLT header for a VxWorks shared library. */
static void
mips_vxworks_finish_shared_plt (bfd *output_bfd, struct bfd_link_info *info)
{
unsigned int i;
struct mips_elf_link_hash_table *htab;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
/* We just need to copy the entry byte-by-byte. */
for (i = 0; i < ARRAY_SIZE (mips_vxworks_shared_plt0_entry); i++)
bfd_put_32 (output_bfd, mips_vxworks_shared_plt0_entry[i],
htab->root.splt->contents + i * 4);
}
/* Finish up the dynamic sections. */
bfd_boolean
_bfd_mips_elf_finish_dynamic_sections (bfd *output_bfd,
struct bfd_link_info *info)
{
bfd *dynobj;
asection *sdyn;
asection *sgot;
struct mips_got_info *gg, *g;
struct mips_elf_link_hash_table *htab;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
dynobj = elf_hash_table (info)->dynobj;
sdyn = bfd_get_linker_section (dynobj, ".dynamic");
sgot = htab->root.sgot;
gg = htab->got_info;
if (elf_hash_table (info)->dynamic_sections_created)
{
bfd_byte *b;
int dyn_to_skip = 0, dyn_skipped = 0;
BFD_ASSERT (sdyn != NULL);
BFD_ASSERT (gg != NULL);
g = mips_elf_bfd_got (output_bfd, FALSE);
BFD_ASSERT (g != NULL);
for (b = sdyn->contents;
b < sdyn->contents + sdyn->size;
b += MIPS_ELF_DYN_SIZE (dynobj))
{
Elf_Internal_Dyn dyn;
const char *name;
size_t elemsize;
asection *s;
bfd_boolean swap_out_p;
/* Read in the current dynamic entry. */
(*get_elf_backend_data (dynobj)->s->swap_dyn_in) (dynobj, b, &dyn);
/* Assume that we're going to modify it and write it out. */
swap_out_p = TRUE;
switch (dyn.d_tag)
{
case DT_RELENT:
dyn.d_un.d_val = MIPS_ELF_REL_SIZE (dynobj);
break;
case DT_RELAENT:
BFD_ASSERT (htab->root.target_os == is_vxworks);
dyn.d_un.d_val = MIPS_ELF_RELA_SIZE (dynobj);
break;
case DT_STRSZ:
/* Rewrite DT_STRSZ. */
dyn.d_un.d_val =
_bfd_elf_strtab_size (elf_hash_table (info)->dynstr);
break;
case DT_PLTGOT:
s = htab->root.sgot;
dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
break;
case DT_MIPS_PLTGOT:
s = htab->root.sgotplt;
dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
break;
case DT_MIPS_RLD_VERSION:
dyn.d_un.d_val = 1; /* XXX */
break;
case DT_MIPS_FLAGS:
dyn.d_un.d_val = RHF_NOTPOT; /* XXX */
break;
case DT_MIPS_TIME_STAMP:
{
time_t t;
time (&t);
dyn.d_un.d_val = t;
}
break;
case DT_MIPS_ICHECKSUM:
/* XXX FIXME: */
swap_out_p = FALSE;
break;
case DT_MIPS_IVERSION:
/* XXX FIXME: */
swap_out_p = FALSE;
break;
case DT_MIPS_BASE_ADDRESS:
s = output_bfd->sections;
BFD_ASSERT (s != NULL);
dyn.d_un.d_ptr = s->vma & ~(bfd_vma) 0xffff;
break;
case DT_MIPS_LOCAL_GOTNO:
dyn.d_un.d_val = g->local_gotno;
break;
case DT_MIPS_UNREFEXTNO:
/* The index into the dynamic symbol table which is the
entry of the first external symbol that is not
referenced within the same object. */
dyn.d_un.d_val = bfd_count_sections (output_bfd) + 1;
break;
case DT_MIPS_GOTSYM:
if (htab->global_gotsym)
{
dyn.d_un.d_val = htab->global_gotsym->dynindx;
break;
}
/* In case if we don't have global got symbols we default
to setting DT_MIPS_GOTSYM to the same value as
DT_MIPS_SYMTABNO. */
/* Fall through. */
case DT_MIPS_SYMTABNO:
name = ".dynsym";
elemsize = MIPS_ELF_SYM_SIZE (output_bfd);
s = bfd_get_linker_section (dynobj, name);
if (s != NULL)
dyn.d_un.d_val = s->size / elemsize;
else
dyn.d_un.d_val = 0;
break;
case DT_MIPS_HIPAGENO:
dyn.d_un.d_val = g->local_gotno - htab->reserved_gotno;
break;
case DT_MIPS_RLD_MAP:
{
struct elf_link_hash_entry *h;
h = mips_elf_hash_table (info)->rld_symbol;
if (!h)
{
dyn_to_skip = MIPS_ELF_DYN_SIZE (dynobj);
swap_out_p = FALSE;
break;
}
s = h->root.u.def.section;
/* The MIPS_RLD_MAP tag stores the absolute address of the
debug pointer. */
dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
+ h->root.u.def.value);
}
break;
case DT_MIPS_RLD_MAP_REL:
{
struct elf_link_hash_entry *h;
bfd_vma dt_addr, rld_addr;
h = mips_elf_hash_table (info)->rld_symbol;
if (!h)
{
dyn_to_skip = MIPS_ELF_DYN_SIZE (dynobj);
swap_out_p = FALSE;
break;
}
s = h->root.u.def.section;
/* The MIPS_RLD_MAP_REL tag stores the offset to the debug
pointer, relative to the address of the tag. */
dt_addr = (sdyn->output_section->vma + sdyn->output_offset
+ (b - sdyn->contents));
rld_addr = (s->output_section->vma + s->output_offset
+ h->root.u.def.value);
dyn.d_un.d_ptr = rld_addr - dt_addr;
}
break;
case DT_MIPS_OPTIONS:
s = (bfd_get_section_by_name
(output_bfd, MIPS_ELF_OPTIONS_SECTION_NAME (output_bfd)));
dyn.d_un.d_ptr = s->vma;
break;
case DT_PLTREL:
BFD_ASSERT (htab->use_plts_and_copy_relocs);
if (htab->root.target_os == is_vxworks)
dyn.d_un.d_val = DT_RELA;
else
dyn.d_un.d_val = DT_REL;
break;
case DT_PLTRELSZ:
BFD_ASSERT (htab->use_plts_and_copy_relocs);
dyn.d_un.d_val = htab->root.srelplt->size;
break;
case DT_JMPREL:
BFD_ASSERT (htab->use_plts_and_copy_relocs);
dyn.d_un.d_ptr = (htab->root.srelplt->output_section->vma
+ htab->root.srelplt->output_offset);
break;
case DT_TEXTREL:
/* If we didn't need any text relocations after all, delete
the dynamic tag. */
if (!(info->flags & DF_TEXTREL))
{
dyn_to_skip = MIPS_ELF_DYN_SIZE (dynobj);
swap_out_p = FALSE;
}
break;
case DT_FLAGS:
/* If we didn't need any text relocations after all, clear
DF_TEXTREL from DT_FLAGS. */
if (!(info->flags & DF_TEXTREL))
dyn.d_un.d_val &= ~DF_TEXTREL;
else
swap_out_p = FALSE;
break;
case DT_MIPS_XHASH:
name = ".MIPS.xhash";
s = bfd_get_linker_section (dynobj, name);
dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
break;
default:
swap_out_p = FALSE;
if (htab->root.target_os == is_vxworks
&& elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
swap_out_p = TRUE;
break;
}
if (swap_out_p || dyn_skipped)
(*get_elf_backend_data (dynobj)->s->swap_dyn_out)
(dynobj, &dyn, b - dyn_skipped);
if (dyn_to_skip)
{
dyn_skipped += dyn_to_skip;
dyn_to_skip = 0;
}
}
/* Wipe out any trailing entries if we shifted down a dynamic tag. */
if (dyn_skipped > 0)
memset (b - dyn_skipped, 0, dyn_skipped);
}
if (sgot != NULL && sgot->size > 0
&& !bfd_is_abs_section (sgot->output_section))
{
if (htab->root.target_os == is_vxworks)
{
/* The first entry of the global offset table points to the
".dynamic" section. The second is initialized by the
loader and contains the shared library identifier.
The third is also initialized by the loader and points
to the lazy resolution stub. */
MIPS_ELF_PUT_WORD (output_bfd,
sdyn->output_offset + sdyn->output_section->vma,
sgot->contents);
MIPS_ELF_PUT_WORD (output_bfd, 0,
sgot->contents + MIPS_ELF_GOT_SIZE (output_bfd));
MIPS_ELF_PUT_WORD (output_bfd, 0,
sgot->contents
+ 2 * MIPS_ELF_GOT_SIZE (output_bfd));
}
else
{
/* The first entry of the global offset table will be filled at
runtime. The second entry will be used by some runtime loaders.
This isn't the case of IRIX rld. */
MIPS_ELF_PUT_WORD (output_bfd, (bfd_vma) 0, sgot->contents);
MIPS_ELF_PUT_WORD (output_bfd, MIPS_ELF_GNU_GOT1_MASK (output_bfd),
sgot->contents + MIPS_ELF_GOT_SIZE (output_bfd));
}
elf_section_data (sgot->output_section)->this_hdr.sh_entsize
= MIPS_ELF_GOT_SIZE (output_bfd);
}
/* Generate dynamic relocations for the non-primary gots. */
if (gg != NULL && gg->next)
{
Elf_Internal_Rela rel[3];
bfd_vma addend = 0;
memset (rel, 0, sizeof (rel));
rel[0].r_info = ELF_R_INFO (output_bfd, 0, R_MIPS_REL32);
for (g = gg->next; g->next != gg; g = g->next)
{
bfd_vma got_index = g->next->local_gotno + g->next->global_gotno
+ g->next->tls_gotno;
MIPS_ELF_PUT_WORD (output_bfd, 0, sgot->contents
+ got_index++ * MIPS_ELF_GOT_SIZE (output_bfd));
MIPS_ELF_PUT_WORD (output_bfd, MIPS_ELF_GNU_GOT1_MASK (output_bfd),
sgot->contents
+ got_index++ * MIPS_ELF_GOT_SIZE (output_bfd));
if (! bfd_link_pic (info))
continue;
for (; got_index < g->local_gotno; got_index++)
{
if (got_index >= g->assigned_low_gotno
&& got_index <= g->assigned_high_gotno)
continue;
rel[0].r_offset = rel[1].r_offset = rel[2].r_offset
= got_index * MIPS_ELF_GOT_SIZE (output_bfd);
if (!(mips_elf_create_dynamic_relocation
(output_bfd, info, rel, NULL,
bfd_abs_section_ptr,
0, &addend, sgot)))
return FALSE;
BFD_ASSERT (addend == 0);
}
}
}
/* The generation of dynamic relocations for the non-primary gots
adds more dynamic relocations. We cannot count them until
here. */
if (elf_hash_table (info)->dynamic_sections_created)
{
bfd_byte *b;
bfd_boolean swap_out_p;
BFD_ASSERT (sdyn != NULL);
for (b = sdyn->contents;
b < sdyn->contents + sdyn->size;
b += MIPS_ELF_DYN_SIZE (dynobj))
{
Elf_Internal_Dyn dyn;
asection *s;
/* Read in the current dynamic entry. */
(*get_elf_backend_data (dynobj)->s->swap_dyn_in) (dynobj, b, &dyn);
/* Assume that we're going to modify it and write it out. */
swap_out_p = TRUE;
switch (dyn.d_tag)
{
case DT_RELSZ:
/* Reduce DT_RELSZ to account for any relocations we
decided not to make. This is for the n64 irix rld,
which doesn't seem to apply any relocations if there
are trailing null entries. */
s = mips_elf_rel_dyn_section (info, FALSE);
dyn.d_un.d_val = (s->reloc_count
* (ABI_64_P (output_bfd)
? sizeof (Elf64_Mips_External_Rel)
: sizeof (Elf32_External_Rel)));
/* Adjust the section size too. Tools like the prelinker
can reasonably expect the values to the same. */
BFD_ASSERT (!bfd_is_abs_section (s->output_section));
elf_section_data (s->output_section)->this_hdr.sh_size
= dyn.d_un.d_val;
break;
default:
swap_out_p = FALSE;
break;
}
if (swap_out_p)
(*get_elf_backend_data (dynobj)->s->swap_dyn_out)
(dynobj, &dyn, b);
}
}
{
asection *s;
Elf32_compact_rel cpt;
if (SGI_COMPAT (output_bfd))
{
/* Write .compact_rel section out. */
s = bfd_get_linker_section (dynobj, ".compact_rel");
if (s != NULL)
{
cpt.id1 = 1;
cpt.num = s->reloc_count;
cpt.id2 = 2;
cpt.offset = (s->output_section->filepos
+ sizeof (Elf32_External_compact_rel));
cpt.reserved0 = 0;
cpt.reserved1 = 0;
bfd_elf32_swap_compact_rel_out (output_bfd, &cpt,
((Elf32_External_compact_rel *)
s->contents));
/* Clean up a dummy stub function entry in .text. */
if (htab->sstubs != NULL
&& htab->sstubs->contents != NULL)
{
file_ptr dummy_offset;
BFD_ASSERT (htab->sstubs->size >= htab->function_stub_size);
dummy_offset = htab->sstubs->size - htab->function_stub_size;
memset (htab->sstubs->contents + dummy_offset, 0,
htab->function_stub_size);
}
}
}
/* The psABI says that the dynamic relocations must be sorted in
increasing order of r_symndx. The VxWorks EABI doesn't require
this, and because the code below handles REL rather than RELA
relocations, using it for VxWorks would be outright harmful. */
if (htab->root.target_os != is_vxworks)
{
s = mips_elf_rel_dyn_section (info, FALSE);
if (s != NULL
&& s->size > (bfd_vma)2 * MIPS_ELF_REL_SIZE (output_bfd))
{
reldyn_sorting_bfd = output_bfd;
if (ABI_64_P (output_bfd))
qsort ((Elf64_External_Rel *) s->contents + 1,
s->reloc_count - 1, sizeof (Elf64_Mips_External_Rel),
sort_dynamic_relocs_64);
else
qsort ((Elf32_External_Rel *) s->contents + 1,
s->reloc_count - 1, sizeof (Elf32_External_Rel),
sort_dynamic_relocs);
}
}
}
if (htab->root.splt && htab->root.splt->size > 0)
{
if (htab->root.target_os == is_vxworks)
{
if (bfd_link_pic (info))
mips_vxworks_finish_shared_plt (output_bfd, info);
else
mips_vxworks_finish_exec_plt (output_bfd, info);
}
else
{
BFD_ASSERT (!bfd_link_pic (info));
if (!mips_finish_exec_plt (output_bfd, info))
return FALSE;
}
}
return TRUE;
}
/* Set ABFD's EF_MIPS_ARCH and EF_MIPS_MACH flags. */
static void
mips_set_isa_flags (bfd *abfd)
{
flagword val;
switch (bfd_get_mach (abfd))
{
default:
if (ABI_N32_P (abfd) || ABI_64_P (abfd))
val = E_MIPS_ARCH_3;
else
val = E_MIPS_ARCH_1;
break;
case bfd_mach_mips3000:
val = E_MIPS_ARCH_1;
break;
case bfd_mach_mips3900:
val = E_MIPS_ARCH_1 | E_MIPS_MACH_3900;
break;
case bfd_mach_mips6000:
val = E_MIPS_ARCH_2;
break;
case bfd_mach_mips4010:
val = E_MIPS_ARCH_2 | E_MIPS_MACH_4010;
break;
case bfd_mach_mips4000:
case bfd_mach_mips4300:
case bfd_mach_mips4400:
case bfd_mach_mips4600:
val = E_MIPS_ARCH_3;
break;
case bfd_mach_mips4100:
val = E_MIPS_ARCH_3 | E_MIPS_MACH_4100;
break;
case bfd_mach_mips4111:
val = E_MIPS_ARCH_3 | E_MIPS_MACH_4111;
break;
case bfd_mach_mips4120:
val = E_MIPS_ARCH_3 | E_MIPS_MACH_4120;
break;
case bfd_mach_mips4650:
val = E_MIPS_ARCH_3 | E_MIPS_MACH_4650;
break;
case bfd_mach_mips5400:
val = E_MIPS_ARCH_4 | E_MIPS_MACH_5400;
break;
case bfd_mach_mips5500:
val = E_MIPS_ARCH_4 | E_MIPS_MACH_5500;
break;
case bfd_mach_mips5900:
val = E_MIPS_ARCH_3 | E_MIPS_MACH_5900;
break;
case bfd_mach_mips9000:
val = E_MIPS_ARCH_4 | E_MIPS_MACH_9000;
break;
case bfd_mach_mips5000:
case bfd_mach_mips7000:
case bfd_mach_mips8000:
case bfd_mach_mips10000:
case bfd_mach_mips12000:
case bfd_mach_mips14000:
case bfd_mach_mips16000:
val = E_MIPS_ARCH_4;
break;
case bfd_mach_mips5:
val = E_MIPS_ARCH_5;
break;
case bfd_mach_mips_loongson_2e:
val = E_MIPS_ARCH_3 | E_MIPS_MACH_LS2E;
break;
case bfd_mach_mips_loongson_2f:
val = E_MIPS_ARCH_3 | E_MIPS_MACH_LS2F;
break;
case bfd_mach_mips_sb1:
val = E_MIPS_ARCH_64 | E_MIPS_MACH_SB1;
break;
case bfd_mach_mips_gs464:
val = E_MIPS_ARCH_64R2 | E_MIPS_MACH_GS464;
break;
case bfd_mach_mips_gs464e:
val = E_MIPS_ARCH_64R2 | E_MIPS_MACH_GS464E;
break;
case bfd_mach_mips_gs264e:
val = E_MIPS_ARCH_64R2 | E_MIPS_MACH_GS264E;
break;
case bfd_mach_mips_octeon:
case bfd_mach_mips_octeonp:
val = E_MIPS_ARCH_64R2 | E_MIPS_MACH_OCTEON;
break;
case bfd_mach_mips_octeon3:
val = E_MIPS_ARCH_64R2 | E_MIPS_MACH_OCTEON3;
break;
case bfd_mach_mips_xlr:
val = E_MIPS_ARCH_64 | E_MIPS_MACH_XLR;
break;
case bfd_mach_mips_octeon2:
val = E_MIPS_ARCH_64R2 | E_MIPS_MACH_OCTEON2;
break;
case bfd_mach_mipsisa32:
val = E_MIPS_ARCH_32;
break;
case bfd_mach_mipsisa64:
val = E_MIPS_ARCH_64;
break;
case bfd_mach_mipsisa32r2:
case bfd_mach_mipsisa32r3:
case bfd_mach_mipsisa32r5:
val = E_MIPS_ARCH_32R2;
break;
case bfd_mach_mips_interaptiv_mr2:
val = E_MIPS_ARCH_32R2 | E_MIPS_MACH_IAMR2;
break;
case bfd_mach_mipsisa64r2:
case bfd_mach_mipsisa64r3:
case bfd_mach_mipsisa64r5:
val = E_MIPS_ARCH_64R2;
break;
case bfd_mach_mipsisa32r6:
val = E_MIPS_ARCH_32R6;
break;
case bfd_mach_mipsisa64r6:
val = E_MIPS_ARCH_64R6;
break;
}
elf_elfheader (abfd)->e_flags &= ~(EF_MIPS_ARCH | EF_MIPS_MACH);
elf_elfheader (abfd)->e_flags |= val;
}
/* Whether to sort relocs output by ld -r or ld --emit-relocs, by r_offset.
Don't do so for code sections. We want to keep ordering of HI16/LO16
as is. On the other hand, elf-eh-frame.c processing requires .eh_frame
relocs to be sorted. */
bfd_boolean
_bfd_mips_elf_sort_relocs_p (asection *sec)
{
return (sec->flags & SEC_CODE) == 0;
}
/* The final processing done just before writing out a MIPS ELF object
file. This gets the MIPS architecture right based on the machine
number. This is used by both the 32-bit and the 64-bit ABI. */
void
_bfd_mips_final_write_processing (bfd *abfd)
{
unsigned int i;
Elf_Internal_Shdr **hdrpp;
const char *name;
asection *sec;
/* Keep the existing EF_MIPS_MACH and EF_MIPS_ARCH flags if the former
is nonzero. This is for compatibility with old objects, which used
a combination of a 32-bit EF_MIPS_ARCH and a 64-bit EF_MIPS_MACH. */
if ((elf_elfheader (abfd)->e_flags & EF_MIPS_MACH) == 0)
mips_set_isa_flags (abfd);
/* Set the sh_info field for .gptab sections and other appropriate
info for each special section. */
for (i = 1, hdrpp = elf_elfsections (abfd) + 1;
i < elf_numsections (abfd);
i++, hdrpp++)
{
switch ((*hdrpp)->sh_type)
{
case SHT_MIPS_MSYM:
case SHT_MIPS_LIBLIST:
sec = bfd_get_section_by_name (abfd, ".dynstr");
if (sec != NULL)
(*hdrpp)->sh_link = elf_section_data (sec)->this_idx;
break;
case SHT_MIPS_GPTAB:
BFD_ASSERT ((*hdrpp)->bfd_section != NULL);
name = bfd_section_name ((*hdrpp)->bfd_section);
BFD_ASSERT (name != NULL
&& startswith (name, ".gptab."));
sec = bfd_get_section_by_name (abfd, name + sizeof ".gptab" - 1);
BFD_ASSERT (sec != NULL);
(*hdrpp)->sh_info = elf_section_data (sec)->this_idx;
break;
case SHT_MIPS_CONTENT:
BFD_ASSERT ((*hdrpp)->bfd_section != NULL);
name = bfd_section_name ((*hdrpp)->bfd_section);
BFD_ASSERT (name != NULL
&& startswith (name, ".MIPS.content"));
sec = bfd_get_section_by_name (abfd,
name + sizeof ".MIPS.content" - 1);
BFD_ASSERT (sec != NULL);
(*hdrpp)->sh_link = elf_section_data (sec)->this_idx;
break;
case SHT_MIPS_SYMBOL_LIB:
sec = bfd_get_section_by_name (abfd, ".dynsym");
if (sec != NULL)
(*hdrpp)->sh_link = elf_section_data (sec)->this_idx;
sec = bfd_get_section_by_name (abfd, ".liblist");
if (sec != NULL)
(*hdrpp)->sh_info = elf_section_data (sec)->this_idx;
break;
case SHT_MIPS_EVENTS:
BFD_ASSERT ((*hdrpp)->bfd_section != NULL);
name = bfd_section_name ((*hdrpp)->bfd_section);
BFD_ASSERT (name != NULL);
if (startswith (name, ".MIPS.events"))
sec = bfd_get_section_by_name (abfd,
name + sizeof ".MIPS.events" - 1);
else
{
BFD_ASSERT (startswith (name, ".MIPS.post_rel"));
sec = bfd_get_section_by_name (abfd,
(name
+ sizeof ".MIPS.post_rel" - 1));
}
BFD_ASSERT (sec != NULL);
(*hdrpp)->sh_link = elf_section_data (sec)->this_idx;
break;
case SHT_MIPS_XHASH:
sec = bfd_get_section_by_name (abfd, ".dynsym");
if (sec != NULL)
(*hdrpp)->sh_link = elf_section_data (sec)->this_idx;
}
}
}
bfd_boolean
_bfd_mips_elf_final_write_processing (bfd *abfd)
{
_bfd_mips_final_write_processing (abfd);
return _bfd_elf_final_write_processing (abfd);
}
/* When creating an IRIX5 executable, we need REGINFO and RTPROC
segments. */
int
_bfd_mips_elf_additional_program_headers (bfd *abfd,
struct bfd_link_info *info ATTRIBUTE_UNUSED)
{
asection *s;
int ret = 0;
/* See if we need a PT_MIPS_REGINFO segment. */
s = bfd_get_section_by_name (abfd, ".reginfo");
if (s && (s->flags & SEC_LOAD))
++ret;
/* See if we need a PT_MIPS_ABIFLAGS segment. */
if (bfd_get_section_by_name (abfd, ".MIPS.abiflags"))
++ret;
/* See if we need a PT_MIPS_OPTIONS segment. */
if (IRIX_COMPAT (abfd) == ict_irix6
&& bfd_get_section_by_name (abfd,
MIPS_ELF_OPTIONS_SECTION_NAME (abfd)))
++ret;
/* See if we need a PT_MIPS_RTPROC segment. */
if (IRIX_COMPAT (abfd) == ict_irix5
&& bfd_get_section_by_name (abfd, ".dynamic")
&& bfd_get_section_by_name (abfd, ".mdebug"))
++ret;
/* Allocate a PT_NULL header in dynamic objects. See
_bfd_mips_elf_modify_segment_map for details. */
if (!SGI_COMPAT (abfd)
&& bfd_get_section_by_name (abfd, ".dynamic"))
++ret;
return ret;
}
/* Modify the segment map for an IRIX5 executable. */
bfd_boolean
_bfd_mips_elf_modify_segment_map (bfd *abfd,
struct bfd_link_info *info)
{
asection *s;
struct elf_segment_map *m, **pm;
size_t amt;
/* If there is a .reginfo section, we need a PT_MIPS_REGINFO
segment. */
s = bfd_get_section_by_name (abfd, ".reginfo");
if (s != NULL && (s->flags & SEC_LOAD) != 0)
{
for (m = elf_seg_map (abfd); m != NULL; m = m->next)
if (m->p_type == PT_MIPS_REGINFO)
break;
if (m == NULL)
{
amt = sizeof *m;
m = bfd_zalloc (abfd, amt);
if (m == NULL)
return FALSE;
m->p_type = PT_MIPS_REGINFO;
m->count = 1;
m->sections[0] = s;
/* We want to put it after the PHDR and INTERP segments. */
pm = &elf_seg_map (abfd);
while (*pm != NULL
&& ((*pm)->p_type == PT_PHDR
|| (*pm)->p_type == PT_INTERP))
pm = &(*pm)->next;
m->next = *pm;
*pm = m;
}
}
/* If there is a .MIPS.abiflags section, we need a PT_MIPS_ABIFLAGS
segment. */
s = bfd_get_section_by_name (abfd, ".MIPS.abiflags");
if (s != NULL && (s->flags & SEC_LOAD) != 0)
{
for (m = elf_seg_map (abfd); m != NULL; m = m->next)
if (m->p_type == PT_MIPS_ABIFLAGS)
break;
if (m == NULL)
{
amt = sizeof *m;
m = bfd_zalloc (abfd, amt);
if (m == NULL)
return FALSE;
m->p_type = PT_MIPS_ABIFLAGS;
m->count = 1;
m->sections[0] = s;
/* We want to put it after the PHDR and INTERP segments. */
pm = &elf_seg_map (abfd);
while (*pm != NULL
&& ((*pm)->p_type == PT_PHDR
|| (*pm)->p_type == PT_INTERP))
pm = &(*pm)->next;
m->next = *pm;
*pm = m;
}
}
/* For IRIX 6, we don't have .mdebug sections, nor does anything but
.dynamic end up in PT_DYNAMIC. However, we do have to insert a
PT_MIPS_OPTIONS segment immediately following the program header
table. */
if (NEWABI_P (abfd)
/* On non-IRIX6 new abi, we'll have already created a segment
for this section, so don't create another. I'm not sure this
is not also the case for IRIX 6, but I can't test it right
now. */
&& IRIX_COMPAT (abfd) == ict_irix6)
{
for (s = abfd->sections; s; s = s->next)
if (elf_section_data (s)->this_hdr.sh_type == SHT_MIPS_OPTIONS)
break;
if (s)
{
struct elf_segment_map *options_segment;
pm = &elf_seg_map (abfd);
while (*pm != NULL
&& ((*pm)->p_type == PT_PHDR
|| (*pm)->p_type == PT_INTERP))
pm = &(*pm)->next;
if (*pm == NULL || (*pm)->p_type != PT_MIPS_OPTIONS)
{
amt = sizeof (struct elf_segment_map);
options_segment = bfd_zalloc (abfd, amt);
options_segment->next = *pm;
options_segment->p_type = PT_MIPS_OPTIONS;
options_segment->p_flags = PF_R;
options_segment->p_flags_valid = TRUE;
options_segment->count = 1;
options_segment->sections[0] = s;
*pm = options_segment;
}
}
}
else
{
if (IRIX_COMPAT (abfd) == ict_irix5)
{
/* If there are .dynamic and .mdebug sections, we make a room
for the RTPROC header. FIXME: Rewrite without section names. */
if (bfd_get_section_by_name (abfd, ".interp") == NULL
&& bfd_get_section_by_name (abfd, ".dynamic") != NULL
&& bfd_get_section_by_name (abfd, ".mdebug") != NULL)
{
for (m = elf_seg_map (abfd); m != NULL; m = m->next)
if (m->p_type == PT_MIPS_RTPROC)
break;
if (m == NULL)
{
amt = sizeof *m;
m = bfd_zalloc (abfd, amt);
if (m == NULL)
return FALSE;
m->p_type = PT_MIPS_RTPROC;
s = bfd_get_section_by_name (abfd, ".rtproc");
if (s == NULL)
{
m->count = 0;
m->p_flags = 0;
m->p_flags_valid = 1;
}
else
{
m->count = 1;
m->sections[0] = s;
}
/* We want to put it after the DYNAMIC segment. */
pm = &elf_seg_map (abfd);
while (*pm != NULL && (*pm)->p_type != PT_DYNAMIC)
pm = &(*pm)->next;
if (*pm != NULL)
pm = &(*pm)->next;
m->next = *pm;
*pm = m;
}
}
}
/* On IRIX5, the PT_DYNAMIC segment includes the .dynamic,
.dynstr, .dynsym, and .hash sections, and everything in
between. */
for (pm = &elf_seg_map (abfd); *pm != NULL;
pm = &(*pm)->next)
if ((*pm)->p_type == PT_DYNAMIC)
break;
m = *pm;
/* GNU/Linux binaries do not need the extended PT_DYNAMIC section.
glibc's dynamic linker has traditionally derived the number of
tags from the p_filesz field, and sometimes allocates stack
arrays of that size. An overly-big PT_DYNAMIC segment can
be actively harmful in such cases. Making PT_DYNAMIC contain
other sections can also make life hard for the prelinker,
which might move one of the other sections to a different
PT_LOAD segment. */
if (SGI_COMPAT (abfd)
&& m != NULL
&& m->count == 1
&& strcmp (m->sections[0]->name, ".dynamic") == 0)
{
static const char *sec_names[] =
{
".dynamic", ".dynstr", ".dynsym", ".hash"
};
bfd_vma low, high;
unsigned int i, c;
struct elf_segment_map *n;
low = ~(bfd_vma) 0;
high = 0;
for (i = 0; i < sizeof sec_names / sizeof sec_names[0]; i++)
{
s = bfd_get_section_by_name (abfd, sec_names[i]);
if (s != NULL && (s->flags & SEC_LOAD) != 0)
{
bfd_size_type sz;
if (low > s->vma)
low = s->vma;
sz = s->size;
if (high < s->vma + sz)
high = s->vma + sz;
}
}
c = 0;
for (s = abfd->sections; s != NULL; s = s->next)
if ((s->flags & SEC_LOAD) != 0
&& s->vma >= low
&& s->vma + s->size <= high)
++c;
amt = sizeof *n - sizeof (asection *) + c * sizeof (asection *);
n = bfd_zalloc (abfd, amt);
if (n == NULL)
return FALSE;
*n = *m;
n->count = c;
i = 0;
for (s = abfd->sections; s != NULL; s = s->next)
{
if ((s->flags & SEC_LOAD) != 0
&& s->vma >= low
&& s->vma + s->size <= high)
{
n->sections[i] = s;
++i;
}
}
*pm = n;
}
}
/* Allocate a spare program header in dynamic objects so that tools
like the prelinker can add an extra PT_LOAD entry.
If the prelinker needs to make room for a new PT_LOAD entry, its
standard procedure is to move the first (read-only) sections into
the new (writable) segment. However, the MIPS ABI requires
.dynamic to be in a read-only segment, and the section will often
start within sizeof (ElfNN_Phdr) bytes of the last program header.
Although the prelinker could in principle move .dynamic to a
writable segment, it seems better to allocate a spare program
header instead, and avoid the need to move any sections.
There is a long tradition of allocating spare dynamic tags,
so allocating a spare program header seems like a natural
extension.
If INFO is NULL, we may be copying an already prelinked binary
with objcopy or strip, so do not add this header. */
if (info != NULL
&& !SGI_COMPAT (abfd)
&& bfd_get_section_by_name (abfd, ".dynamic"))
{
for (pm = &elf_seg_map (abfd); *pm != NULL; pm = &(*pm)->next)
if ((*pm)->p_type == PT_NULL)
break;
if (*pm == NULL)
{
m = bfd_zalloc (abfd, sizeof (*m));
if (m == NULL)
return FALSE;
m->p_type = PT_NULL;
*pm = m;
}
}
return TRUE;
}
/* Return the section that should be marked against GC for a given
relocation. */
asection *
_bfd_mips_elf_gc_mark_hook (asection *sec,
struct bfd_link_info *info,
Elf_Internal_Rela *rel,
struct elf_link_hash_entry *h,
Elf_Internal_Sym *sym)
{
/* ??? Do mips16 stub sections need to be handled special? */
if (h != NULL)
switch (ELF_R_TYPE (sec->owner, rel->r_info))
{
case R_MIPS_GNU_VTINHERIT:
case R_MIPS_GNU_VTENTRY:
return NULL;
}
return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
}
/* Prevent .MIPS.abiflags from being discarded with --gc-sections. */
bfd_boolean
_bfd_mips_elf_gc_mark_extra_sections (struct bfd_link_info *info,
elf_gc_mark_hook_fn gc_mark_hook)
{
bfd *sub;
_bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
{
asection *o;
if (! is_mips_elf (sub))
continue;
for (o = sub->sections; o != NULL; o = o->next)
if (!o->gc_mark
&& MIPS_ELF_ABIFLAGS_SECTION_NAME_P (bfd_section_name (o)))
{
if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
return FALSE;
}
}
return TRUE;
}
/* Copy data from a MIPS ELF indirect symbol to its direct symbol,
hiding the old indirect symbol. Process additional relocation
information. Also called for weakdefs, in which case we just let
_bfd_elf_link_hash_copy_indirect copy the flags for us. */
void
_bfd_mips_elf_copy_indirect_symbol (struct bfd_link_info *info,
struct elf_link_hash_entry *dir,
struct elf_link_hash_entry *ind)
{
struct mips_elf_link_hash_entry *dirmips, *indmips;
_bfd_elf_link_hash_copy_indirect (info, dir, ind);
dirmips = (struct mips_elf_link_hash_entry *) dir;
indmips = (struct mips_elf_link_hash_entry *) ind;
/* Any absolute non-dynamic relocations against an indirect or weak
definition will be against the target symbol. */
if (indmips->has_static_relocs)
dirmips->has_static_relocs = TRUE;
if (ind->root.type != bfd_link_hash_indirect)
return;
dirmips->possibly_dynamic_relocs += indmips->possibly_dynamic_relocs;
if (indmips->readonly_reloc)
dirmips->readonly_reloc = TRUE;
if (indmips->no_fn_stub)
dirmips->no_fn_stub = TRUE;
if (indmips->fn_stub)
{
dirmips->fn_stub = indmips->fn_stub;
indmips->fn_stub = NULL;
}
if (indmips->need_fn_stub)
{
dirmips->need_fn_stub = TRUE;
indmips->need_fn_stub = FALSE;
}
if (indmips->call_stub)
{
dirmips->call_stub = indmips->call_stub;
indmips->call_stub = NULL;
}
if (indmips->call_fp_stub)
{
dirmips->call_fp_stub = indmips->call_fp_stub;
indmips->call_fp_stub = NULL;
}
if (indmips->global_got_area < dirmips->global_got_area)
dirmips->global_got_area = indmips->global_got_area;
if (indmips->global_got_area < GGA_NONE)
indmips->global_got_area = GGA_NONE;
if (indmips->has_nonpic_branches)
dirmips->has_nonpic_branches = TRUE;
}
/* Take care of the special `__gnu_absolute_zero' symbol and ignore attempts
to hide it. It has to remain global (it will also be protected) so as to
be assigned a global GOT entry, which will then remain unchanged at load
time. */
void
_bfd_mips_elf_hide_symbol (struct bfd_link_info *info,
struct elf_link_hash_entry *entry,
bfd_boolean force_local)
{
struct mips_elf_link_hash_table *htab;
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
if (htab->use_absolute_zero
&& strcmp (entry->root.root.string, "__gnu_absolute_zero") == 0)
return;
_bfd_elf_link_hash_hide_symbol (info, entry, force_local);
}
#define PDR_SIZE 32
bfd_boolean
_bfd_mips_elf_discard_info (bfd *abfd, struct elf_reloc_cookie *cookie,
struct bfd_link_info *info)
{
asection *o;
bfd_boolean ret = FALSE;
unsigned char *tdata;
size_t i, skip;
o = bfd_get_section_by_name (abfd, ".pdr");
if (! o)
return FALSE;
if (o->size == 0)
return FALSE;
if (o->size % PDR_SIZE != 0)
return FALSE;
if (o->output_section != NULL
&& bfd_is_abs_section (o->output_section))
return FALSE;
tdata = bfd_zmalloc (o->size / PDR_SIZE);
if (! tdata)
return FALSE;
cookie->rels = _bfd_elf_link_read_relocs (abfd, o, NULL, NULL,
info->keep_memory);
if (!cookie->rels)
{
free (tdata);
return FALSE;
}
cookie->rel = cookie->rels;
cookie->relend = cookie->rels + o->reloc_count;
for (i = 0, skip = 0; i < o->size / PDR_SIZE; i ++)
{
if (bfd_elf_reloc_symbol_deleted_p (i * PDR_SIZE, cookie))
{
tdata[i] = 1;
skip ++;
}
}
if (skip != 0)
{
mips_elf_section_data (o)->u.tdata = tdata;
if (o->rawsize == 0)
o->rawsize = o->size;
o->size -= skip * PDR_SIZE;
ret = TRUE;
}
else
free (tdata);
if (! info->keep_memory)
free (cookie->rels);
return ret;
}
bfd_boolean
_bfd_mips_elf_ignore_discarded_relocs (asection *sec)
{
if (strcmp (sec->name, ".pdr") == 0)
return TRUE;
return FALSE;
}
bfd_boolean
_bfd_mips_elf_write_section (bfd *output_bfd,
struct bfd_link_info *link_info ATTRIBUTE_UNUSED,
asection *sec, bfd_byte *contents)
{
bfd_byte *to, *from, *end;
int i;
if (strcmp (sec->name, ".pdr") != 0)
return FALSE;
if (mips_elf_section_data (sec)->u.tdata == NULL)
return FALSE;
to = contents;
end = contents + sec->size;
for (from = contents, i = 0;
from < end;
from += PDR_SIZE, i++)
{
if ((mips_elf_section_data (sec)->u.tdata)[i] == 1)
continue;
if (to != from)
memcpy (to, from, PDR_SIZE);
to += PDR_SIZE;
}
bfd_set_section_contents (output_bfd, sec->output_section, contents,
sec->output_offset, sec->size);
return TRUE;
}
/* microMIPS code retains local labels for linker relaxation. Omit them
from output by default for clarity. */
bfd_boolean
_bfd_mips_elf_is_target_special_symbol (bfd *abfd, asymbol *sym)
{
return _bfd_elf_is_local_label_name (abfd, sym->name);
}
/* MIPS ELF uses a special find_nearest_line routine in order the
handle the ECOFF debugging information. */
struct mips_elf_find_line
{
struct ecoff_debug_info d;
struct ecoff_find_line i;
};
bfd_boolean
_bfd_mips_elf_find_nearest_line (bfd *abfd, asymbol **symbols,
asection *section, bfd_vma offset,
const char **filename_ptr,
const char **functionname_ptr,
unsigned int *line_ptr,
unsigned int *discriminator_ptr)
{
asection *msec;
if (_bfd_dwarf2_find_nearest_line (abfd, symbols, NULL, section, offset,
filename_ptr, functionname_ptr,
line_ptr, discriminator_ptr,
dwarf_debug_sections,
&elf_tdata (abfd)->dwarf2_find_line_info)
== 1)
return TRUE;
if (_bfd_dwarf1_find_nearest_line (abfd, symbols, section, offset,
filename_ptr, functionname_ptr,
line_ptr))
{
if (!*functionname_ptr)
_bfd_elf_find_function (abfd, symbols, section, offset,
*filename_ptr ? NULL : filename_ptr,
functionname_ptr);
return TRUE;
}
msec = bfd_get_section_by_name (abfd, ".mdebug");
if (msec != NULL)
{
flagword origflags;
struct mips_elf_find_line *fi;
const struct ecoff_debug_swap * const swap =
get_elf_backend_data (abfd)->elf_backend_ecoff_debug_swap;
/* If we are called during a link, mips_elf_final_link may have
cleared the SEC_HAS_CONTENTS field. We force it back on here
if appropriate (which it normally will be). */
origflags = msec->flags;
if (elf_section_data (msec)->this_hdr.sh_type != SHT_NOBITS)
msec->flags |= SEC_HAS_CONTENTS;
fi = mips_elf_tdata (abfd)->find_line_info;
if (fi == NULL)
{
bfd_size_type external_fdr_size;
char *fraw_src;
char *fraw_end;
struct fdr *fdr_ptr;
bfd_size_type amt = sizeof (struct mips_elf_find_line);
fi = bfd_zalloc (abfd, amt);
if (fi == NULL)
{
msec->flags = origflags;
return FALSE;
}
if (! _bfd_mips_elf_read_ecoff_info (abfd, msec, &fi->d))
{
msec->flags = origflags;
return FALSE;
}
/* Swap in the FDR information. */
amt = fi->d.symbolic_header.ifdMax * sizeof (struct fdr);
fi->d.fdr = bfd_alloc (abfd, amt);
if (fi->d.fdr == NULL)
{
msec->flags = origflags;
return FALSE;
}
external_fdr_size = swap->external_fdr_size;
fdr_ptr = fi->d.fdr;
fraw_src = (char *) fi->d.external_fdr;
fraw_end = (fraw_src
+ fi->d.symbolic_header.ifdMax * external_fdr_size);
for (; fraw_src < fraw_end; fraw_src += external_fdr_size, fdr_ptr++)
(*swap->swap_fdr_in) (abfd, fraw_src, fdr_ptr);
mips_elf_tdata (abfd)->find_line_info = fi;
/* Note that we don't bother to ever free this information.
find_nearest_line is either called all the time, as in
objdump -l, so the information should be saved, or it is
rarely called, as in ld error messages, so the memory
wasted is unimportant. Still, it would probably be a
good idea for free_cached_info to throw it away. */
}
if (_bfd_ecoff_locate_line (abfd, section, offset, &fi->d, swap,
&fi->i, filename_ptr, functionname_ptr,
line_ptr))
{
msec->flags = origflags;
return TRUE;
}
msec->flags = origflags;
}
/* Fall back on the generic ELF find_nearest_line routine. */
return _bfd_elf_find_nearest_line (abfd, symbols, section, offset,
filename_ptr, functionname_ptr,
line_ptr, discriminator_ptr);
}
bfd_boolean
_bfd_mips_elf_find_inliner_info (bfd *abfd,
const char **filename_ptr,
const char **functionname_ptr,
unsigned int *line_ptr)
{
bfd_boolean found;
found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
functionname_ptr, line_ptr,
& elf_tdata (abfd)->dwarf2_find_line_info);
return found;
}
/* When are writing out the .options or .MIPS.options section,
remember the bytes we are writing out, so that we can install the
GP value in the section_processing routine. */
bfd_boolean
_bfd_mips_elf_set_section_contents (bfd *abfd, sec_ptr section,
const void *location,
file_ptr offset, bfd_size_type count)
{
if (MIPS_ELF_OPTIONS_SECTION_NAME_P (section->name))
{
bfd_byte *c;
if (elf_section_data (section) == NULL)
{
size_t amt = sizeof (struct bfd_elf_section_data);
section->used_by_bfd = bfd_zalloc (abfd, amt);
if (elf_section_data (section) == NULL)
return FALSE;
}
c = mips_elf_section_data (section)->u.tdata;
if (c == NULL)
{
c = bfd_zalloc (abfd, section->size);
if (c == NULL)
return FALSE;
mips_elf_section_data (section)->u.tdata = c;
}
memcpy (c + offset, location, count);
}
return _bfd_elf_set_section_contents (abfd, section, location, offset,
count);
}
/* This is almost identical to bfd_generic_get_... except that some
MIPS relocations need to be handled specially. Sigh. */
bfd_byte *
_bfd_elf_mips_get_relocated_section_contents
(bfd *abfd,
struct bfd_link_info *link_info,
struct bfd_link_order *link_order,
bfd_byte *data,
bfd_boolean relocatable,
asymbol **symbols)
{
bfd *input_bfd = link_order->u.indirect.section->owner;
asection *input_section = link_order->u.indirect.section;
long reloc_size;
arelent **reloc_vector;
long reloc_count;
reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section);
if (reloc_size < 0)
return NULL;
/* Read in the section. */
if (!bfd_get_full_section_contents (input_bfd, input_section, &data))
return NULL;
if (data == NULL)
return NULL;
if (reloc_size == 0)
return data;
reloc_vector = (arelent **) bfd_malloc (reloc_size);
if (reloc_vector == NULL)
return NULL;
reloc_count = bfd_canonicalize_reloc (input_bfd,
input_section,
reloc_vector,
symbols);
if (reloc_count < 0)
goto error_return;
if (reloc_count > 0)
{
arelent **parent;
/* for mips */
int gp_found;
bfd_vma gp = 0x12345678; /* initialize just to shut gcc up */
{
struct bfd_hash_entry *h;
struct bfd_link_hash_entry *lh;
/* Skip all this stuff if we aren't mixing formats. */
if (abfd && input_bfd
&& abfd->xvec == input_bfd->xvec)
lh = 0;
else
{
h = bfd_hash_lookup (&link_info->hash->table, "_gp", FALSE, FALSE);
lh = (struct bfd_link_hash_entry *) h;
}
lookup:
if (lh)
{
switch (lh->type)
{
case bfd_link_hash_undefined:
case bfd_link_hash_undefweak:
case bfd_link_hash_common:
gp_found = 0;
break;
case bfd_link_hash_defined:
case bfd_link_hash_defweak:
gp_found = 1;
gp = lh->u.def.value;
break;
case bfd_link_hash_indirect:
case bfd_link_hash_warning:
lh = lh->u.i.link;
/* @@FIXME ignoring warning for now */
goto lookup;
case bfd_link_hash_new:
default:
abort ();
}
}
else
gp_found = 0;
}
/* end mips */
for (parent = reloc_vector; *parent != NULL; parent++)
{
char *error_message = NULL;
asymbol *symbol;
bfd_reloc_status_type r;
symbol = *(*parent)->sym_ptr_ptr;
/* PR ld/19628: A specially crafted input file
can result in a NULL symbol pointer here. */
if (symbol == NULL)
{
link_info->callbacks->einfo
/* xgettext:c-format */
(_("%X%P: %pB(%pA): error: relocation for offset %V has no value\n"),
abfd, input_section, (* parent)->address);
goto error_return;
}
/* Zap reloc field when the symbol is from a discarded
section, ignoring any addend. Do the same when called
from bfd_simple_get_relocated_section_contents for
undefined symbols in debug sections. This is to keep
debug info reasonably sane, in particular so that
DW_FORM_ref_addr to another file's .debug_info isn't
confused with an offset into the current file's
.debug_info. */
if ((symbol->section != NULL && discarded_section (symbol->section))
|| (symbol->section == bfd_und_section_ptr
&& (input_section->flags & SEC_DEBUGGING) != 0
&& link_info->input_bfds == link_info->output_bfd))
{
bfd_vma off;
static reloc_howto_type none_howto
= HOWTO (0, 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL,
"unused", FALSE, 0, 0, FALSE);
off = ((*parent)->address
* bfd_octets_per_byte (input_bfd, input_section));
_bfd_clear_contents ((*parent)->howto, input_bfd,
input_section, data, off);
(*parent)->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
(*parent)->addend = 0;
(*parent)->howto = &none_howto;
r = bfd_reloc_ok;
}
/* Specific to MIPS: Deal with relocation types that require
knowing the gp of the output bfd. */
/* If we've managed to find the gp and have a special
function for the relocation then go ahead, else default
to the generic handling. */
else if (gp_found
&& ((*parent)->howto->special_function
== _bfd_mips_elf32_gprel16_reloc))
r = _bfd_mips_elf_gprel16_with_gp (input_bfd, symbol, *parent,
input_section, relocatable,
data, gp);
else
r = bfd_perform_relocation (input_bfd,
*parent,
data,
input_section,
relocatable ? abfd : NULL,
&error_message);
if (relocatable)
{
asection *os = input_section->output_section;
/* A partial link, so keep the relocs. */
os->orelocation[os->reloc_count] = *parent;
os->reloc_count++;
}
if (r != bfd_reloc_ok)
{
switch (r)
{
case bfd_reloc_undefined:
(*link_info->callbacks->undefined_symbol)
(link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
input_bfd, input_section, (*parent)->address, TRUE);
break;
case bfd_reloc_dangerous:
BFD_ASSERT (error_message != NULL);
(*link_info->callbacks->reloc_dangerous)
(link_info, error_message,
input_bfd, input_section, (*parent)->address);
break;
case bfd_reloc_overflow:
(*link_info->callbacks->reloc_overflow)
(link_info, NULL,
bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
(*parent)->howto->name, (*parent)->addend,
input_bfd, input_section, (*parent)->address);
break;
case bfd_reloc_outofrange:
/* PR ld/13730:
This error can result when processing some partially
complete binaries. Do not abort, but issue an error
message instead. */
link_info->callbacks->einfo
/* xgettext:c-format */
(_("%X%P: %pB(%pA): relocation \"%pR\" goes out of range\n"),
abfd, input_section, * parent);
goto error_return;
case bfd_reloc_notsupported:
/* PR ld/17512
This error can result when processing a corrupt binary.
Do not abort. Issue an error message instead. */
link_info->callbacks->einfo
/* xgettext:c-format */
(_("%X%P: %pB(%pA): relocation \"%pR\" is not supported\n"),
abfd, input_section, * parent);
goto error_return;
default:
/* PR 17512; file: 90c2a92e.
Report unexpected results, without aborting. */
link_info->callbacks->einfo
/* xgettext:c-format */
(_("%X%P: %pB(%pA): relocation \"%pR\" returns an unrecognized value %x\n"),
abfd, input_section, * parent, r);
break;
}
}
}
}
free (reloc_vector);
return data;
error_return:
free (reloc_vector);
return NULL;
}
static bfd_boolean
mips_elf_relax_delete_bytes (bfd *abfd,
asection *sec, bfd_vma addr, int count)
{
Elf_Internal_Shdr *symtab_hdr;
unsigned int sec_shndx;
bfd_byte *contents;
Elf_Internal_Rela *irel, *irelend;
Elf_Internal_Sym *isym;
Elf_Internal_Sym *isymend;
struct elf_link_hash_entry **sym_hashes;
struct elf_link_hash_entry **end_hashes;
struct elf_link_hash_entry **start_hashes;
unsigned int symcount;
sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
contents = elf_section_data (sec)->this_hdr.contents;
irel = elf_section_data (sec)->relocs;
irelend = irel + sec->reloc_count;
/* Actually delete the bytes. */
memmove (contents + addr, contents + addr + count,
(size_t) (sec->size - addr - count));
sec->size -= count;
/* Adjust all the relocs. */
for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
{
/* Get the new reloc address. */
if (irel->r_offset > addr)
irel->r_offset -= count;
}
BFD_ASSERT (addr % 2 == 0);
BFD_ASSERT (count % 2 == 0);
/* Adjust the local symbols defined in this section. */
symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
isym = (Elf_Internal_Sym *) symtab_hdr->contents;
for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
if (isym->st_shndx == sec_shndx && isym->st_value > addr)
isym->st_value -= count;
/* Now adjust the global symbols defined in this section. */
symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
- symtab_hdr->sh_info);
sym_hashes = start_hashes = elf_sym_hashes (abfd);
end_hashes = sym_hashes + symcount;
for (; sym_hashes < end_hashes; sym_hashes++)
{
struct elf_link_hash_entry *sym_hash = *sym_hashes;
if ((sym_hash->root.type == bfd_link_hash_defined
|| sym_hash->root.type == bfd_link_hash_defweak)
&& sym_hash->root.u.def.section == sec)
{
bfd_vma value = sym_hash->root.u.def.value;
if (ELF_ST_IS_MICROMIPS (sym_hash->other))
value &= MINUS_TWO;
if (value > addr)
sym_hash->root.u.def.value -= count;
}
}
return TRUE;
}
/* Opcodes needed for microMIPS relaxation as found in
opcodes/micromips-opc.c. */
struct opcode_descriptor {
unsigned long match;
unsigned long mask;
};
/* The $ra register aka $31. */
#define RA 31
/* 32-bit instruction format register fields. */
#define OP32_SREG(opcode) (((opcode) >> 16) & 0x1f)
#define OP32_TREG(opcode) (((opcode) >> 21) & 0x1f)
/* Check if a 5-bit register index can be abbreviated to 3 bits. */
#define OP16_VALID_REG(r) \
((2 <= (r) && (r) <= 7) || (16 <= (r) && (r) <= 17))
/* 32-bit and 16-bit branches. */
static const struct opcode_descriptor b_insns_32[] = {
{ /* "b", "p", */ 0x40400000, 0xffff0000 }, /* bgez 0 */
{ /* "b", "p", */ 0x94000000, 0xffff0000 }, /* beq 0, 0 */
{ 0, 0 } /* End marker for find_match(). */
};
static const struct opcode_descriptor bc_insn_32 =
{ /* "bc(1|2)(ft)", "N,p", */ 0x42800000, 0xfec30000 };
static const struct opcode_descriptor bz_insn_32 =
{ /* "b(g|l)(e|t)z", "s,p", */ 0x40000000, 0xff200000 };
static const struct opcode_descriptor bzal_insn_32 =
{ /* "b(ge|lt)zal", "s,p", */ 0x40200000, 0xffa00000 };
static const struct opcode_descriptor beq_insn_32 =
{ /* "b(eq|ne)", "s,t,p", */ 0x94000000, 0xdc000000 };
static const struct opcode_descriptor b_insn_16 =
{ /* "b", "mD", */ 0xcc00, 0xfc00 };
static const struct opcode_descriptor bz_insn_16 =
{ /* "b(eq|ne)z", "md,mE", */ 0x8c00, 0xdc00 };
/* 32-bit and 16-bit branch EQ and NE zero. */
/* NOTE: All opcode tables have BEQ/BNE in the same order: first the
eq and second the ne. This convention is used when replacing a
32-bit BEQ/BNE with the 16-bit version. */
#define BZC32_REG_FIELD(r) (((r) & 0x1f) << 16)
static const struct opcode_descriptor bz_rs_insns_32[] = {
{ /* "beqz", "s,p", */ 0x94000000, 0xffe00000 },
{ /* "bnez", "s,p", */ 0xb4000000, 0xffe00000 },
{ 0, 0 } /* End marker for find_match(). */
};
static const struct opcode_descriptor bz_rt_insns_32[] = {
{ /* "beqz", "t,p", */ 0x94000000, 0xfc01f000 },
{ /* "bnez", "t,p", */ 0xb4000000, 0xfc01f000 },
{ 0, 0 } /* End marker for find_match(). */
};
static const struct opcode_descriptor bzc_insns_32[] = {
{ /* "beqzc", "s,p", */ 0x40e00000, 0xffe00000 },
{ /* "bnezc", "s,p", */ 0x40a00000, 0xffe00000 },
{ 0, 0 } /* End marker for find_match(). */
};
static const struct opcode_descriptor bz_insns_16[] = {
{ /* "beqz", "md,mE", */ 0x8c00, 0xfc00 },
{ /* "bnez", "md,mE", */ 0xac00, 0xfc00 },
{ 0, 0 } /* End marker for find_match(). */
};
/* Switch between a 5-bit register index and its 3-bit shorthand. */
#define BZ16_REG(opcode) ((((((opcode) >> 7) & 7) + 0x1e) & 0xf) + 2)
#define BZ16_REG_FIELD(r) (((r) & 7) << 7)
/* 32-bit instructions with a delay slot. */
static const struct opcode_descriptor jal_insn_32_bd16 =
{ /* "jals", "a", */ 0x74000000, 0xfc000000 };
static const struct opcode_descriptor jal_insn_32_bd32 =
{ /* "jal", "a", */ 0xf4000000, 0xfc000000 };
static const struct opcode_descriptor jal_x_insn_32_bd32 =
{ /* "jal[x]", "a", */ 0xf0000000, 0xf8000000 };
static const struct opcode_descriptor j_insn_32 =
{ /* "j", "a", */ 0xd4000000, 0xfc000000 };
static const struct opcode_descriptor jalr_insn_32 =
{ /* "jalr[.hb]", "t,s", */ 0x00000f3c, 0xfc00efff };
/* This table can be compacted, because no opcode replacement is made. */
static const struct opcode_descriptor ds_insns_32_bd16[] = {
{ /* "jals", "a", */ 0x74000000, 0xfc000000 },
{ /* "jalrs[.hb]", "t,s", */ 0x00004f3c, 0xfc00efff },
{ /* "b(ge|lt)zals", "s,p", */ 0x42200000, 0xffa00000 },
{ /* "b(g|l)(e|t)z", "s,p", */ 0x40000000, 0xff200000 },
{ /* "b(eq|ne)", "s,t,p", */ 0x94000000, 0xdc000000 },
{ /* "j", "a", */ 0xd4000000, 0xfc000000 },
{ 0, 0 } /* End marker for find_match(). */
};
/* This table can be compacted, because no opcode replacement is made. */
static const struct opcode_descriptor ds_insns_32_bd32[] = {
{ /* "jal[x]", "a", */ 0xf0000000, 0xf8000000 },
{ /* "jalr[.hb]", "t,s", */ 0x00000f3c, 0xfc00efff },
{ /* "b(ge|lt)zal", "s,p", */ 0x40200000, 0xffa00000 },
{ 0, 0 } /* End marker for find_match(). */
};
/* 16-bit instructions with a delay slot. */
static const struct opcode_descriptor jalr_insn_16_bd16 =
{ /* "jalrs", "my,mj", */ 0x45e0, 0xffe0 };
static const struct opcode_descriptor jalr_insn_16_bd32 =
{ /* "jalr", "my,mj", */ 0x45c0, 0xffe0 };
static const struct opcode_descriptor jr_insn_16 =
{ /* "jr", "mj", */ 0x4580, 0xffe0 };
#define JR16_REG(opcode) ((opcode) & 0x1f)
/* This table can be compacted, because no opcode replacement is made. */
static const struct opcode_descriptor ds_insns_16_bd16[] = {
{ /* "jalrs", "my,mj", */ 0x45e0, 0xffe0 },
{ /* "b", "mD", */ 0xcc00, 0xfc00 },
{ /* "b(eq|ne)z", "md,mE", */ 0x8c00, 0xdc00 },
{ /* "jr", "mj", */ 0x4580, 0xffe0 },
{ 0, 0 } /* End marker for find_match(). */
};
/* LUI instruction. */
static const struct opcode_descriptor lui_insn =
{ /* "lui", "s,u", */ 0x41a00000, 0xffe00000 };
/* ADDIU instruction. */
static const struct opcode_descriptor addiu_insn =
{ /* "addiu", "t,r,j", */ 0x30000000, 0xfc000000 };
static const struct opcode_descriptor addiupc_insn =
{ /* "addiu", "mb,$pc,mQ", */ 0x78000000, 0xfc000000 };
#define ADDIUPC_REG_FIELD(r) \
(((2 <= (r) && (r) <= 7) ? (r) : ((r) - 16)) << 23)
/* Relaxable instructions in a JAL delay slot: MOVE. */
/* The 16-bit move has rd in 9:5 and rs in 4:0. The 32-bit moves
(ADDU, OR) have rd in 15:11 and rs in 10:16. */
#define MOVE32_RD(opcode) (((opcode) >> 11) & 0x1f)
#define MOVE32_RS(opcode) (((opcode) >> 16) & 0x1f)
#define MOVE16_RD_FIELD(r) (((r) & 0x1f) << 5)
#define MOVE16_RS_FIELD(r) (((r) & 0x1f) )
static const struct opcode_descriptor move_insns_32[] = {
{ /* "move", "d,s", */ 0x00000290, 0xffe007ff }, /* or d,s,$0 */
{ /* "move", "d,s", */ 0x00000150, 0xffe007ff }, /* addu d,s,$0 */
{ 0, 0 } /* End marker for find_match(). */
};
static const struct opcode_descriptor move_insn_16 =
{ /* "move", "mp,mj", */ 0x0c00, 0xfc00 };
/* NOP instructions. */
static const struct opcode_descriptor nop_insn_32 =
{ /* "nop", "", */ 0x00000000, 0xffffffff };
static const struct opcode_descriptor nop_insn_16 =
{ /* "nop", "", */ 0x0c00, 0xffff };
/* Instruction match support. */
#define MATCH(opcode, insn) ((opcode & insn.mask) == insn.match)
static int
find_match (unsigned long opcode, const struct opcode_descriptor insn[])
{
unsigned long indx;
for (indx = 0; insn[indx].mask != 0; indx++)
if (MATCH (opcode, insn[indx]))
return indx;
return -1;
}
/* Branch and delay slot decoding support. */
/* If PTR points to what *might* be a 16-bit branch or jump, then
return the minimum length of its delay slot, otherwise return 0.
Non-zero results are not definitive as we might be checking against
the second half of another instruction. */
static int
check_br16_dslot (bfd *abfd, bfd_byte *ptr)
{
unsigned long opcode;
int bdsize;
opcode = bfd_get_16 (abfd, ptr);
if (MATCH (opcode, jalr_insn_16_bd32) != 0)
/* 16-bit branch/jump with a 32-bit delay slot. */
bdsize = 4;
else if (MATCH (opcode, jalr_insn_16_bd16) != 0
|| find_match (opcode, ds_insns_16_bd16) >= 0)
/* 16-bit branch/jump with a 16-bit delay slot. */
bdsize = 2;
else
/* No delay slot. */
bdsize = 0;
return bdsize;
}
/* If PTR points to what *might* be a 32-bit branch or jump, then
return the minimum length of its delay slot, otherwise return 0.
Non-zero results are not definitive as we might be checking against
the second half of another instruction. */
static int
check_br32_dslot (bfd *abfd, bfd_byte *ptr)
{
unsigned long opcode;
int bdsize;
opcode = bfd_get_micromips_32 (abfd, ptr);
if (find_match (opcode, ds_insns_32_bd32) >= 0)
/* 32-bit branch/jump with a 32-bit delay slot. */
bdsize = 4;
else if (find_match (opcode, ds_insns_32_bd16) >= 0)
/* 32-bit branch/jump with a 16-bit delay slot. */
bdsize = 2;
else
/* No delay slot. */
bdsize = 0;
return bdsize;
}
/* If PTR points to a 16-bit branch or jump with a 32-bit delay slot
that doesn't fiddle with REG, then return TRUE, otherwise FALSE. */
static bfd_boolean
check_br16 (bfd *abfd, bfd_byte *ptr, unsigned long reg)
{
unsigned long opcode;
opcode = bfd_get_16 (abfd, ptr);
if (MATCH (opcode, b_insn_16)
/* B16 */
|| (MATCH (opcode, jr_insn_16) && reg != JR16_REG (opcode))
/* JR16 */
|| (MATCH (opcode, bz_insn_16) && reg != BZ16_REG (opcode))
/* BEQZ16, BNEZ16 */
|| (MATCH (opcode, jalr_insn_16_bd32)
/* JALR16 */
&& reg != JR16_REG (opcode) && reg != RA))
return TRUE;
return FALSE;
}
/* If PTR points to a 32-bit branch or jump that doesn't fiddle with REG,
then return TRUE, otherwise FALSE. */
static bfd_boolean
check_br32 (bfd *abfd, bfd_byte *ptr, unsigned long reg)
{
unsigned long opcode;
opcode = bfd_get_micromips_32 (abfd, ptr);
if (MATCH (opcode, j_insn_32)
/* J */
|| MATCH (opcode, bc_insn_32)
/* BC1F, BC1T, BC2F, BC2T */
|| (MATCH (opcode, jal_x_insn_32_bd32) && reg != RA)
/* JAL, JALX */
|| (MATCH (opcode, bz_insn_32) && reg != OP32_SREG (opcode))
/* BGEZ, BGTZ, BLEZ, BLTZ */
|| (MATCH (opcode, bzal_insn_32)
/* BGEZAL, BLTZAL */
&& reg != OP32_SREG (opcode) && reg != RA)
|| ((MATCH (opcode, jalr_insn_32) || MATCH (opcode, beq_insn_32))
/* JALR, JALR.HB, BEQ, BNE */
&& reg != OP32_SREG (opcode) && reg != OP32_TREG (opcode)))
return TRUE;
return FALSE;
}
/* If the instruction encoding at PTR and relocations [INTERNAL_RELOCS,
IRELEND) at OFFSET indicate that there must be a compact branch there,
then return TRUE, otherwise FALSE. */
static bfd_boolean
check_relocated_bzc (bfd *abfd, const bfd_byte *ptr, bfd_vma offset,
const Elf_Internal_Rela *internal_relocs,
const Elf_Internal_Rela *irelend)
{
const Elf_Internal_Rela *irel;
unsigned long opcode;
opcode = bfd_get_micromips_32 (abfd, ptr);
if (find_match (opcode, bzc_insns_32) < 0)
return FALSE;
for (irel = internal_relocs; irel < irelend; irel++)
if (irel->r_offset == offset
&& ELF32_R_TYPE (irel->r_info) == R_MICROMIPS_PC16_S1)
return TRUE;
return FALSE;
}
/* Bitsize checking. */
#define IS_BITSIZE(val, N) \
(((((val) & ((1ULL << (N)) - 1)) ^ (1ULL << ((N) - 1))) \
- (1ULL << ((N) - 1))) == (val))
bfd_boolean
_bfd_mips_elf_relax_section (bfd *abfd, asection *sec,
struct bfd_link_info *link_info,
bfd_boolean *again)
{
bfd_boolean insn32 = mips_elf_hash_table (link_info)->insn32;
Elf_Internal_Shdr *symtab_hdr;
Elf_Internal_Rela *internal_relocs;
Elf_Internal_Rela *irel, *irelend;
bfd_byte *contents = NULL;
Elf_Internal_Sym *isymbuf = NULL;
/* Assume nothing changes. */
*again = FALSE;
/* We don't have to do anything for a relocatable link, if
this section does not have relocs, or if this is not a
code section. */
if (bfd_link_relocatable (link_info)
|| (sec->flags & SEC_RELOC) == 0
|| sec->reloc_count == 0
|| (sec->flags & SEC_CODE) == 0)
return TRUE;
symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
/* Get a copy of the native relocations. */
internal_relocs = (_bfd_elf_link_read_relocs
(abfd, sec, NULL, (Elf_Internal_Rela *) NULL,
link_info->keep_memory));
if (internal_relocs == NULL)
goto error_return;
/* Walk through them looking for relaxing opportunities. */
irelend = internal_relocs + sec->reloc_count;
for (irel = internal_relocs; irel < irelend; irel++)
{
unsigned long r_symndx = ELF32_R_SYM (irel->r_info);
unsigned int r_type = ELF32_R_TYPE (irel->r_info);
bfd_boolean target_is_micromips_code_p;
unsigned long opcode;
bfd_vma symval;
bfd_vma pcrval;
bfd_byte *ptr;
int fndopc;
/* The number of bytes to delete for relaxation and from where
to delete these bytes starting at irel->r_offset. */
int delcnt = 0;
int deloff = 0;
/* If this isn't something that can be relaxed, then ignore
this reloc. */
if (r_type != R_MICROMIPS_HI16
&& r_type != R_MICROMIPS_PC16_S1
&& r_type != R_MICROMIPS_26_S1)
continue;
/* Get the section contents if we haven't done so already. */
if (contents == NULL)
{
/* Get cached copy if it exists. */
if (elf_section_data (sec)->this_hdr.contents != NULL)
contents = elf_section_data (sec)->this_hdr.contents;
/* Go get them off disk. */
else if (!bfd_malloc_and_get_section (abfd, sec, &contents))
goto error_return;
}
ptr = contents + irel->r_offset;
/* Read this BFD's local symbols if we haven't done so already. */
if (isymbuf == NULL && symtab_hdr->sh_info != 0)
{
isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
if (isymbuf == NULL)
isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
symtab_hdr->sh_info, 0,
NULL, NULL, NULL);
if (isymbuf == NULL)
goto error_return;
}
/* Get the value of the symbol referred to by the reloc. */
if (r_symndx < symtab_hdr->sh_info)
{
/* A local symbol. */
Elf_Internal_Sym *isym;
asection *sym_sec;
isym = isymbuf + r_symndx;
if (isym->st_shndx == SHN_UNDEF)
sym_sec = bfd_und_section_ptr;
else if (isym->st_shndx == SHN_ABS)
sym_sec = bfd_abs_section_ptr;
else if (isym->st_shndx == SHN_COMMON)
sym_sec = bfd_com_section_ptr;
else
sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
symval = (isym->st_value
+ sym_sec->output_section->vma
+ sym_sec->output_offset);
target_is_micromips_code_p = ELF_ST_IS_MICROMIPS (isym->st_other);
}
else
{
unsigned long indx;
struct elf_link_hash_entry *h;
/* An external symbol. */
indx = r_symndx - symtab_hdr->sh_info;
h = elf_sym_hashes (abfd)[indx];
BFD_ASSERT (h != NULL);
if (h->root.type != bfd_link_hash_defined
&& h->root.type != bfd_link_hash_defweak)
/* This appears to be a reference to an undefined
symbol. Just ignore it -- it will be caught by the
regular reloc processing. */
continue;
symval = (h->root.u.def.value
+ h->root.u.def.section->output_section->vma
+ h->root.u.def.section->output_offset);
target_is_micromips_code_p = (!h->needs_plt
&& ELF_ST_IS_MICROMIPS (h->other));
}
/* For simplicity of coding, we are going to modify the
section contents, the section relocs, and the BFD symbol
table. We must tell the rest of the code not to free up this
information. It would be possible to instead create a table
of changes which have to be made, as is done in coff-mips.c;
that would be more work, but would require less memory when
the linker is run. */
/* Only 32-bit instructions relaxed. */
if (irel->r_offset + 4 > sec->size)
continue;
opcode = bfd_get_micromips_32 (abfd, ptr);
/* This is the pc-relative distance from the instruction the
relocation is applied to, to the symbol referred. */
pcrval = (symval
- (sec->output_section->vma + sec->output_offset)
- irel->r_offset);
/* R_MICROMIPS_HI16 / LUI relaxation to nil, performing relaxation
of corresponding R_MICROMIPS_LO16 to R_MICROMIPS_HI0_LO16 or
R_MICROMIPS_PC23_S2. The R_MICROMIPS_PC23_S2 condition is
(symval % 4 == 0 && IS_BITSIZE (pcrval, 25))
where pcrval has first to be adjusted to apply against the LO16
location (we make the adjustment later on, when we have figured
out the offset). */
if (r_type == R_MICROMIPS_HI16 && MATCH (opcode, lui_insn))
{
bfd_boolean bzc = FALSE;
unsigned long nextopc;
unsigned long reg;
bfd_vma offset;
/* Give up if the previous reloc was a HI16 against this symbol
too. */
if (irel > internal_relocs
&& ELF32_R_TYPE (irel[-1].r_info) == R_MICROMIPS_HI16
&& ELF32_R_SYM (irel[-1].r_info) == r_symndx)
continue;
/* Or if the next reloc is not a LO16 against this symbol. */
if (irel + 1 >= irelend
|| ELF32_R_TYPE (irel[1].r_info) != R_MICROMIPS_LO16
|| ELF32_R_SYM (irel[1].r_info) != r_symndx)
continue;
/* Or if the second next reloc is a LO16 against this symbol too. */
if (irel + 2 >= irelend
&& ELF32_R_TYPE (irel[2].r_info) == R_MICROMIPS_LO16
&& ELF32_R_SYM (irel[2].r_info) == r_symndx)
continue;
/* See if the LUI instruction *might* be in a branch delay slot.
We check whether what looks like a 16-bit branch or jump is
actually an immediate argument to a compact branch, and let
it through if so. */
if (irel->r_offset >= 2
&& check_br16_dslot (abfd, ptr - 2)
&& !(irel->r_offset >= 4
&& (bzc = check_relocated_bzc (abfd,
ptr - 4, irel->r_offset - 4,
internal_relocs, irelend))))
continue;
if (irel->r_offset >= 4
&& !bzc
&& check_br32_dslot (abfd, ptr - 4))
continue;
reg = OP32_SREG (opcode);
/* We only relax adjacent instructions or ones separated with
a branch or jump that has a delay slot. The branch or jump
must not fiddle with the register used to hold the address.
Subtract 4 for the LUI itself. */
offset = irel[1].r_offset - irel[0].r_offset;
switch (offset - 4)
{
case 0:
break;
case 2:
if (check_br16 (abfd, ptr + 4, reg))
break;
continue;
case 4:
if (check_br32 (abfd, ptr + 4, reg))
break;
continue;
default:
continue;
}
nextopc = bfd_get_micromips_32 (abfd, contents + irel[1].r_offset);
/* Give up unless the same register is used with both
relocations. */
if (OP32_SREG (nextopc) != reg)
continue;
/* Now adjust pcrval, subtracting the offset to the LO16 reloc
and rounding up to take masking of the two LSBs into account. */
pcrval = ((pcrval - offset + 3) | 3) ^ 3;
/* R_MICROMIPS_LO16 relaxation to R_MICROMIPS_HI0_LO16. */
if (IS_BITSIZE (symval, 16))
{
/* Fix the relocation's type. */
irel[1].r_info = ELF32_R_INFO (r_symndx, R_MICROMIPS_HI0_LO16);
/* Instructions using R_MICROMIPS_LO16 have the base or
source register in bits 20:16. This register becomes $0
(zero) as the result of the R_MICROMIPS_HI16 being 0. */
nextopc &= ~0x001f0000;
bfd_put_16 (abfd, (nextopc >> 16) & 0xffff,
contents + irel[1].r_offset);
}
/* R_MICROMIPS_LO16 / ADDIU relaxation to R_MICROMIPS_PC23_S2.
We add 4 to take LUI deletion into account while checking
the PC-relative distance. */
else if (symval % 4 == 0
&& IS_BITSIZE (pcrval + 4, 25)
&& MATCH (nextopc, addiu_insn)
&& OP32_TREG (nextopc) == OP32_SREG (nextopc)
&& OP16_VALID_REG (OP32_TREG (nextopc)))
{
/* Fix the relocation's type. */
irel[1].r_info = ELF32_R_INFO (r_symndx, R_MICROMIPS_PC23_S2);
/* Replace ADDIU with the ADDIUPC version. */
nextopc = (addiupc_insn.match
| ADDIUPC_REG_FIELD (OP32_TREG (nextopc)));
bfd_put_micromips_32 (abfd, nextopc,
contents + irel[1].r_offset);
}
/* Can't do anything, give up, sigh... */
else
continue;
/* Fix the relocation's type. */
irel->r_info = ELF32_R_INFO (r_symndx, R_MIPS_NONE);
/* Delete the LUI instruction: 4 bytes at irel->r_offset. */
delcnt = 4;
deloff = 0;
}
/* Compact branch relaxation -- due to the multitude of macros
employed by the compiler/assembler, compact branches are not
always generated. Obviously, this can/will be fixed elsewhere,
but there is no drawback in double checking it here. */
else if (r_type == R_MICROMIPS_PC16_S1
&& irel->r_offset + 5 < sec->size
&& ((fndopc = find_match (opcode, bz_rs_insns_32)) >= 0
|| (fndopc = find_match (opcode, bz_rt_insns_32)) >= 0)
&& ((!insn32
&& (delcnt = MATCH (bfd_get_16 (abfd, ptr + 4),
nop_insn_16) ? 2 : 0))
|| (irel->r_offset + 7 < sec->size
&& (delcnt = MATCH (bfd_get_micromips_32 (abfd,
ptr + 4),
nop_insn_32) ? 4 : 0))))
{
unsigned long reg;
reg = OP32_SREG (opcode) ? OP32_SREG (opcode) : OP32_TREG (opcode);
/* Replace BEQZ/BNEZ with the compact version. */
opcode = (bzc_insns_32[fndopc].match
| BZC32_REG_FIELD (reg)
| (opcode & 0xffff)); /* Addend value. */
bfd_put_micromips_32 (abfd, opcode, ptr);
/* Delete the delay slot NOP: two or four bytes from
irel->offset + 4; delcnt has already been set above. */
deloff = 4;
}
/* R_MICROMIPS_PC16_S1 relaxation to R_MICROMIPS_PC10_S1. We need
to check the distance from the next instruction, so subtract 2. */
else if (!insn32
&& r_type == R_MICROMIPS_PC16_S1
&& IS_BITSIZE (pcrval - 2, 11)
&& find_match (opcode, b_insns_32) >= 0)
{
/* Fix the relocation's type. */
irel->r_info = ELF32_R_INFO (r_symndx, R_MICROMIPS_PC10_S1);
/* Replace the 32-bit opcode with a 16-bit opcode. */
bfd_put_16 (abfd,
(b_insn_16.match
| (opcode & 0x3ff)), /* Addend value. */
ptr);
/* Delete 2 bytes from irel->r_offset + 2. */
delcnt = 2;
deloff = 2;
}
/* R_MICROMIPS_PC16_S1 relaxation to R_MICROMIPS_PC7_S1. We need
to check the distance from the next instruction, so subtract 2. */
else if (!insn32
&& r_type == R_MICROMIPS_PC16_S1
&& IS_BITSIZE (pcrval - 2, 8)
&& (((fndopc = find_match (opcode, bz_rs_insns_32)) >= 0
&& OP16_VALID_REG (OP32_SREG (opcode)))
|| ((fndopc = find_match (opcode, bz_rt_insns_32)) >= 0
&& OP16_VALID_REG (OP32_TREG (opcode)))))
{
unsigned long reg;
reg = OP32_SREG (opcode) ? OP32_SREG (opcode) : OP32_TREG (opcode);
/* Fix the relocation's type. */
irel->r_info = ELF32_R_INFO (r_symndx, R_MICROMIPS_PC7_S1);
/* Replace the 32-bit opcode with a 16-bit opcode. */
bfd_put_16 (abfd,
(bz_insns_16[fndopc].match
| BZ16_REG_FIELD (reg)
| (opcode & 0x7f)), /* Addend value. */
ptr);
/* Delete 2 bytes from irel->r_offset + 2. */
delcnt = 2;
deloff = 2;
}
/* R_MICROMIPS_26_S1 -- JAL to JALS relaxation for microMIPS targets. */
else if (!insn32
&& r_type == R_MICROMIPS_26_S1
&& target_is_micromips_code_p
&& irel->r_offset + 7 < sec->size
&& MATCH (opcode, jal_insn_32_bd32))
{
unsigned long n32opc;
bfd_boolean relaxed = FALSE;
n32opc = bfd_get_micromips_32 (abfd, ptr + 4);
if (MATCH (n32opc, nop_insn_32))
{
/* Replace delay slot 32-bit NOP with a 16-bit NOP. */
bfd_put_16 (abfd, nop_insn_16.match, ptr + 4);
relaxed = TRUE;
}
else if (find_match (n32opc, move_insns_32) >= 0)
{
/* Replace delay slot 32-bit MOVE with 16-bit MOVE. */
bfd_put_16 (abfd,
(move_insn_16.match
| MOVE16_RD_FIELD (MOVE32_RD (n32opc))
| MOVE16_RS_FIELD (MOVE32_RS (n32opc))),
ptr + 4);
relaxed = TRUE;
}
/* Other 32-bit instructions relaxable to 16-bit
instructions will be handled here later. */
if (relaxed)
{
/* JAL with 32-bit delay slot that is changed to a JALS
with 16-bit delay slot. */
bfd_put_micromips_32 (abfd, jal_insn_32_bd16.match, ptr);
/* Delete 2 bytes from irel->r_offset + 6. */
delcnt = 2;
deloff = 6;
}
}
if (delcnt != 0)
{
/* Note that we've changed the relocs, section contents, etc. */
elf_section_data (sec)->relocs = internal_relocs;
elf_section_data (sec)->this_hdr.contents = contents;
symtab_hdr->contents = (unsigned char *) isymbuf;
/* Delete bytes depending on the delcnt and deloff. */
if (!mips_elf_relax_delete_bytes (abfd, sec,
irel->r_offset + deloff, delcnt))
goto error_return;
/* That will change things, so we should relax again.
Note that this is not required, and it may be slow. */
*again = TRUE;
}
}
if (isymbuf != NULL
&& symtab_hdr->contents != (unsigned char *) isymbuf)
{
if (! link_info->keep_memory)
free (isymbuf);
else
{
/* Cache the symbols for elf_link_input_bfd. */
symtab_hdr->contents = (unsigned char *) isymbuf;
}
}
if (contents != NULL
&& elf_section_data (sec)->this_hdr.contents != contents)
{
if (! link_info->keep_memory)
free (contents);
else
{
/* Cache the section contents for elf_link_input_bfd. */
elf_section_data (sec)->this_hdr.contents = contents;
}
}
if (elf_section_data (sec)->relocs != internal_relocs)
free (internal_relocs);
return TRUE;
error_return:
if (symtab_hdr->contents != (unsigned char *) isymbuf)
free (isymbuf);
if (elf_section_data (sec)->this_hdr.contents != contents)
free (contents);
if (elf_section_data (sec)->relocs != internal_relocs)
free (internal_relocs);
return FALSE;
}
/* Create a MIPS ELF linker hash table. */
struct bfd_link_hash_table *
_bfd_mips_elf_link_hash_table_create (bfd *abfd)
{
struct mips_elf_link_hash_table *ret;
size_t amt = sizeof (struct mips_elf_link_hash_table);
ret = bfd_zmalloc (amt);
if (ret == NULL)
return NULL;
if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
mips_elf_link_hash_newfunc,
sizeof (struct mips_elf_link_hash_entry),
MIPS_ELF_DATA))
{
free (ret);
return NULL;
}
ret->root.init_plt_refcount.plist = NULL;
ret->root.init_plt_offset.plist = NULL;
return &ret->root.root;
}
/* Likewise, but indicate that the target is VxWorks. */
struct bfd_link_hash_table *
_bfd_mips_vxworks_link_hash_table_create (bfd *abfd)
{
struct bfd_link_hash_table *ret;
ret = _bfd_mips_elf_link_hash_table_create (abfd);
if (ret)
{
struct mips_elf_link_hash_table *htab;
htab = (struct mips_elf_link_hash_table *) ret;
htab->use_plts_and_copy_relocs = TRUE;
}
return ret;
}
/* A function that the linker calls if we are allowed to use PLTs
and copy relocs. */
void
_bfd_mips_elf_use_plts_and_copy_relocs (struct bfd_link_info *info)
{
mips_elf_hash_table (info)->use_plts_and_copy_relocs = TRUE;
}
/* A function that the linker calls to select between all or only
32-bit microMIPS instructions, and between making or ignoring
branch relocation checks for invalid transitions between ISA modes.
Also record whether we have been configured for a GNU target. */
void
_bfd_mips_elf_linker_flags (struct bfd_link_info *info, bfd_boolean insn32,
bfd_boolean ignore_branch_isa,
bfd_boolean gnu_target)
{
mips_elf_hash_table (info)->insn32 = insn32;
mips_elf_hash_table (info)->ignore_branch_isa = ignore_branch_isa;
mips_elf_hash_table (info)->gnu_target = gnu_target;
}
/* A function that the linker calls to enable use of compact branches in
linker generated code for MIPSR6. */
void
_bfd_mips_elf_compact_branches (struct bfd_link_info *info, bfd_boolean on)
{
mips_elf_hash_table (info)->compact_branches = on;
}
/* Structure for saying that BFD machine EXTENSION extends BASE. */
struct mips_mach_extension
{
unsigned long extension, base;
};
/* An array describing how BFD machines relate to one another. The entries
are ordered topologically with MIPS I extensions listed last. */
static const struct mips_mach_extension mips_mach_extensions[] =
{
/* MIPS64r2 extensions. */
{ bfd_mach_mips_octeon3, bfd_mach_mips_octeon2 },
{ bfd_mach_mips_octeon2, bfd_mach_mips_octeonp },
{ bfd_mach_mips_octeonp, bfd_mach_mips_octeon },
{ bfd_mach_mips_octeon, bfd_mach_mipsisa64r2 },
{ bfd_mach_mips_gs264e, bfd_mach_mips_gs464e },
{ bfd_mach_mips_gs464e, bfd_mach_mips_gs464 },
{ bfd_mach_mips_gs464, bfd_mach_mipsisa64r2 },
/* MIPS64 extensions. */
{ bfd_mach_mipsisa64r2, bfd_mach_mipsisa64 },
{ bfd_mach_mips_sb1, bfd_mach_mipsisa64 },
{ bfd_mach_mips_xlr, bfd_mach_mipsisa64 },
/* MIPS V extensions. */
{ bfd_mach_mipsisa64, bfd_mach_mips5 },
/* R10000 extensions. */
{ bfd_mach_mips12000, bfd_mach_mips10000 },
{ bfd_mach_mips14000, bfd_mach_mips10000 },
{ bfd_mach_mips16000, bfd_mach_mips10000 },
/* R5000 extensions. Note: the vr5500 ISA is an extension of the core
vr5400 ISA, but doesn't include the multimedia stuff. It seems
better to allow vr5400 and vr5500 code to be merged anyway, since
many libraries will just use the core ISA. Perhaps we could add
some sort of ASE flag if this ever proves a problem. */
{ bfd_mach_mips5500, bfd_mach_mips5400 },
{ bfd_mach_mips5400, bfd_mach_mips5000 },
/* MIPS IV extensions. */
{ bfd_mach_mips5, bfd_mach_mips8000 },
{ bfd_mach_mips10000, bfd_mach_mips8000 },
{ bfd_mach_mips5000, bfd_mach_mips8000 },
{ bfd_mach_mips7000, bfd_mach_mips8000 },
{ bfd_mach_mips9000, bfd_mach_mips8000 },
/* VR4100 extensions. */
{ bfd_mach_mips4120, bfd_mach_mips4100 },
{ bfd_mach_mips4111, bfd_mach_mips4100 },
/* MIPS III extensions. */
{ bfd_mach_mips_loongson_2e, bfd_mach_mips4000 },
{ bfd_mach_mips_loongson_2f, bfd_mach_mips4000 },
{ bfd_mach_mips8000, bfd_mach_mips4000 },
{ bfd_mach_mips4650, bfd_mach_mips4000 },
{ bfd_mach_mips4600, bfd_mach_mips4000 },
{ bfd_mach_mips4400, bfd_mach_mips4000 },
{ bfd_mach_mips4300, bfd_mach_mips4000 },
{ bfd_mach_mips4100, bfd_mach_mips4000 },
{ bfd_mach_mips5900, bfd_mach_mips4000 },
/* MIPS32r3 extensions. */
{ bfd_mach_mips_interaptiv_mr2, bfd_mach_mipsisa32r3 },
/* MIPS32r2 extensions. */
{ bfd_mach_mipsisa32r3, bfd_mach_mipsisa32r2 },
/* MIPS32 extensions. */
{ bfd_mach_mipsisa32r2, bfd_mach_mipsisa32 },
/* MIPS II extensions. */
{ bfd_mach_mips4000, bfd_mach_mips6000 },
{ bfd_mach_mipsisa32, bfd_mach_mips6000 },
{ bfd_mach_mips4010, bfd_mach_mips6000 },
/* MIPS I extensions. */
{ bfd_mach_mips6000, bfd_mach_mips3000 },
{ bfd_mach_mips3900, bfd_mach_mips3000 }
};
/* Return true if bfd machine EXTENSION is an extension of machine BASE. */
static bfd_boolean
mips_mach_extends_p (unsigned long base, unsigned long extension)
{
size_t i;
if (extension == base)
return TRUE;
if (base == bfd_mach_mipsisa32
&& mips_mach_extends_p (bfd_mach_mipsisa64, extension))
return TRUE;
if (base == bfd_mach_mipsisa32r2
&& mips_mach_extends_p (bfd_mach_mipsisa64r2, extension))
return TRUE;
for (i = 0; i < ARRAY_SIZE (mips_mach_extensions); i++)
if (extension == mips_mach_extensions[i].extension)
{
extension = mips_mach_extensions[i].base;
if (extension == base)
return TRUE;
}
return FALSE;
}
/* Return the BFD mach for each .MIPS.abiflags ISA Extension. */
static unsigned long
bfd_mips_isa_ext_mach (unsigned int isa_ext)
{
switch (isa_ext)
{
case AFL_EXT_3900: return bfd_mach_mips3900;
case AFL_EXT_4010: return bfd_mach_mips4010;
case AFL_EXT_4100: return bfd_mach_mips4100;
case AFL_EXT_4111: return bfd_mach_mips4111;
case AFL_EXT_4120: return bfd_mach_mips4120;
case AFL_EXT_4650: return bfd_mach_mips4650;
case AFL_EXT_5400: return bfd_mach_mips5400;
case AFL_EXT_5500: return bfd_mach_mips5500;
case AFL_EXT_5900: return bfd_mach_mips5900;
case AFL_EXT_10000: return bfd_mach_mips10000;
case AFL_EXT_LOONGSON_2E: return bfd_mach_mips_loongson_2e;
case AFL_EXT_LOONGSON_2F: return bfd_mach_mips_loongson_2f;
case AFL_EXT_SB1: return bfd_mach_mips_sb1;
case AFL_EXT_OCTEON: return bfd_mach_mips_octeon;
case AFL_EXT_OCTEONP: return bfd_mach_mips_octeonp;
case AFL_EXT_OCTEON2: return bfd_mach_mips_octeon2;
case AFL_EXT_XLR: return bfd_mach_mips_xlr;
default: return bfd_mach_mips3000;
}
}
/* Return the .MIPS.abiflags value representing each ISA Extension. */
unsigned int
bfd_mips_isa_ext (bfd *abfd)
{
switch (bfd_get_mach (abfd))
{
case bfd_mach_mips3900: return AFL_EXT_3900;
case bfd_mach_mips4010: return AFL_EXT_4010;
case bfd_mach_mips4100: return AFL_EXT_4100;
case bfd_mach_mips4111: return AFL_EXT_4111;
case bfd_mach_mips4120: return AFL_EXT_4120;
case bfd_mach_mips4650: return AFL_EXT_4650;
case bfd_mach_mips5400: return AFL_EXT_5400;
case bfd_mach_mips5500: return AFL_EXT_5500;
case bfd_mach_mips5900: return AFL_EXT_5900;
case bfd_mach_mips10000: return AFL_EXT_10000;
case bfd_mach_mips_loongson_2e: return AFL_EXT_LOONGSON_2E;
case bfd_mach_mips_loongson_2f: return AFL_EXT_LOONGSON_2F;
case bfd_mach_mips_sb1: return AFL_EXT_SB1;
case bfd_mach_mips_octeon: return AFL_EXT_OCTEON;
case bfd_mach_mips_octeonp: return AFL_EXT_OCTEONP;
case bfd_mach_mips_octeon3: return AFL_EXT_OCTEON3;
case bfd_mach_mips_octeon2: return AFL_EXT_OCTEON2;
case bfd_mach_mips_xlr: return AFL_EXT_XLR;
case bfd_mach_mips_interaptiv_mr2:
return AFL_EXT_INTERAPTIV_MR2;
default: return 0;
}
}
/* Encode ISA level and revision as a single value. */
#define LEVEL_REV(LEV,REV) ((LEV) << 3 | (REV))
/* Decode a single value into level and revision. */
#define ISA_LEVEL(LEVREV) ((LEVREV) >> 3)
#define ISA_REV(LEVREV) ((LEVREV) & 0x7)
/* Update the isa_level, isa_rev, isa_ext fields of abiflags. */
static void
update_mips_abiflags_isa (bfd *abfd, Elf_Internal_ABIFlags_v0 *abiflags)
{
int new_isa = 0;
switch (elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH)
{
case E_MIPS_ARCH_1: new_isa = LEVEL_REV (1, 0); break;
case E_MIPS_ARCH_2: new_isa = LEVEL_REV (2, 0); break;
case E_MIPS_ARCH_3: new_isa = LEVEL_REV (3, 0); break;
case E_MIPS_ARCH_4: new_isa = LEVEL_REV (4, 0); break;
case E_MIPS_ARCH_5: new_isa = LEVEL_REV (5, 0); break;
case E_MIPS_ARCH_32: new_isa = LEVEL_REV (32, 1); break;
case E_MIPS_ARCH_32R2: new_isa = LEVEL_REV (32, 2); break;
case E_MIPS_ARCH_32R6: new_isa = LEVEL_REV (32, 6); break;
case E_MIPS_ARCH_64: new_isa = LEVEL_REV (64, 1); break;
case E_MIPS_ARCH_64R2: new_isa = LEVEL_REV (64, 2); break;
case E_MIPS_ARCH_64R6: new_isa = LEVEL_REV (64, 6); break;
default:
_bfd_error_handler
/* xgettext:c-format */
(_("%pB: unknown architecture %s"),
abfd, bfd_printable_name (abfd));
}
if (new_isa > LEVEL_REV (abiflags->isa_level, abiflags->isa_rev))
{
abiflags->isa_level = ISA_LEVEL (new_isa);
abiflags->isa_rev = ISA_REV (new_isa);
}
/* Update the isa_ext if ABFD describes a further extension. */
if (mips_mach_extends_p (bfd_mips_isa_ext_mach (abiflags->isa_ext),
bfd_get_mach (abfd)))
abiflags->isa_ext = bfd_mips_isa_ext (abfd);
}
/* Return true if the given ELF header flags describe a 32-bit binary. */
static bfd_boolean
mips_32bit_flags_p (flagword flags)
{
return ((flags & EF_MIPS_32BITMODE) != 0
|| (flags & EF_MIPS_ABI) == E_MIPS_ABI_O32
|| (flags & EF_MIPS_ABI) == E_MIPS_ABI_EABI32
|| (flags & EF_MIPS_ARCH) == E_MIPS_ARCH_1
|| (flags & EF_MIPS_ARCH) == E_MIPS_ARCH_2
|| (flags & EF_MIPS_ARCH) == E_MIPS_ARCH_32
|| (flags & EF_MIPS_ARCH) == E_MIPS_ARCH_32R2
|| (flags & EF_MIPS_ARCH) == E_MIPS_ARCH_32R6);
}
/* Infer the content of the ABI flags based on the elf header. */
static void
infer_mips_abiflags (bfd *abfd, Elf_Internal_ABIFlags_v0* abiflags)
{
obj_attribute *in_attr;
memset (abiflags, 0, sizeof (Elf_Internal_ABIFlags_v0));
update_mips_abiflags_isa (abfd, abiflags);
if (mips_32bit_flags_p (elf_elfheader (abfd)->e_flags))
abiflags->gpr_size = AFL_REG_32;
else
abiflags->gpr_size = AFL_REG_64;
abiflags->cpr1_size = AFL_REG_NONE;
in_attr = elf_known_obj_attributes (abfd)[OBJ_ATTR_GNU];
abiflags->fp_abi = in_attr[Tag_GNU_MIPS_ABI_FP].i;
if (abiflags->fp_abi == Val_GNU_MIPS_ABI_FP_SINGLE
|| abiflags->fp_abi == Val_GNU_MIPS_ABI_FP_XX
|| (abiflags->fp_abi == Val_GNU_MIPS_ABI_FP_DOUBLE
&& abiflags->gpr_size == AFL_REG_32))
abiflags->cpr1_size = AFL_REG_32;
else if (abiflags->fp_abi == Val_GNU_MIPS_ABI_FP_DOUBLE
|| abiflags->fp_abi == Val_GNU_MIPS_ABI_FP_64
|| abiflags->fp_abi == Val_GNU_MIPS_ABI_FP_64A)
abiflags->cpr1_size = AFL_REG_64;
abiflags->cpr2_size = AFL_REG_NONE;
if (elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH_ASE_MDMX)
abiflags->ases |= AFL_ASE_MDMX;
if (elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH_ASE_M16)
abiflags->ases |= AFL_ASE_MIPS16;
if (elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH_ASE_MICROMIPS)
abiflags->ases |= AFL_ASE_MICROMIPS;
if (abiflags->fp_abi != Val_GNU_MIPS_ABI_FP_ANY
&& abiflags->fp_abi != Val_GNU_MIPS_ABI_FP_SOFT
&& abiflags->fp_abi != Val_GNU_MIPS_ABI_FP_64A
&& abiflags->isa_level >= 32
&& abiflags->ases != AFL_ASE_LOONGSON_EXT)
abiflags->flags1 |= AFL_FLAGS1_ODDSPREG;
}
/* We need to use a special link routine to handle the .reginfo and
the .mdebug sections. We need to merge all instances of these
sections together, not write them all out sequentially. */
bfd_boolean
_bfd_mips_elf_final_link (bfd *abfd, struct bfd_link_info *info)
{
asection *o;
struct bfd_link_order *p;
asection *reginfo_sec, *mdebug_sec, *gptab_data_sec, *gptab_bss_sec;
asection *rtproc_sec, *abiflags_sec;
Elf32_RegInfo reginfo;
struct ecoff_debug_info debug;
struct mips_htab_traverse_info hti;
const struct elf_backend_data *bed = get_elf_backend_data (abfd);
const struct ecoff_debug_swap *swap = bed->elf_backend_ecoff_debug_swap;
HDRR *symhdr = &debug.symbolic_header;
void *mdebug_handle = NULL;
asection *s;
EXTR esym;
unsigned int i;
bfd_size_type amt;
struct mips_elf_link_hash_table *htab;
static const char * const secname[] =
{
".text", ".init", ".fini", ".data",
".rodata", ".sdata", ".sbss", ".bss"
};
static const int sc[] =
{
scText, scInit, scFini, scData,
scRData, scSData, scSBss, scBss
};
htab = mips_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
/* Sort the dynamic symbols so that those with GOT entries come after
those without. */
if (!mips_elf_sort_hash_table (abfd, info))
return FALSE;
/* Create any scheduled LA25 stubs. */
hti.info = info;
hti.output_bfd = abfd;
hti.error = FALSE;
htab_traverse (htab->la25_stubs, mips_elf_create_la25_stub, &hti);
if (hti.error)
return FALSE;
/* Get a value for the GP register. */
if (elf_gp (abfd) == 0)
{
struct bfd_link_hash_entry *h;
h = bfd_link_hash_lookup (info->hash, "_gp", FALSE, FALSE, TRUE);
if (h != NULL && h->type == bfd_link_hash_defined)
elf_gp (abfd) = (h->u.def.value
+ h->u.def.section->output_section->vma
+ h->u.def.section->output_offset);
else if (htab->root.target_os == is_vxworks
&& (h = bfd_link_hash_lookup (info->hash,
"_GLOBAL_OFFSET_TABLE_",
FALSE, FALSE, TRUE))
&& h->type == bfd_link_hash_defined)
elf_gp (abfd) = (h->u.def.section->output_section->vma
+ h->u.def.section->output_offset
+ h->u.def.value);
else if (bfd_link_relocatable (info))
{
bfd_vma lo = MINUS_ONE;
/* Find the GP-relative section with the lowest offset. */
for (o = abfd->sections; o != NULL; o = o->next)
if (o->vma < lo
&& (elf_section_data (o)->this_hdr.sh_flags & SHF_MIPS_GPREL))
lo = o->vma;
/* And calculate GP relative to that. */
elf_gp (abfd) = lo + ELF_MIPS_GP_OFFSET (info);
}
else
{
/* If the relocate_section function needs to do a reloc
involving the GP value, it should make a reloc_dangerous
callback to warn that GP is not defined. */
}
}
/* Go through the sections and collect the .reginfo and .mdebug
information. */
abiflags_sec = NULL;
reginfo_sec = NULL;
mdebug_sec = NULL;
gptab_data_sec = NULL;
gptab_bss_sec = NULL;
for (o = abfd->sections; o != NULL; o = o->next)
{
if (strcmp (o->name, ".MIPS.abiflags") == 0)
{
/* We have found the .MIPS.abiflags section in the output file.
Look through all the link_orders comprising it and remove them.
The data is merged in _bfd_mips_elf_merge_private_bfd_data. */
for (p = o->map_head.link_order; p != NULL; p = p->next)
{
asection *input_section;
if (p->type != bfd_indirect_link_order)
{
if (p->type == bfd_data_link_order)
continue;
abort ();
}
input_section = p->u.indirect.section;
/* Hack: reset the SEC_HAS_CONTENTS flag so that
elf_link_input_bfd ignores this section. */
input_section->flags &= ~SEC_HAS_CONTENTS;
}
/* Size has been set in _bfd_mips_elf_always_size_sections. */
BFD_ASSERT(o->size == sizeof (Elf_External_ABIFlags_v0));
/* Skip this section later on (I don't think this currently
matters, but someday it might). */
o->map_head.link_order = NULL;
abiflags_sec = o;
}
if (strcmp (o->name, ".reginfo") == 0)
{
memset (®info, 0, sizeof reginfo);
/* We have found the .reginfo section in the output file.
Look through all the link_orders comprising it and merge
the information together. */
for (p = o->map_head.link_order; p != NULL; p = p->next)
{
asection *input_section;
bfd *input_bfd;
Elf32_External_RegInfo ext;
Elf32_RegInfo sub;
bfd_size_type sz;
if (p->type != bfd_indirect_link_order)
{
if (p->type == bfd_data_link_order)
continue;
abort ();
}
input_section = p->u.indirect.section;
input_bfd = input_section->owner;
sz = (input_section->size < sizeof (ext)
? input_section->size : sizeof (ext));
memset (&ext, 0, sizeof (ext));
if (! bfd_get_section_contents (input_bfd, input_section,
&ext, 0, sz))
return FALSE;
bfd_mips_elf32_swap_reginfo_in (input_bfd, &ext, &sub);
reginfo.ri_gprmask |= sub.ri_gprmask;
reginfo.ri_cprmask[0] |= sub.ri_cprmask[0];
reginfo.ri_cprmask[1] |= sub.ri_cprmask[1];
reginfo.ri_cprmask[2] |= sub.ri_cprmask[2];
reginfo.ri_cprmask[3] |= sub.ri_cprmask[3];
/* ri_gp_value is set by the function
`_bfd_mips_elf_section_processing' when the section is
finally written out. */
/* Hack: reset the SEC_HAS_CONTENTS flag so that
elf_link_input_bfd ignores this section. */
input_section->flags &= ~SEC_HAS_CONTENTS;
}
/* Size has been set in _bfd_mips_elf_always_size_sections. */
BFD_ASSERT(o->size == sizeof (Elf32_External_RegInfo));
/* Skip this section later on (I don't think this currently
matters, but someday it might). */
o->map_head.link_order = NULL;
reginfo_sec = o;
}
if (strcmp (o->name, ".mdebug") == 0)
{
struct extsym_info einfo;
bfd_vma last;
/* We have found the .mdebug section in the output file.
Look through all the link_orders comprising it and merge
the information together. */
symhdr->magic = swap->sym_magic;
/* FIXME: What should the version stamp be? */
symhdr->vstamp = 0;
symhdr->ilineMax = 0;
symhdr->cbLine = 0;
symhdr->idnMax = 0;
symhdr->ipdMax = 0;
symhdr->isymMax = 0;
symhdr->ioptMax = 0;
symhdr->iauxMax = 0;
symhdr->issMax = 0;
symhdr->issExtMax = 0;
symhdr->ifdMax = 0;
symhdr->crfd = 0;
symhdr->iextMax = 0;
/* We accumulate the debugging information itself in the
debug_info structure. */
debug.line = NULL;
debug.external_dnr = NULL;
debug.external_pdr = NULL;
debug.external_sym = NULL;
debug.external_opt = NULL;
debug.external_aux = NULL;
debug.ss = NULL;
debug.ssext = debug.ssext_end = NULL;
debug.external_fdr = NULL;
debug.external_rfd = NULL;
debug.external_ext = debug.external_ext_end = NULL;
mdebug_handle = bfd_ecoff_debug_init (abfd, &debug, swap, info);
if (mdebug_handle == NULL)
return FALSE;
esym.jmptbl = 0;
esym.cobol_main = 0;
esym.weakext = 0;
esym.reserved = 0;
esym.ifd = ifdNil;
esym.asym.iss = issNil;
esym.asym.st = stLocal;
esym.asym.reserved = 0;
esym.asym.index = indexNil;
last = 0;
for (i = 0; i < sizeof (secname) / sizeof (secname[0]); i++)
{
esym.asym.sc = sc[i];
s = bfd_get_section_by_name (abfd, secname[i]);
if (s != NULL)
{
esym.asym.value = s->vma;
last = s->vma + s->size;
}
else
esym.asym.value = last;
if (!bfd_ecoff_debug_one_external (abfd, &debug, swap,
secname[i], &esym))
return FALSE;
}
for (p = o->map_head.link_order; p != NULL; p = p->next)
{
asection *input_section;
bfd *input_bfd;
const struct ecoff_debug_swap *input_swap;
struct ecoff_debug_info input_debug;
char *eraw_src;
char *eraw_end;
if (p->type != bfd_indirect_link_order)
{
if (p->type == bfd_data_link_order)
continue;
abort ();
}
input_section = p->u.indirect.section;
input_bfd = input_section->owner;
if (!is_mips_elf (input_bfd))
{
/* I don't know what a non MIPS ELF bfd would be
doing with a .mdebug section, but I don't really
want to deal with it. */
continue;
}
input_swap = (get_elf_backend_data (input_bfd)
->elf_backend_ecoff_debug_swap);
BFD_ASSERT (p->size == input_section->size);
/* The ECOFF linking code expects that we have already
read in the debugging information and set up an
ecoff_debug_info structure, so we do that now. */
if (! _bfd_mips_elf_read_ecoff_info (input_bfd, input_section,
&input_debug))
return FALSE;
if (! (bfd_ecoff_debug_accumulate
(mdebug_handle, abfd, &debug, swap, input_bfd,
&input_debug, input_swap, info)))
return FALSE;
/* Loop through the external symbols. For each one with
interesting information, try to find the symbol in
the linker global hash table and save the information
for the output external symbols. */
eraw_src = input_debug.external_ext;
eraw_end = (eraw_src
+ (input_debug.symbolic_header.iextMax
* input_swap->external_ext_size));
for (;
eraw_src < eraw_end;
eraw_src += input_swap->external_ext_size)
{
EXTR ext;
const char *name;
struct mips_elf_link_hash_entry *h;
(*input_swap->swap_ext_in) (input_bfd, eraw_src, &ext);
if (ext.asym.sc == scNil
|| ext.asym.sc == scUndefined
|| ext.asym.sc == scSUndefined)
continue;
name = input_debug.ssext + ext.asym.iss;
h = mips_elf_link_hash_lookup (mips_elf_hash_table (info),
name, FALSE, FALSE, TRUE);
if (h == NULL || h->esym.ifd != -2)
continue;
if (ext.ifd != -1)
{
BFD_ASSERT (ext.ifd
< input_debug.symbolic_header.ifdMax);
ext.ifd = input_debug.ifdmap[ext.ifd];
}
h->esym = ext;
}
/* Free up the information we just read. */
free (input_debug.line);
free (input_debug.external_dnr);
free (input_debug.external_pdr);
free (input_debug.external_sym);
free (input_debug.external_opt);
free (input_debug.external_aux);
free (input_debug.ss);
free (input_debug.ssext);
free (input_debug.external_fdr);
free (input_debug.external_rfd);
free (input_debug.external_ext);
/* Hack: reset the SEC_HAS_CONTENTS flag so that
elf_link_input_bfd ignores this section. */
input_section->flags &= ~SEC_HAS_CONTENTS;
}
if (SGI_COMPAT (abfd) && bfd_link_pic (info))
{
/* Create .rtproc section. */
rtproc_sec = bfd_get_linker_section (abfd, ".rtproc");
if (rtproc_sec == NULL)
{
flagword flags = (SEC_HAS_CONTENTS | SEC_IN_MEMORY
| SEC_LINKER_CREATED | SEC_READONLY);
rtproc_sec = bfd_make_section_anyway_with_flags (abfd,
".rtproc",
flags);
if (rtproc_sec == NULL
|| !bfd_set_section_alignment (rtproc_sec, 4))
return FALSE;
}
if (! mips_elf_create_procedure_table (mdebug_handle, abfd,
info, rtproc_sec,
&debug))
return FALSE;
}
/* Build the external symbol information. */
einfo.abfd = abfd;
einfo.info = info;
einfo.debug = &debug;
einfo.swap = swap;
einfo.failed = FALSE;
mips_elf_link_hash_traverse (mips_elf_hash_table (info),
mips_elf_output_extsym, &einfo);
if (einfo.failed)
return FALSE;
/* Set the size of the .mdebug section. */
o->size = bfd_ecoff_debug_size (abfd, &debug, swap);
/* Skip this section later on (I don't think this currently
matters, but someday it might). */
o->map_head.link_order = NULL;
mdebug_sec = o;
}
if (startswith (o->name, ".gptab."))
{
const char *subname;
unsigned int c;
Elf32_gptab *tab;
Elf32_External_gptab *ext_tab;
unsigned int j;
/* The .gptab.sdata and .gptab.sbss sections hold
information describing how the small data area would
change depending upon the -G switch. These sections
not used in executables files. */
if (! bfd_link_relocatable (info))
{
for (p = o->map_head.link_order; p != NULL; p = p->next)
{
asection *input_section;
if (p->type != bfd_indirect_link_order)
{
if (p->type == bfd_data_link_order)
continue;
abort ();
}
input_section = p->u.indirect.section;
/* Hack: reset the SEC_HAS_CONTENTS flag so that
elf_link_input_bfd ignores this section. */
input_section->flags &= ~SEC_HAS_CONTENTS;
}
/* Skip this section later on (I don't think this
currently matters, but someday it might). */
o->map_head.link_order = NULL;
/* Really remove the section. */
bfd_section_list_remove (abfd, o);
--abfd->section_count;
continue;
}
/* There is one gptab for initialized data, and one for
uninitialized data. */
if (strcmp (o->name, ".gptab.sdata") == 0)
gptab_data_sec = o;
else if (strcmp (o->name, ".gptab.sbss") == 0)
gptab_bss_sec = o;
else
{
_bfd_error_handler
/* xgettext:c-format */
(_("%pB: illegal section name `%pA'"), abfd, o);
bfd_set_error (bfd_error_nonrepresentable_section);
return FALSE;
}
/* The linker script always combines .gptab.data and
.gptab.sdata into .gptab.sdata, and likewise for
.gptab.bss and .gptab.sbss. It is possible that there is
no .sdata or .sbss section in the output file, in which
case we must change the name of the output section. */
subname = o->name + sizeof ".gptab" - 1;
if (bfd_get_section_by_name (abfd, subname) == NULL)
{
if (o == gptab_data_sec)
o->name = ".gptab.data";
else
o->name = ".gptab.bss";
subname = o->name + sizeof ".gptab" - 1;
BFD_ASSERT (bfd_get_section_by_name (abfd, subname) != NULL);
}
/* Set up the first entry. */
c = 1;
amt = c * sizeof (Elf32_gptab);
tab = bfd_malloc (amt);
if (tab == NULL)
return FALSE;
tab[0].gt_header.gt_current_g_value = elf_gp_size (abfd);
tab[0].gt_header.gt_unused = 0;
/* Combine the input sections. */
for (p = o->map_head.link_order; p != NULL; p = p->next)
{
asection *input_section;
bfd *input_bfd;
bfd_size_type size;
unsigned long last;
bfd_size_type gpentry;
if (p->type != bfd_indirect_link_order)
{
if (p->type == bfd_data_link_order)
continue;
abort ();
}
input_section = p->u.indirect.section;
input_bfd = input_section->owner;
/* Combine the gptab entries for this input section one
by one. We know that the input gptab entries are
sorted by ascending -G value. */
size = input_section->size;
last = 0;
for (gpentry = sizeof (Elf32_External_gptab);
gpentry < size;
gpentry += sizeof (Elf32_External_gptab))
{
Elf32_External_gptab ext_gptab;
Elf32_gptab int_gptab;
unsigned long val;
unsigned long add;
bfd_boolean exact;
unsigned int look;
if (! (bfd_get_section_contents
(input_bfd, input_section, &ext_gptab, gpentry,
sizeof (Elf32_External_gptab))))
{
free (tab);
return FALSE;
}
bfd_mips_elf32_swap_gptab_in (input_bfd, &ext_gptab,
&int_gptab);
val = int_gptab.gt_entry.gt_g_value;
add = int_gptab.gt_entry.gt_bytes - last;
exact = FALSE;
for (look = 1; look < c; look++)
{
if (tab[look].gt_entry.gt_g_value >= val)
tab[look].gt_entry.gt_bytes += add;
if (tab[look].gt_entry.gt_g_value == val)
exact = TRUE;
}
if (! exact)
{
Elf32_gptab *new_tab;
unsigned int max;
/* We need a new table entry. */
amt = (bfd_size_type) (c + 1) * sizeof (Elf32_gptab);
new_tab = bfd_realloc (tab, amt);
if (new_tab == NULL)
{
free (tab);
return FALSE;
}
tab = new_tab;
tab[c].gt_entry.gt_g_value = val;
tab[c].gt_entry.gt_bytes = add;
/* Merge in the size for the next smallest -G
value, since that will be implied by this new
value. */
max = 0;
for (look = 1; look < c; look++)
{
if (tab[look].gt_entry.gt_g_value < val
&& (max == 0
|| (tab[look].gt_entry.gt_g_value
> tab[max].gt_entry.gt_g_value)))
max = look;
}
if (max != 0)
tab[c].gt_entry.gt_bytes +=
tab[max].gt_entry.gt_bytes;
++c;
}
last = int_gptab.gt_entry.gt_bytes;
}
/* Hack: reset the SEC_HAS_CONTENTS flag so that
elf_link_input_bfd ignores this section. */
input_section->flags &= ~SEC_HAS_CONTENTS;
}
/* The table must be sorted by -G value. */
if (c > 2)
qsort (tab + 1, c - 1, sizeof (tab[0]), gptab_compare);
/* Swap out the table. */
amt = (bfd_size_type) c * sizeof (Elf32_External_gptab);
ext_tab = bfd_alloc (abfd, amt);
if (ext_tab == NULL)
{
free (tab);
return FALSE;
}
for (j = 0; j < c; j++)
bfd_mips_elf32_swap_gptab_out (abfd, tab + j, ext_tab + j);
free (tab);
o->size = c * sizeof (Elf32_External_gptab);
o->contents = (bfd_byte *) ext_tab;
/* Skip this section later on (I don't think this currently
matters, but someday it might). */
o->map_head.link_order = NULL;
}
}
/* Invoke the regular ELF backend linker to do all the work. */
if (!bfd_elf_final_link (abfd, info))
return FALSE;
/* Now write out the computed sections. */
if (abiflags_sec != NULL)
{
Elf_External_ABIFlags_v0 ext;
Elf_Internal_ABIFlags_v0 *abiflags;
abiflags = &mips_elf_tdata (abfd)->abiflags;
/* Set up the abiflags if no valid input sections were found. */
if (!mips_elf_tdata (abfd)->abiflags_valid)
{
infer_mips_abiflags (abfd, abiflags);
mips_elf_tdata (abfd)->abiflags_valid = TRUE;
}
bfd_mips_elf_swap_abiflags_v0_out (abfd, abiflags, &ext);
if (! bfd_set_section_contents (abfd, abiflags_sec, &ext, 0, sizeof ext))
return FALSE;
}
if (reginfo_sec != NULL)
{
Elf32_External_RegInfo ext;
bfd_mips_elf32_swap_reginfo_out (abfd, ®info, &ext);
if (! bfd_set_section_contents (abfd, reginfo_sec, &ext, 0, sizeof ext))
return FALSE;
}
if (mdebug_sec != NULL)
{
BFD_ASSERT (abfd->output_has_begun);
if (! bfd_ecoff_write_accumulated_debug (mdebug_handle, abfd, &debug,
swap, info,
mdebug_sec->filepos))
return FALSE;
bfd_ecoff_debug_free (mdebug_handle, abfd, &debug, swap, info);
}
if (gptab_data_sec != NULL)
{
if (! bfd_set_section_contents (abfd, gptab_data_sec,
gptab_data_sec->contents,
0, gptab_data_sec->size))
return FALSE;
}
if (gptab_bss_sec != NULL)
{
if (! bfd_set_section_contents (abfd, gptab_bss_sec,
gptab_bss_sec->contents,
0, gptab_bss_sec->size))
return FALSE;
}
if (SGI_COMPAT (abfd))
{
rtproc_sec = bfd_get_section_by_name (abfd, ".rtproc");
if (rtproc_sec != NULL)
{
if (! bfd_set_section_contents (abfd, rtproc_sec,
rtproc_sec->contents,
0, rtproc_sec->size))
return FALSE;
}
}
return TRUE;
}
/* Merge object file header flags from IBFD into OBFD. Raise an error
if there are conflicting settings. */
static bfd_boolean
mips_elf_merge_obj_e_flags (bfd *ibfd, struct bfd_link_info *info)
{
bfd *obfd = info->output_bfd;
struct mips_elf_obj_tdata *out_tdata = mips_elf_tdata (obfd);
flagword old_flags;
flagword new_flags;
bfd_boolean ok;
new_flags = elf_elfheader (ibfd)->e_flags;
elf_elfheader (obfd)->e_flags |= new_flags & EF_MIPS_NOREORDER;
old_flags = elf_elfheader (obfd)->e_flags;
/* Check flag compatibility. */
new_flags &= ~EF_MIPS_NOREORDER;
old_flags &= ~EF_MIPS_NOREORDER;
/* Some IRIX 6 BSD-compatibility objects have this bit set. It
doesn't seem to matter. */
new_flags &= ~EF_MIPS_XGOT;
old_flags &= ~EF_MIPS_XGOT;
/* MIPSpro generates ucode info in n64 objects. Again, we should
just be able to ignore this. */
new_flags &= ~EF_MIPS_UCODE;
old_flags &= ~EF_MIPS_UCODE;
/* DSOs should only be linked with CPIC code. */
if ((ibfd->flags & DYNAMIC) != 0)
new_flags |= EF_MIPS_PIC | EF_MIPS_CPIC;
if (new_flags == old_flags)
return TRUE;
ok = TRUE;
if (((new_flags & (EF_MIPS_PIC | EF_MIPS_CPIC)) != 0)
!= ((old_flags & (EF_MIPS_PIC | EF_MIPS_CPIC)) != 0))
{
_bfd_error_handler
(_("%pB: warning: linking abicalls files with non-abicalls files"),
ibfd);
ok = TRUE;
}
if (new_flags & (EF_MIPS_PIC | EF_MIPS_CPIC))
elf_elfheader (obfd)->e_flags |= EF_MIPS_CPIC;
if (! (new_flags & EF_MIPS_PIC))
elf_elfheader (obfd)->e_flags &= ~EF_MIPS_PIC;
new_flags &= ~ (EF_MIPS_PIC | EF_MIPS_CPIC);
old_flags &= ~ (EF_MIPS_PIC | EF_MIPS_CPIC);
/* Compare the ISAs. */
if (mips_32bit_flags_p (old_flags) != mips_32bit_flags_p (new_flags))
{
_bfd_error_handler
(_("%pB: linking 32-bit code with 64-bit code"),
ibfd);
ok = FALSE;
}
else if (!mips_mach_extends_p (bfd_get_mach (ibfd), bfd_get_mach (obfd)))
{
/* OBFD's ISA isn't the same as, or an extension of, IBFD's. */
if (mips_mach_extends_p (bfd_get_mach (obfd), bfd_get_mach (ibfd)))
{
/* Copy the architecture info from IBFD to OBFD. Also copy
the 32-bit flag (if set) so that we continue to recognise
OBFD as a 32-bit binary. */
bfd_set_arch_info (obfd, bfd_get_arch_info (ibfd));
elf_elfheader (obfd)->e_flags &= ~(EF_MIPS_ARCH | EF_MIPS_MACH);
elf_elfheader (obfd)->e_flags
|= new_flags & (EF_MIPS_ARCH | EF_MIPS_MACH | EF_MIPS_32BITMODE);
/* Update the ABI flags isa_level, isa_rev, isa_ext fields. */
update_mips_abiflags_isa (obfd, &out_tdata->abiflags);
/* Copy across the ABI flags if OBFD doesn't use them
and if that was what caused us to treat IBFD as 32-bit. */
if ((old_flags & EF_MIPS_ABI) == 0
&& mips_32bit_flags_p (new_flags)
&& !mips_32bit_flags_p (new_flags & ~EF_MIPS_ABI))
elf_elfheader (obfd)->e_flags |= new_flags & EF_MIPS_ABI;
}
else
{
/* The ISAs aren't compatible. */
_bfd_error_handler
/* xgettext:c-format */
(_("%pB: linking %s module with previous %s modules"),
ibfd,
bfd_printable_name (ibfd),
bfd_printable_name (obfd));
ok = FALSE;
}
}
new_flags &= ~(EF_MIPS_ARCH | EF_MIPS_MACH | EF_MIPS_32BITMODE);
old_flags &= ~(EF_MIPS_ARCH | EF_MIPS_MACH | EF_MIPS_32BITMODE);
/* Compare ABIs. The 64-bit ABI does not use EF_MIPS_ABI. But, it
does set EI_CLASS differently from any 32-bit ABI. */
if ((new_flags & EF_MIPS_ABI) != (old_flags & EF_MIPS_ABI)
|| (elf_elfheader (ibfd)->e_ident[EI_CLASS]
!= elf_elfheader (obfd)->e_ident[EI_CLASS]))
{
/* Only error if both are set (to different values). */
if (((new_flags & EF_MIPS_ABI) && (old_flags & EF_MIPS_ABI))
|| (elf_elfheader (ibfd)->e_ident[EI_CLASS]
!= elf_elfheader (obfd)->e_ident[EI_CLASS]))
{
_bfd_error_handler
/* xgettext:c-format */
(_("%pB: ABI mismatch: linking %s module with previous %s modules"),
ibfd,
elf_mips_abi_name (ibfd),
elf_mips_abi_name (obfd));
ok = FALSE;
}
new_flags &= ~EF_MIPS_ABI;
old_flags &= ~EF_MIPS_ABI;
}
/* Compare ASEs. Forbid linking MIPS16 and microMIPS ASE modules together
and allow arbitrary mixing of the remaining ASEs (retain the union). */
if ((new_flags & EF_MIPS_ARCH_ASE) != (old_flags & EF_MIPS_ARCH_ASE))
{
int old_micro = old_flags & EF_MIPS_ARCH_ASE_MICROMIPS;
int new_micro = new_flags & EF_MIPS_ARCH_ASE_MICROMIPS;
int old_m16 = old_flags & EF_MIPS_ARCH_ASE_M16;
int new_m16 = new_flags & EF_MIPS_ARCH_ASE_M16;
int micro_mis = old_m16 && new_micro;
int m16_mis = old_micro && new_m16;
if (m16_mis || micro_mis)
{
_bfd_error_handler
/* xgettext:c-format */
(_("%pB: ASE mismatch: linking %s module with previous %s modules"),
ibfd,
m16_mis ? "MIPS16" : "microMIPS",
m16_mis ? "microMIPS" : "MIPS16");
ok = FALSE;
}
elf_elfheader (obfd)->e_flags |= new_flags & EF_MIPS_ARCH_ASE;
new_flags &= ~ EF_MIPS_ARCH_ASE;
old_flags &= ~ EF_MIPS_ARCH_ASE;
}
/* Compare NaN encodings. */
if ((new_flags & EF_MIPS_NAN2008) != (old_flags & EF_MIPS_NAN2008))
{
/* xgettext:c-format */
_bfd_error_handler (_("%pB: linking %s module with previous %s modules"),
ibfd,
(new_flags & EF_MIPS_NAN2008
? "-mnan=2008" : "-mnan=legacy"),
(old_flags & EF_MIPS_NAN2008
? "-mnan=2008" : "-mnan=legacy"));
ok = FALSE;
new_flags &= ~EF_MIPS_NAN2008;
old_flags &= ~EF_MIPS_NAN2008;
}
/* Compare FP64 state. */
if ((new_flags & EF_MIPS_FP64) != (old_flags & EF_MIPS_FP64))
{
/* xgettext:c-format */
_bfd_error_handler (_("%pB: linking %s module with previous %s modules"),
ibfd,
(new_flags & EF_MIPS_FP64
? "-mfp64" : "-mfp32"),
(old_flags & EF_MIPS_FP64
? "-mfp64" : "-mfp32"));
ok = FALSE;
new_flags &= ~EF_MIPS_FP64;
old_flags &= ~EF_MIPS_FP64;
}
/* Warn about any other mismatches */
if (new_flags != old_flags)
{
/* xgettext:c-format */
_bfd_error_handler
(_("%pB: uses different e_flags (%#x) fields than previous modules "
"(%#x)"),
ibfd, new_flags, old_flags);
ok = FALSE;
}
return ok;
}
/* Merge object attributes from IBFD into OBFD. Raise an error if
there are conflicting attributes. */
static bfd_boolean
mips_elf_merge_obj_attributes (bfd *ibfd, struct bfd_link_info *info)
{
bfd *obfd = info->output_bfd;
obj_attribute *in_attr;
obj_attribute *out_attr;
bfd *abi_fp_bfd;
bfd *abi_msa_bfd;
abi_fp_bfd = mips_elf_tdata (obfd)->abi_fp_bfd;
in_attr = elf_known_obj_attributes (ibfd)[OBJ_ATTR_GNU];
if (!abi_fp_bfd && in_attr[Tag_GNU_MIPS_ABI_FP].i != Val_GNU_MIPS_ABI_FP_ANY)
mips_elf_tdata (obfd)->abi_fp_bfd = ibfd;
abi_msa_bfd = mips_elf_tdata (obfd)->abi_msa_bfd;
if (!abi_msa_bfd
&& in_attr[Tag_GNU_MIPS_ABI_MSA].i != Val_GNU_MIPS_ABI_MSA_ANY)
mips_elf_tdata (obfd)->abi_msa_bfd = ibfd;
if (!elf_known_obj_attributes_proc (obfd)[0].i)
{
/* This is the first object. Copy the attributes. */
_bfd_elf_copy_obj_attributes (ibfd, obfd);
/* Use the Tag_null value to indicate the attributes have been
initialized. */
elf_known_obj_attributes_proc (obfd)[0].i = 1;
return TRUE;
}
/* Check for conflicting Tag_GNU_MIPS_ABI_FP attributes and merge
non-conflicting ones. */
out_attr = elf_known_obj_attributes (obfd)[OBJ_ATTR_GNU];
if (in_attr[Tag_GNU_MIPS_ABI_FP].i != out_attr[Tag_GNU_MIPS_ABI_FP].i)
{
int out_fp, in_fp;
out_fp = out_attr[Tag_GNU_MIPS_ABI_FP].i;
in_fp = in_attr[Tag_GNU_MIPS_ABI_FP].i;
out_attr[Tag_GNU_MIPS_ABI_FP].type = 1;
if (out_fp == Val_GNU_MIPS_ABI_FP_ANY)
out_attr[Tag_GNU_MIPS_ABI_FP].i = in_fp;
else if (out_fp == Val_GNU_MIPS_ABI_FP_XX
&& (in_fp == Val_GNU_MIPS_ABI_FP_DOUBLE
|| in_fp == Val_GNU_MIPS_ABI_FP_64
|| in_fp == Val_GNU_MIPS_ABI_FP_64A))
{
mips_elf_tdata (obfd)->abi_fp_bfd = ibfd;
out_attr[Tag_GNU_MIPS_ABI_FP].i = in_attr[Tag_GNU_MIPS_ABI_FP].i;
}
else if (in_fp == Val_GNU_MIPS_ABI_FP_XX
&& (out_fp == Val_GNU_MIPS_ABI_FP_DOUBLE
|| out_fp == Val_GNU_MIPS_ABI_FP_64
|| out_fp == Val_GNU_MIPS_ABI_FP_64A))
/* Keep the current setting. */;
else if (out_fp == Val_GNU_MIPS_ABI_FP_64A
&& in_fp == Val_GNU_MIPS_ABI_FP_64)
{
mips_elf_tdata (obfd)->abi_fp_bfd = ibfd;
out_attr[Tag_GNU_MIPS_ABI_FP].i = in_attr[Tag_GNU_MIPS_ABI_FP].i;
}
else if (in_fp == Val_GNU_MIPS_ABI_FP_64A
&& out_fp == Val_GNU_MIPS_ABI_FP_64)
/* Keep the current setting. */;
else if (in_fp != Val_GNU_MIPS_ABI_FP_ANY)
{
const char *out_string, *in_string;
out_string = _bfd_mips_fp_abi_string (out_fp);
in_string = _bfd_mips_fp_abi_string (in_fp);
/* First warn about cases involving unrecognised ABIs. */
if (!out_string && !in_string)
/* xgettext:c-format */
_bfd_error_handler
(_("warning: %pB uses unknown floating point ABI %d "
"(set by %pB), %pB uses unknown floating point ABI %d"),
obfd, out_fp, abi_fp_bfd, ibfd, in_fp);
else if (!out_string)
_bfd_error_handler
/* xgettext:c-format */
(_("warning: %pB uses unknown floating point ABI %d "
"(set by %pB), %pB uses %s"),
obfd, out_fp, abi_fp_bfd, ibfd, in_string);
else if (!in_string)
_bfd_error_handler
/* xgettext:c-format */
(_("warning: %pB uses %s (set by %pB), "
"%pB uses unknown floating point ABI %d"),
obfd, out_string, abi_fp_bfd, ibfd, in_fp);
else
{
/* If one of the bfds is soft-float, the other must be
hard-float. The exact choice of hard-float ABI isn't
really relevant to the error message. */
if (in_fp == Val_GNU_MIPS_ABI_FP_SOFT)
out_string = "-mhard-float";
else if (out_fp == Val_GNU_MIPS_ABI_FP_SOFT)
in_string = "-mhard-float";
_bfd_error_handler
/* xgettext:c-format */
(_("warning: %pB uses %s (set by %pB), %pB uses %s"),
obfd, out_string, abi_fp_bfd, ibfd, in_string);
}
}
}
/* Check for conflicting Tag_GNU_MIPS_ABI_MSA attributes and merge
non-conflicting ones. */
if (in_attr[Tag_GNU_MIPS_ABI_MSA].i != out_attr[Tag_GNU_MIPS_ABI_MSA].i)
{
out_attr[Tag_GNU_MIPS_ABI_MSA].type = 1;
if (out_attr[Tag_GNU_MIPS_ABI_MSA].i == Val_GNU_MIPS_ABI_MSA_ANY)
out_attr[Tag_GNU_MIPS_ABI_MSA].i = in_attr[Tag_GNU_MIPS_ABI_MSA].i;
else if (in_attr[Tag_GNU_MIPS_ABI_MSA].i != Val_GNU_MIPS_ABI_MSA_ANY)
switch (out_attr[Tag_GNU_MIPS_ABI_MSA].i)
{
case Val_GNU_MIPS_ABI_MSA_128:
_bfd_error_handler
/* xgettext:c-format */
(_("warning: %pB uses %s (set by %pB), "
"%pB uses unknown MSA ABI %d"),
obfd, "-mmsa", abi_msa_bfd,
ibfd, in_attr[Tag_GNU_MIPS_ABI_MSA].i);
break;
default:
switch (in_attr[Tag_GNU_MIPS_ABI_MSA].i)
{
case Val_GNU_MIPS_ABI_MSA_128:
_bfd_error_handler
/* xgettext:c-format */
(_("warning: %pB uses unknown MSA ABI %d "
"(set by %pB), %pB uses %s"),
obfd, out_attr[Tag_GNU_MIPS_ABI_MSA].i,
abi_msa_bfd, ibfd, "-mmsa");
break;
default:
_bfd_error_handler
/* xgettext:c-format */
(_("warning: %pB uses unknown MSA ABI %d "
"(set by %pB), %pB uses unknown MSA ABI %d"),
obfd, out_attr[Tag_GNU_MIPS_ABI_MSA].i,
abi_msa_bfd, ibfd, in_attr[Tag_GNU_MIPS_ABI_MSA].i);
break;
}
}
}
/* Merge Tag_compatibility attributes and any common GNU ones. */
return _bfd_elf_merge_object_attributes (ibfd, info);
}
/* Merge object ABI flags from IBFD into OBFD. Raise an error if
there are conflicting settings. */
static bfd_boolean
mips_elf_merge_obj_abiflags (bfd *ibfd, bfd *obfd)
{
obj_attribute *out_attr = elf_known_obj_attributes (obfd)[OBJ_ATTR_GNU];
struct mips_elf_obj_tdata *out_tdata = mips_elf_tdata (obfd);
struct mips_elf_obj_tdata *in_tdata = mips_elf_tdata (ibfd);
/* Update the output abiflags fp_abi using the computed fp_abi. */
out_tdata->abiflags.fp_abi = out_attr[Tag_GNU_MIPS_ABI_FP].i;
#define max(a, b) ((a) > (b) ? (a) : (b))
/* Merge abiflags. */
out_tdata->abiflags.isa_level = max (out_tdata->abiflags.isa_level,
in_tdata->abiflags.isa_level);
out_tdata->abiflags.isa_rev = max (out_tdata->abiflags.isa_rev,
in_tdata->abiflags.isa_rev);
out_tdata->abiflags.gpr_size = max (out_tdata->abiflags.gpr_size,
in_tdata->abiflags.gpr_size);
out_tdata->abiflags.cpr1_size = max (out_tdata->abiflags.cpr1_size,
in_tdata->abiflags.cpr1_size);
out_tdata->abiflags.cpr2_size = max (out_tdata->abiflags.cpr2_size,
in_tdata->abiflags.cpr2_size);
#undef max
out_tdata->abiflags.ases |= in_tdata->abiflags.ases;
out_tdata->abiflags.flags1 |= in_tdata->abiflags.flags1;
return TRUE;
}
/* Merge backend specific data from an object file to the output
object file when linking. */
bfd_boolean
_bfd_mips_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
{
bfd *obfd = info->output_bfd;
struct mips_elf_obj_tdata *out_tdata;
struct mips_elf_obj_tdata *in_tdata;
bfd_boolean null_input_bfd = TRUE;
asection *sec;
bfd_boolean ok;
/* Check if we have the same endianness. */
if (! _bfd_generic_verify_endian_match (ibfd, info))
{
_bfd_error_handler
(_("%pB: endianness incompatible with that of the selected emulation"),
ibfd);
return FALSE;
}
if (!is_mips_elf (ibfd) || !is_mips_elf (obfd))
return TRUE;
in_tdata = mips_elf_tdata (ibfd);
out_tdata = mips_elf_tdata (obfd);
if (strcmp (bfd_get_target (ibfd), bfd_get_target (obfd)) != 0)
{
_bfd_error_handler
(_("%pB: ABI is incompatible with that of the selected emulation"),
ibfd);
return FALSE;
}
/* Check to see if the input BFD actually contains any sections. If not,
then it has no attributes, and its flags may not have been initialized
either, but it cannot actually cause any incompatibility. */
/* FIXME: This excludes any input shared library from consideration. */
for (sec = ibfd->sections; sec != NULL; sec = sec->next)
{
/* Ignore synthetic sections and empty .text, .data and .bss sections
which are automatically generated by gas. Also ignore fake
(s)common sections, since merely defining a common symbol does
not affect compatibility. */
if ((sec->flags & SEC_IS_COMMON) == 0
&& strcmp (sec->name, ".reginfo")
&& strcmp (sec->name, ".mdebug")
&& (sec->size != 0
|| (strcmp (sec->name, ".text")
&& strcmp (sec->name, ".data")
&& strcmp (sec->name, ".bss"))))
{
null_input_bfd = FALSE;
break;
}
}
if (null_input_bfd)
return TRUE;
/* Populate abiflags using existing information. */
if (in_tdata->abiflags_valid)
{
obj_attribute *in_attr = elf_known_obj_attributes (ibfd)[OBJ_ATTR_GNU];
Elf_Internal_ABIFlags_v0 in_abiflags;
Elf_Internal_ABIFlags_v0 abiflags;
/* Set up the FP ABI attribute from the abiflags if it is not already
set. */
if (in_attr[Tag_GNU_MIPS_ABI_FP].i == Val_GNU_MIPS_ABI_FP_ANY)
in_attr[Tag_GNU_MIPS_ABI_FP].i = in_tdata->abiflags.fp_abi;
infer_mips_abiflags (ibfd, &abiflags);
in_abiflags = in_tdata->abiflags;
/* It is not possible to infer the correct ISA revision
for R3 or R5 so drop down to R2 for the checks. */
if (in_abiflags.isa_rev == 3 || in_abiflags.isa_rev == 5)
in_abiflags.isa_rev = 2;
if (LEVEL_REV (in_abiflags.isa_level, in_abiflags.isa_rev)
< LEVEL_REV (abiflags.isa_level, abiflags.isa_rev))
_bfd_error_handler
(_("%pB: warning: inconsistent ISA between e_flags and "
".MIPS.abiflags"), ibfd);
if (abiflags.fp_abi != Val_GNU_MIPS_ABI_FP_ANY
&& in_abiflags.fp_abi != abiflags.fp_abi)
_bfd_error_handler
(_("%pB: warning: inconsistent FP ABI between .gnu.attributes and "
".MIPS.abiflags"), ibfd);
if ((in_abiflags.ases & abiflags.ases) != abiflags.ases)
_bfd_error_handler
(_("%pB: warning: inconsistent ASEs between e_flags and "
".MIPS.abiflags"), ibfd);
/* The isa_ext is allowed to be an extension of what can be inferred
from e_flags. */
if (!mips_mach_extends_p (bfd_mips_isa_ext_mach (abiflags.isa_ext),
bfd_mips_isa_ext_mach (in_abiflags.isa_ext)))
_bfd_error_handler
(_("%pB: warning: inconsistent ISA extensions between e_flags and "
".MIPS.abiflags"), ibfd);
if (in_abiflags.flags2 != 0)
_bfd_error_handler
(_("%pB: warning: unexpected flag in the flags2 field of "
".MIPS.abiflags (0x%lx)"), ibfd,
in_abiflags.flags2);
}
else
{
infer_mips_abiflags (ibfd, &in_tdata->abiflags);
in_tdata->abiflags_valid = TRUE;
}
if (!out_tdata->abiflags_valid)
{
/* Copy input abiflags if output abiflags are not already valid. */
out_tdata->abiflags = in_tdata->abiflags;
out_tdata->abiflags_valid = TRUE;
}
if (! elf_flags_init (obfd))
{
elf_flags_init (obfd) = TRUE;
elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
elf_elfheader (obfd)->e_ident[EI_CLASS]
= elf_elfheader (ibfd)->e_ident[EI_CLASS];
if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
&& (bfd_get_arch_info (obfd)->the_default
|| mips_mach_extends_p (bfd_get_mach (obfd),
bfd_get_mach (ibfd))))
{
if (! bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
bfd_get_mach (ibfd)))
return FALSE;
/* Update the ABI flags isa_level, isa_rev and isa_ext fields. */
update_mips_abiflags_isa (obfd, &out_tdata->abiflags);
}
ok = TRUE;
}
else
ok = mips_elf_merge_obj_e_flags (ibfd, info);
ok = mips_elf_merge_obj_attributes (ibfd, info) && ok;
ok = mips_elf_merge_obj_abiflags (ibfd, obfd) && ok;
if (!ok)
{
bfd_set_error (bfd_error_bad_value);
return FALSE;
}
return TRUE;
}
/* Function to keep MIPS specific file flags like as EF_MIPS_PIC. */
bfd_boolean
_bfd_mips_elf_set_private_flags (bfd *abfd, flagword flags)
{
BFD_ASSERT (!elf_flags_init (abfd)
|| elf_elfheader (abfd)->e_flags == flags);
elf_elfheader (abfd)->e_flags = flags;
elf_flags_init (abfd) = TRUE;
return TRUE;
}
char *
_bfd_mips_elf_get_target_dtag (bfd_vma dtag)
{
switch (dtag)
{
default: return "";
case DT_MIPS_RLD_VERSION:
return "MIPS_RLD_VERSION";
case DT_MIPS_TIME_STAMP:
return "MIPS_TIME_STAMP";
case DT_MIPS_ICHECKSUM:
return "MIPS_ICHECKSUM";
case DT_MIPS_IVERSION:
return "MIPS_IVERSION";
case DT_MIPS_FLAGS:
return "MIPS_FLAGS";
case DT_MIPS_BASE_ADDRESS:
return "MIPS_BASE_ADDRESS";
case DT_MIPS_MSYM:
return "MIPS_MSYM";
case DT_MIPS_CONFLICT:
return "MIPS_CONFLICT";
case DT_MIPS_LIBLIST:
return "MIPS_LIBLIST";
case DT_MIPS_LOCAL_GOTNO:
return "MIPS_LOCAL_GOTNO";
case DT_MIPS_CONFLICTNO:
return "MIPS_CONFLICTNO";
case DT_MIPS_LIBLISTNO:
return "MIPS_LIBLISTNO";
case DT_MIPS_SYMTABNO:
return "MIPS_SYMTABNO";
case DT_MIPS_UNREFEXTNO:
return "MIPS_UNREFEXTNO";
case DT_MIPS_GOTSYM:
return "MIPS_GOTSYM";
case DT_MIPS_HIPAGENO:
return "MIPS_HIPAGENO";
case DT_MIPS_RLD_MAP:
return "MIPS_RLD_MAP";
case DT_MIPS_RLD_MAP_REL:
return "MIPS_RLD_MAP_REL";
case DT_MIPS_DELTA_CLASS:
return "MIPS_DELTA_CLASS";
case DT_MIPS_DELTA_CLASS_NO:
return "MIPS_DELTA_CLASS_NO";
case DT_MIPS_DELTA_INSTANCE:
return "MIPS_DELTA_INSTANCE";
case DT_MIPS_DELTA_INSTANCE_NO:
return "MIPS_DELTA_INSTANCE_NO";
case DT_MIPS_DELTA_RELOC:
return "MIPS_DELTA_RELOC";
case DT_MIPS_DELTA_RELOC_NO:
return "MIPS_DELTA_RELOC_NO";
case DT_MIPS_DELTA_SYM:
return "MIPS_DELTA_SYM";
case DT_MIPS_DELTA_SYM_NO:
return "MIPS_DELTA_SYM_NO";
case DT_MIPS_DELTA_CLASSSYM:
return "MIPS_DELTA_CLASSSYM";
case DT_MIPS_DELTA_CLASSSYM_NO:
return "MIPS_DELTA_CLASSSYM_NO";
case DT_MIPS_CXX_FLAGS:
return "MIPS_CXX_FLAGS";
case DT_MIPS_PIXIE_INIT:
return "MIPS_PIXIE_INIT";
case DT_MIPS_SYMBOL_LIB:
return "MIPS_SYMBOL_LIB";
case DT_MIPS_LOCALPAGE_GOTIDX:
return "MIPS_LOCALPAGE_GOTIDX";
case DT_MIPS_LOCAL_GOTIDX:
return "MIPS_LOCAL_GOTIDX";
case DT_MIPS_HIDDEN_GOTIDX:
return "MIPS_HIDDEN_GOTIDX";
case DT_MIPS_PROTECTED_GOTIDX:
return "MIPS_PROTECTED_GOT_IDX";
case DT_MIPS_OPTIONS:
return "MIPS_OPTIONS";
case DT_MIPS_INTERFACE:
return "MIPS_INTERFACE";
case DT_MIPS_DYNSTR_ALIGN:
return "DT_MIPS_DYNSTR_ALIGN";
case DT_MIPS_INTERFACE_SIZE:
return "DT_MIPS_INTERFACE_SIZE";
case DT_MIPS_RLD_TEXT_RESOLVE_ADDR:
return "DT_MIPS_RLD_TEXT_RESOLVE_ADDR";
case DT_MIPS_PERF_SUFFIX:
return "DT_MIPS_PERF_SUFFIX";
case DT_MIPS_COMPACT_SIZE:
return "DT_MIPS_COMPACT_SIZE";
case DT_MIPS_GP_VALUE:
return "DT_MIPS_GP_VALUE";
case DT_MIPS_AUX_DYNAMIC:
return "DT_MIPS_AUX_DYNAMIC";
case DT_MIPS_PLTGOT:
return "DT_MIPS_PLTGOT";
case DT_MIPS_RWPLT:
return "DT_MIPS_RWPLT";
case DT_MIPS_XHASH:
return "DT_MIPS_XHASH";
}
}
/* Return the meaning of Tag_GNU_MIPS_ABI_FP value FP, or null if
not known. */
const char *
_bfd_mips_fp_abi_string (int fp)
{
switch (fp)
{
/* These strings aren't translated because they're simply
option lists. */
case Val_GNU_MIPS_ABI_FP_DOUBLE:
return "-mdouble-float";
case Val_GNU_MIPS_ABI_FP_SINGLE:
return "-msingle-float";
case Val_GNU_MIPS_ABI_FP_SOFT:
return "-msoft-float";
case Val_GNU_MIPS_ABI_FP_OLD_64:
return _("-mips32r2 -mfp64 (12 callee-saved)");
case Val_GNU_MIPS_ABI_FP_XX:
return "-mfpxx";
case Val_GNU_MIPS_ABI_FP_64:
return "-mgp32 -mfp64";
case Val_GNU_MIPS_ABI_FP_64A:
return "-mgp32 -mfp64 -mno-odd-spreg";
default:
return 0;
}
}
static void
print_mips_ases (FILE *file, unsigned int mask)
{
if (mask & AFL_ASE_DSP)
fputs ("\n\tDSP ASE", file);
if (mask & AFL_ASE_DSPR2)
fputs ("\n\tDSP R2 ASE", file);
if (mask & AFL_ASE_DSPR3)
fputs ("\n\tDSP R3 ASE", file);
if (mask & AFL_ASE_EVA)
fputs ("\n\tEnhanced VA Scheme", file);
if (mask & AFL_ASE_MCU)
fputs ("\n\tMCU (MicroController) ASE", file);
if (mask & AFL_ASE_MDMX)
fputs ("\n\tMDMX ASE", file);
if (mask & AFL_ASE_MIPS3D)
fputs ("\n\tMIPS-3D ASE", file);
if (mask & AFL_ASE_MT)
fputs ("\n\tMT ASE", file);
if (mask & AFL_ASE_SMARTMIPS)
fputs ("\n\tSmartMIPS ASE", file);
if (mask & AFL_ASE_VIRT)
fputs ("\n\tVZ ASE", file);
if (mask & AFL_ASE_MSA)
fputs ("\n\tMSA ASE", file);
if (mask & AFL_ASE_MIPS16)
fputs ("\n\tMIPS16 ASE", file);
if (mask & AFL_ASE_MICROMIPS)
fputs ("\n\tMICROMIPS ASE", file);
if (mask & AFL_ASE_XPA)
fputs ("\n\tXPA ASE", file);
if (mask & AFL_ASE_MIPS16E2)
fputs ("\n\tMIPS16e2 ASE", file);
if (mask & AFL_ASE_CRC)
fputs ("\n\tCRC ASE", file);
if (mask & AFL_ASE_GINV)
fputs ("\n\tGINV ASE", file);
if (mask & AFL_ASE_LOONGSON_MMI)
fputs ("\n\tLoongson MMI ASE", file);
if (mask & AFL_ASE_LOONGSON_CAM)
fputs ("\n\tLoongson CAM ASE", file);
if (mask & AFL_ASE_LOONGSON_EXT)
fputs ("\n\tLoongson EXT ASE", file);
if (mask & AFL_ASE_LOONGSON_EXT2)
fputs ("\n\tLoongson EXT2 ASE", file);
if (mask == 0)
fprintf (file, "\n\t%s", _("None"));
else if ((mask & ~AFL_ASE_MASK) != 0)
fprintf (stdout, "\n\t%s (%x)", _("Unknown"), mask & ~AFL_ASE_MASK);
}
static void
print_mips_isa_ext (FILE *file, unsigned int isa_ext)
{
switch (isa_ext)
{
case 0:
fputs (_("None"), file);
break;
case AFL_EXT_XLR:
fputs ("RMI XLR", file);
break;
case AFL_EXT_OCTEON3:
fputs ("Cavium Networks Octeon3", file);
break;
case AFL_EXT_OCTEON2:
fputs ("Cavium Networks Octeon2", file);
break;
case AFL_EXT_OCTEONP:
fputs ("Cavium Networks OcteonP", file);
break;
case AFL_EXT_OCTEON:
fputs ("Cavium Networks Octeon", file);
break;
case AFL_EXT_5900:
fputs ("Toshiba R5900", file);
break;
case AFL_EXT_4650:
fputs ("MIPS R4650", file);
break;
case AFL_EXT_4010:
fputs ("LSI R4010", file);
break;
case AFL_EXT_4100:
fputs ("NEC VR4100", file);
break;
case AFL_EXT_3900:
fputs ("Toshiba R3900", file);
break;
case AFL_EXT_10000:
fputs ("MIPS R10000", file);
break;
case AFL_EXT_SB1:
fputs ("Broadcom SB-1", file);
break;
case AFL_EXT_4111:
fputs ("NEC VR4111/VR4181", file);
break;
case AFL_EXT_4120:
fputs ("NEC VR4120", file);
break;
case AFL_EXT_5400:
fputs ("NEC VR5400", file);
break;
case AFL_EXT_5500:
fputs ("NEC VR5500", file);
break;
case AFL_EXT_LOONGSON_2E:
fputs ("ST Microelectronics Loongson 2E", file);
break;
case AFL_EXT_LOONGSON_2F:
fputs ("ST Microelectronics Loongson 2F", file);
break;
case AFL_EXT_INTERAPTIV_MR2:
fputs ("Imagination interAptiv MR2", file);
break;
default:
fprintf (file, "%s (%d)", _("Unknown"), isa_ext);
break;
}
}
static void
print_mips_fp_abi_value (FILE *file, int val)
{
switch (val)
{
case Val_GNU_MIPS_ABI_FP_ANY:
fprintf (file, _("Hard or soft float\n"));
break;
case Val_GNU_MIPS_ABI_FP_DOUBLE:
fprintf (file, _("Hard float (double precision)\n"));
break;
case Val_GNU_MIPS_ABI_FP_SINGLE:
fprintf (file, _("Hard float (single precision)\n"));
break;
case Val_GNU_MIPS_ABI_FP_SOFT:
fprintf (file, _("Soft float\n"));
break;
case Val_GNU_MIPS_ABI_FP_OLD_64:
fprintf (file, _("Hard float (MIPS32r2 64-bit FPU 12 callee-saved)\n"));
break;
case Val_GNU_MIPS_ABI_FP_XX:
fprintf (file, _("Hard float (32-bit CPU, Any FPU)\n"));
break;
case Val_GNU_MIPS_ABI_FP_64:
fprintf (file, _("Hard float (32-bit CPU, 64-bit FPU)\n"));
break;
case Val_GNU_MIPS_ABI_FP_64A:
fprintf (file, _("Hard float compat (32-bit CPU, 64-bit FPU)\n"));
break;
default:
fprintf (file, "??? (%d)\n", val);
break;
}
}
static int
get_mips_reg_size (int reg_size)
{
return (reg_size == AFL_REG_NONE) ? 0
: (reg_size == AFL_REG_32) ? 32
: (reg_size == AFL_REG_64) ? 64
: (reg_size == AFL_REG_128) ? 128
: -1;
}
bfd_boolean
_bfd_mips_elf_print_private_bfd_data (bfd *abfd, void *ptr)
{
FILE *file = ptr;
BFD_ASSERT (abfd != NULL && ptr != NULL);
/* Print normal ELF private data. */
_bfd_elf_print_private_bfd_data (abfd, ptr);
/* xgettext:c-format */
fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
if ((elf_elfheader (abfd)->e_flags & EF_MIPS_ABI) == E_MIPS_ABI_O32)
fprintf (file, _(" [abi=O32]"));
else if ((elf_elfheader (abfd)->e_flags & EF_MIPS_ABI) == E_MIPS_ABI_O64)
fprintf (file, _(" [abi=O64]"));
else if ((elf_elfheader (abfd)->e_flags & EF_MIPS_ABI) == E_MIPS_ABI_EABI32)
fprintf (file, _(" [abi=EABI32]"));
else if ((elf_elfheader (abfd)->e_flags & EF_MIPS_ABI) == E_MIPS_ABI_EABI64)
fprintf (file, _(" [abi=EABI64]"));
else if ((elf_elfheader (abfd)->e_flags & EF_MIPS_ABI))
fprintf (file, _(" [abi unknown]"));
else if (ABI_N32_P (abfd))
fprintf (file, _(" [abi=N32]"));
else if (ABI_64_P (abfd))
fprintf (file, _(" [abi=64]"));
else
fprintf (file, _(" [no abi set]"));
if ((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) == E_MIPS_ARCH_1)
fprintf (file, " [mips1]");
else if ((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) == E_MIPS_ARCH_2)
fprintf (file, " [mips2]");
else if ((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) == E_MIPS_ARCH_3)
fprintf (file, " [mips3]");
else if ((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) == E_MIPS_ARCH_4)
fprintf (file, " [mips4]");
else if ((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) == E_MIPS_ARCH_5)
fprintf (file, " [mips5]");
else if ((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) == E_MIPS_ARCH_32)
fprintf (file, " [mips32]");
else if ((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) == E_MIPS_ARCH_64)
fprintf (file, " [mips64]");
else if ((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) == E_MIPS_ARCH_32R2)
fprintf (file, " [mips32r2]");
else if ((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) == E_MIPS_ARCH_64R2)
fprintf (file, " [mips64r2]");
else if ((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) == E_MIPS_ARCH_32R6)
fprintf (file, " [mips32r6]");
else if ((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) == E_MIPS_ARCH_64R6)
fprintf (file, " [mips64r6]");
else
fprintf (file, _(" [unknown ISA]"));
if (elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH_ASE_MDMX)
fprintf (file, " [mdmx]");
if (elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH_ASE_M16)
fprintf (file, " [mips16]");
if (elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH_ASE_MICROMIPS)
fprintf (file, " [micromips]");
if (elf_elfheader (abfd)->e_flags & EF_MIPS_NAN2008)
fprintf (file, " [nan2008]");
if (elf_elfheader (abfd)->e_flags & EF_MIPS_FP64)
fprintf (file, " [old fp64]");
if (elf_elfheader (abfd)->e_flags & EF_MIPS_32BITMODE)
fprintf (file, " [32bitmode]");
else
fprintf (file, _(" [not 32bitmode]"));
if (elf_elfheader (abfd)->e_flags & EF_MIPS_NOREORDER)
fprintf (file, " [noreorder]");
if (elf_elfheader (abfd)->e_flags & EF_MIPS_PIC)
fprintf (file, " [PIC]");
if (elf_elfheader (abfd)->e_flags & EF_MIPS_CPIC)
fprintf (file, " [CPIC]");
if (elf_elfheader (abfd)->e_flags & EF_MIPS_XGOT)
fprintf (file, " [XGOT]");
if (elf_elfheader (abfd)->e_flags & EF_MIPS_UCODE)
fprintf (file, " [UCODE]");
fputc ('\n', file);
if (mips_elf_tdata (abfd)->abiflags_valid)
{
Elf_Internal_ABIFlags_v0 *abiflags = &mips_elf_tdata (abfd)->abiflags;
fprintf (file, "\nMIPS ABI Flags Version: %d\n", abiflags->version);
fprintf (file, "\nISA: MIPS%d", abiflags->isa_level);
if (abiflags->isa_rev > 1)
fprintf (file, "r%d", abiflags->isa_rev);
fprintf (file, "\nGPR size: %d",
get_mips_reg_size (abiflags->gpr_size));
fprintf (file, "\nCPR1 size: %d",
get_mips_reg_size (abiflags->cpr1_size));
fprintf (file, "\nCPR2 size: %d",
get_mips_reg_size (abiflags->cpr2_size));
fputs ("\nFP ABI: ", file);
print_mips_fp_abi_value (file, abiflags->fp_abi);
fputs ("ISA Extension: ", file);
print_mips_isa_ext (file, abiflags->isa_ext);
fputs ("\nASEs:", file);
print_mips_ases (file, abiflags->ases);
fprintf (file, "\nFLAGS 1: %8.8lx", abiflags->flags1);
fprintf (file, "\nFLAGS 2: %8.8lx", abiflags->flags2);
fputc ('\n', file);
}
return TRUE;
}
const struct bfd_elf_special_section _bfd_mips_elf_special_sections[] =
{
{ STRING_COMMA_LEN (".lit4"), 0, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE + SHF_MIPS_GPREL },
{ STRING_COMMA_LEN (".lit8"), 0, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE + SHF_MIPS_GPREL },
{ STRING_COMMA_LEN (".mdebug"), 0, SHT_MIPS_DEBUG, 0 },
{ STRING_COMMA_LEN (".sbss"), -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE + SHF_MIPS_GPREL },
{ STRING_COMMA_LEN (".sdata"), -2, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE + SHF_MIPS_GPREL },
{ STRING_COMMA_LEN (".ucode"), 0, SHT_MIPS_UCODE, 0 },
{ STRING_COMMA_LEN (".MIPS.xhash"), 0, SHT_MIPS_XHASH, SHF_ALLOC },
{ NULL, 0, 0, 0, 0 }
};
/* Merge non visibility st_other attributes. Ensure that the
STO_OPTIONAL flag is copied into h->other, even if this is not a
definiton of the symbol. */
void
_bfd_mips_elf_merge_symbol_attribute (struct elf_link_hash_entry *h,
unsigned int st_other,
bfd_boolean definition,
bfd_boolean dynamic ATTRIBUTE_UNUSED)
{
if ((st_other & ~ELF_ST_VISIBILITY (-1)) != 0)
{
unsigned char other;
other = (definition ? st_other : h->other);
other &= ~ELF_ST_VISIBILITY (-1);
h->other = other | ELF_ST_VISIBILITY (h->other);
}
if (!definition
&& ELF_MIPS_IS_OPTIONAL (st_other))
h->other |= STO_OPTIONAL;
}
/* Decide whether an undefined symbol is special and can be ignored.
This is the case for OPTIONAL symbols on IRIX. */
bfd_boolean
_bfd_mips_elf_ignore_undef_symbol (struct elf_link_hash_entry *h)
{
return ELF_MIPS_IS_OPTIONAL (h->other) ? TRUE : FALSE;
}
bfd_boolean
_bfd_mips_elf_common_definition (Elf_Internal_Sym *sym)
{
return (sym->st_shndx == SHN_COMMON
|| sym->st_shndx == SHN_MIPS_ACOMMON
|| sym->st_shndx == SHN_MIPS_SCOMMON);
}
/* Return address for Ith PLT stub in section PLT, for relocation REL
or (bfd_vma) -1 if it should not be included. */
bfd_vma
_bfd_mips_elf_plt_sym_val (bfd_vma i, const asection *plt,
const arelent *rel ATTRIBUTE_UNUSED)
{
return (plt->vma
+ 4 * ARRAY_SIZE (mips_o32_exec_plt0_entry)
+ i * 4 * ARRAY_SIZE (mips_exec_plt_entry));
}
/* Build a table of synthetic symbols to represent the PLT. As with MIPS16
and microMIPS PLT slots we may have a many-to-one mapping between .plt
and .got.plt and also the slots may be of a different size each we walk
the PLT manually fetching instructions and matching them against known
patterns. To make things easier standard MIPS slots, if any, always come
first. As we don't create proper ELF symbols we use the UDATA.I member
of ASYMBOL to carry ISA annotation. The encoding used is the same as
with the ST_OTHER member of the ELF symbol. */
long
_bfd_mips_elf_get_synthetic_symtab (bfd *abfd,
long symcount ATTRIBUTE_UNUSED,
asymbol **syms ATTRIBUTE_UNUSED,
long dynsymcount, asymbol **dynsyms,
asymbol **ret)
{
static const char pltname[] = "_PROCEDURE_LINKAGE_TABLE_";
static const char microsuffix[] = "@micromipsplt";
static const char m16suffix[] = "@mips16plt";
static const char mipssuffix[] = "@plt";
bfd_boolean (*slurp_relocs) (bfd *, asection *, asymbol **, bfd_boolean);
const struct elf_backend_data *bed = get_elf_backend_data (abfd);
bfd_boolean micromips_p = MICROMIPS_P (abfd);
Elf_Internal_Shdr *hdr;
bfd_byte *plt_data;
bfd_vma plt_offset;
unsigned int other;
bfd_vma entry_size;
bfd_vma plt0_size;
asection *relplt;
bfd_vma opcode;
asection *plt;
asymbol *send;
size_t size;
char *names;
long counti;
arelent *p;
asymbol *s;
char *nend;
long count;
long pi;
long i;
long n;
*ret = NULL;
if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0 || dynsymcount <= 0)
return 0;
relplt = bfd_get_section_by_name (abfd, ".rel.plt");
if (relplt == NULL)
return 0;
hdr = &elf_section_data (relplt)->this_hdr;
if (hdr->sh_link != elf_dynsymtab (abfd) || hdr->sh_type != SHT_REL)
return 0;
plt = bfd_get_section_by_name (abfd, ".plt");
if (plt == NULL)
return 0;
slurp_relocs = get_elf_backend_data (abfd)->s->slurp_reloc_table;
if (!(*slurp_relocs) (abfd, relplt, dynsyms, TRUE))
return -1;
p = relplt->relocation;
/* Calculating the exact amount of space required for symbols would
require two passes over the PLT, so just pessimise assuming two
PLT slots per relocation. */
count = relplt->size / hdr->sh_entsize;
counti = count * bed->s->int_rels_per_ext_rel;
size = 2 * count * sizeof (asymbol);
size += count * (sizeof (mipssuffix) +
(micromips_p ? sizeof (microsuffix) : sizeof (m16suffix)));
for (pi = 0; pi < counti; pi += bed->s->int_rels_per_ext_rel)
size += 2 * strlen ((*p[pi].sym_ptr_ptr)->name);
/* Add the size of "_PROCEDURE_LINKAGE_TABLE_" too. */
size += sizeof (asymbol) + sizeof (pltname);
if (!bfd_malloc_and_get_section (abfd, plt, &plt_data))
return -1;
if (plt->size < 16)
return -1;
s = *ret = bfd_malloc (size);
if (s == NULL)
return -1;
send = s + 2 * count + 1;
names = (char *) send;
nend = (char *) s + size;
n = 0;
opcode = bfd_get_micromips_32 (abfd, plt_data + 12);
if (opcode == 0x3302fffe)
{
if (!micromips_p)
return -1;
plt0_size = 2 * ARRAY_SIZE (micromips_o32_exec_plt0_entry);
other = STO_MICROMIPS;
}
else if (opcode == 0x0398c1d0)
{
if (!micromips_p)
return -1;
plt0_size = 2 * ARRAY_SIZE (micromips_insn32_o32_exec_plt0_entry);
other = STO_MICROMIPS;
}
else
{
plt0_size = 4 * ARRAY_SIZE (mips_o32_exec_plt0_entry);
other = 0;
}
s->the_bfd = abfd;
s->flags = BSF_SYNTHETIC | BSF_FUNCTION | BSF_LOCAL;
s->section = plt;
s->value = 0;
s->name = names;
s->udata.i = other;
memcpy (names, pltname, sizeof (pltname));
names += sizeof (pltname);
++s, ++n;
pi = 0;
for (plt_offset = plt0_size;
plt_offset + 8 <= plt->size && s < send;
plt_offset += entry_size)
{
bfd_vma gotplt_addr;
const char *suffix;
bfd_vma gotplt_hi;
bfd_vma gotplt_lo;
size_t suffixlen;
opcode = bfd_get_micromips_32 (abfd, plt_data + plt_offset + 4);
/* Check if the second word matches the expected MIPS16 instruction. */
if (opcode == 0x651aeb00)
{
if (micromips_p)
return -1;
/* Truncated table??? */
if (plt_offset + 16 > plt->size)
break;
gotplt_addr = bfd_get_32 (abfd, plt_data + plt_offset + 12);
entry_size = 2 * ARRAY_SIZE (mips16_o32_exec_plt_entry);
suffixlen = sizeof (m16suffix);
suffix = m16suffix;
other = STO_MIPS16;
}
/* Likewise the expected microMIPS instruction (no insn32 mode). */
else if (opcode == 0xff220000)
{
if (!micromips_p)
return -1;
gotplt_hi = bfd_get_16 (abfd, plt_data + plt_offset) & 0x7f;
gotplt_lo = bfd_get_16 (abfd, plt_data + plt_offset + 2) & 0xffff;
gotplt_hi = ((gotplt_hi ^ 0x40) - 0x40) << 18;
gotplt_lo <<= 2;
gotplt_addr = gotplt_hi + gotplt_lo;
gotplt_addr += ((plt->vma + plt_offset) | 3) ^ 3;
entry_size = 2 * ARRAY_SIZE (micromips_o32_exec_plt_entry);
suffixlen = sizeof (microsuffix);
suffix = microsuffix;
other = STO_MICROMIPS;
}
/* Likewise the expected microMIPS instruction (insn32 mode). */
else if ((opcode & 0xffff0000) == 0xff2f0000)
{
gotplt_hi = bfd_get_16 (abfd, plt_data + plt_offset + 2) & 0xffff;
gotplt_lo = bfd_get_16 (abfd, plt_data + plt_offset + 6) & 0xffff;
gotplt_hi = ((gotplt_hi ^ 0x8000) - 0x8000) << 16;
gotplt_lo = (gotplt_lo ^ 0x8000) - 0x8000;
gotplt_addr = gotplt_hi + gotplt_lo;
entry_size = 2 * ARRAY_SIZE (micromips_insn32_o32_exec_plt_entry);
suffixlen = sizeof (microsuffix);
suffix = microsuffix;
other = STO_MICROMIPS;
}
/* Otherwise assume standard MIPS code. */
else
{
gotplt_hi = bfd_get_32 (abfd, plt_data + plt_offset) & 0xffff;
gotplt_lo = bfd_get_32 (abfd, plt_data + plt_offset + 4) & 0xffff;
gotplt_hi = ((gotplt_hi ^ 0x8000) - 0x8000) << 16;
gotplt_lo = (gotplt_lo ^ 0x8000) - 0x8000;
gotplt_addr = gotplt_hi + gotplt_lo;
entry_size = 4 * ARRAY_SIZE (mips_exec_plt_entry);
suffixlen = sizeof (mipssuffix);
suffix = mipssuffix;
other = 0;
}
/* Truncated table??? */
if (plt_offset + entry_size > plt->size)
break;
for (i = 0;
i < count && p[pi].address != gotplt_addr;
i++, pi = (pi + bed->s->int_rels_per_ext_rel) % counti);
if (i < count)
{
size_t namelen;
size_t len;
*s = **p[pi].sym_ptr_ptr;
/* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
we are defining a symbol, ensure one of them is set. */
if ((s->flags & BSF_LOCAL) == 0)
s->flags |= BSF_GLOBAL;
s->flags |= BSF_SYNTHETIC;
s->section = plt;
s->value = plt_offset;
s->name = names;
s->udata.i = other;
len = strlen ((*p[pi].sym_ptr_ptr)->name);
namelen = len + suffixlen;
if (names + namelen > nend)
break;
memcpy (names, (*p[pi].sym_ptr_ptr)->name, len);
names += len;
memcpy (names, suffix, suffixlen);
names += suffixlen;
++s, ++n;
pi = (pi + bed->s->int_rels_per_ext_rel) % counti;
}
}
free (plt_data);
return n;
}
/* Return the ABI flags associated with ABFD if available. */
Elf_Internal_ABIFlags_v0 *
bfd_mips_elf_get_abiflags (bfd *abfd)
{
struct mips_elf_obj_tdata *tdata = mips_elf_tdata (abfd);
return tdata->abiflags_valid ? &tdata->abiflags : NULL;
}
/* MIPS libc ABI versions, used with the EI_ABIVERSION ELF file header
field. Taken from `libc-abis.h' generated at GNU libc build time.
Using a MIPS_ prefix as other libc targets use different values. */
enum
{
MIPS_LIBC_ABI_DEFAULT = 0,
MIPS_LIBC_ABI_MIPS_PLT,
MIPS_LIBC_ABI_UNIQUE,
MIPS_LIBC_ABI_MIPS_O32_FP64,
MIPS_LIBC_ABI_ABSOLUTE,
MIPS_LIBC_ABI_XHASH,
MIPS_LIBC_ABI_MAX
};
bfd_boolean
_bfd_mips_init_file_header (bfd *abfd, struct bfd_link_info *link_info)
{
struct mips_elf_link_hash_table *htab = NULL;
Elf_Internal_Ehdr *i_ehdrp;
if (!_bfd_elf_init_file_header (abfd, link_info))
return FALSE;
i_ehdrp = elf_elfheader (abfd);
if (link_info)
{
htab = mips_elf_hash_table (link_info);
BFD_ASSERT (htab != NULL);
}
if (htab != NULL
&& htab->use_plts_and_copy_relocs
&& htab->root.target_os != is_vxworks)
i_ehdrp->e_ident[EI_ABIVERSION] = MIPS_LIBC_ABI_MIPS_PLT;
if (mips_elf_tdata (abfd)->abiflags.fp_abi == Val_GNU_MIPS_ABI_FP_64
|| mips_elf_tdata (abfd)->abiflags.fp_abi == Val_GNU_MIPS_ABI_FP_64A)
i_ehdrp->e_ident[EI_ABIVERSION] = MIPS_LIBC_ABI_MIPS_O32_FP64;
/* Mark that we need support for absolute symbols in the dynamic loader. */
if (htab != NULL && htab->use_absolute_zero && htab->gnu_target)
i_ehdrp->e_ident[EI_ABIVERSION] = MIPS_LIBC_ABI_ABSOLUTE;
/* Mark that we need support for .MIPS.xhash in the dynamic linker,
if it is the only hash section that will be created. */
if (link_info && link_info->emit_gnu_hash && !link_info->emit_hash)
i_ehdrp->e_ident[EI_ABIVERSION] = MIPS_LIBC_ABI_XHASH;
return TRUE;
}
int
_bfd_mips_elf_compact_eh_encoding
(struct bfd_link_info *link_info ATTRIBUTE_UNUSED)
{
return DW_EH_PE_pcrel | DW_EH_PE_sdata4;
}
/* Return the opcode for can't unwind. */
int
_bfd_mips_elf_cant_unwind_opcode
(struct bfd_link_info *link_info ATTRIBUTE_UNUSED)
{
return COMPACT_EH_CANT_UNWIND_OPCODE;
}
/* Record a position XLAT_LOC in the xlat translation table, associated with
the hash entry H. The entry in the translation table will later be
populated with the real symbol dynindx. */
void
_bfd_mips_elf_record_xhash_symbol (struct elf_link_hash_entry *h,
bfd_vma xlat_loc)
{
struct mips_elf_link_hash_entry *hmips;
hmips = (struct mips_elf_link_hash_entry *) h;
hmips->mipsxhash_loc = xlat_loc;
}
|