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2012-08-01 * wrapper.c (libiberty.h): Include.Kevin Buettner2-6/+14
2012-08-01sim: bfin: set bfrom alias field to correct sizeMike Frysinger2-10/+17
2012-08-01sim: bfin: update return value in bfin_reg_{fetch,store}Mike Frysinger2-4/+10
2012-06-19include "config.h" instead of BFD's sysdep.h in d10v/interp.cJoel Brobecker2-1/+19
2012-06-17sim: cr16: include config.h rather than sysdep.h from bfdMike Frysinger2-1/+8
2012-06-17sim: moxie: fix build by including config.h firstMike Frysinger2-0/+6
2012-06-17 * interp.c: Include config.h first. Do not include sysdep.h.Hans-Peter Nilsson2-1/+5
2012-06-15sim/erc32/sys.h: Include "config.h".Joel Brobecker2-0/+5
2012-06-15Define PACKAGE macro in all sims' config.h.Joel Brobecker82-10/+543
2012-06-13 * wrapper.c (sim_create_inferior): Treat WMMX2 binaries as iWMMXtNick Clifton2-0/+6
2012-06-06Move config.h to start of includes.Michael Eager1-1/+1
2012-06-06Add #include "config.h".Michael Eager2-0/+5
2012-05-242012-05-24 Pedro Alves <palves@redhat.com>Pedro Alves4-3/+11
2012-05-24gdb/Pedro Alves21-51/+111
2012-05-24gdb/Pedro Alves3-2/+8
2012-05-20 PR 14072Hans-Peter Nilsson2-0/+6
2012-05-19 PR 14072Nick Clifton21-4/+56
2012-04-09sim: bfin: new PINT modelMike Frysinger7-1/+386
2012-04-09sim: bfin: new GPIO modelMike Frysinger7-1/+352
2012-04-09sim: bfin: add shift astat testsMike Frysinger4-0/+777
2012-04-09sim: bfin: fix ASTAT issues in immediate shiftsMike Frysinger2-17/+64
2012-04-09sim: bfin: fix ASTAT/correctness issues with arithmetic shiftsMike Frysinger2-10/+67
2012-04-09sim: bfin: more astat testsMike Frysinger3-0/+397
2012-04-09sim: bfin: enable some parallel testsMike Frysinger5-4/+7
2012-04-09sim: bfin: more parallel insn checksMike Frysinger2-18/+84
2012-04-09sim: bfin: keep track of the exact position of parallel insnsMike Frysinger3-44/+75
2012-04-09sim: bfin: unify se_all helpers moreMike Frysinger7-54/+64
2012-04-08sim: bfin: drop excess space in negation insnMike Frysinger2-1/+5
2012-04-02sim: fix spelling typoMike Frysinger2-1/+5
2012-04-01sim: bfin: throw VEC_ILGAL_I with 32bit insn in group1/group2 slotsMike Frysinger2-0/+8
2012-04-01sim: bfin: simplify field width processing and fix build warningsMike Frysinger2-10/+6
2012-04-01sim: bfin: fix unused bfrom handling for BF535Mike Frysinger2-1/+5
2012-04-01sim: bfin: fix build warning/style with auxvt_sizeMike Frysinger2-2/+7
2012-03-31sim: bfin: fix typo in BF54x SIC initMike Frysinger2-1/+5
2012-03-31sim: bfin: include devices.h to fix build warningsMike Frysinger2-0/+5
2012-03-29Commit gdb and sim support for v850e2 and v850e2v3 on behalf ofKevin Buettner9-26/+3235
2012-03-27sim: add bugzilla markingMike Frysinger1-0/+1
2012-03-26sim: add a proper sim_core_trans_addr prototypeMike Frysinger4-1/+16
2012-03-25sim: bfin: skip .c/.S tests if no compiler is availableMike Frysinger2-0/+34
2012-03-25sim: bfin: disable redundant test that makes 32bit gas angryMike Frysinger2-1/+7
2012-03-25sim: bfin: fix typos in large constants in testsMike Frysinger6-5/+13
2012-03-24 * nrun.c: Add #ifdef HAVE_CONFIG_H and associated includes stanzaHans-Peter Nilsson2-0/+11
2012-03-24[PATCH] sim: make sure to include strsignal prototypeMike Frysinger104-3403/+6118
2012-03-24sim: testsuite: regen configure after rl78 additionMike Frysinger1-0/+4
2012-03-24sim: cris: update testsuite output after strsignal changeMike Frysinger25-24/+33
2012-03-23sim: testsuite: regen configure after rl78 additionMike Frysinger1-0/+3
2012-03-23sim: rx: fix warnings with AC_DEFINEMike Frysinger2-3/+8
2012-03-23sim: sync build_warnings handling with gdbMike Frysinger2-26/+44
2012-03-21sim: cris: update testsuite output after strsignal changeMike Frysinger38-37/+50
2012-03-21sim/testsuite/: split up arch-specific changelogsMike Frysinger7-613/+587
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