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2015-12-07Add support for MSP430 F5 hardware multiply.Nick Clifton2-10/+59
* msp430-sim.c (sim_open): Check for needed memory at address 0x500 not 0x200. (get_op): Add support for F5 hardware multiply addresses. (put_op): Likewise.
2015-11-24Add an AArch64 simulator to GDB.Nick Clifton23-4/+31400
sim * configure.tgt: Add aarch64 entry. * configure: Regenerate. * sim/aarch64/configure.ac: New configure template. * sim/aarch64/aclocal.m4: Generate. * sim/aarch64/config.in: Generate. * sim/aarch64/configure: Generate. * sim/aarch64/cpustate.c: New file - functions for accessing AArch64 registers. * sim/aarch64/cpustate.h: New header. * sim/aarch64/decode.h: New header. * sim/aarch64/interp.c: New file - interface between GDB and simulator. * sim/aarch64/Makefile.in: New makefile template. * sim/aarch64/memory.c: New file - functions for simulating aarch64 memory accesses. * sim/aarch64/memory.h: New header. * sim/aarch64/sim-main.h: New header. * sim/aarch64/simulator.c: New file - aarch64 simulator functions. * sim/aarch64/simulator.h: New header. include/gdb * sim-aarch64.h: New file. sim/test * configure: Regenerate. * sim/aarch64: New directory.
2015-11-22sim: common: set up CPPFLAGS/CXXFLAGS/LDFLAGS from configure [PR sim/18762]Mike Frysinger2-0/+8
Make sure we pass down the CPP/CXX/LD flags that configure set up for us like we already do for C flags.
2015-11-22sim: sim_do_commandf: fix call to va_end [PR sim/19273]Mike Frysinger2-2/+13
Make sure we call va_end even in the error case.
2015-11-22sim: ppc: avoid use of $< in ordinary rules [PR sim/13834]Mike Frysinger2-5/+13
POSIX does not define $< behavior in ordinary rules, so avoid its use to fix building on non-GNU make setups. Reported-by: Christopher January <chris.january@allinea.com>
2015-11-22sim: common: add PRI printf definesMike Frysinger2-0/+28
Keeping track of the right printf formats for the various types can be a pretty big hassle, especially in common code which has to support a variety of bitsizes. Take a page from the existing standards and add a set of PRI macros which hide the details in a common header.
2015-11-22sim: avr: move global state to sim/cpu stateMike Frysinger3-134/+157
We don't want global variables in the sim as all state should be in the sim state or in the cpu state. This pushes down all that logic for avr.
2015-11-22sim: avr: switch to common sim-regMike Frysinger2-4/+14
This is not entirely useful as avr doesn't (yet) store its register state in the cpu state, but it does allow for switching to the common code for these functions.
2015-11-22sim: sh: delete global callback/argvMike Frysinger3-46/+53
We can use the sim state everywhere now to get these values on the fly.
2015-11-22sim: h8300: delete global callback/kind/nameMike Frysinger2-47/+27
We can use the sim state everywhere now to get these values on the fly.
2015-11-22sim: mn10300: drop global callback handleMike Frysinger3-7/+8
It's used in one place and can easily be replaced by using the sim state.
2015-11-17sim: mn10300/v850: drop unused WITH_CORE defineMike Frysinger4-2/+8
This was dropped from the sim core in 1997, so no point in having these sim ports continue to define it.
2015-11-17sim: always enable modulo memoryMike Frysinger12-36/+30
Having this be a config option doesn't make sense: the code size is pretty much the same (as all the logic is still active), and if it's disabled, the sim throws an error if you try to use it. That means we can't break sims that weren't using it before by enabling it all the time.
2015-11-17[sim/ppc] Fix printf_filtered referencePedro Alves2-16/+21
Building a gdb that includes the PPC sim in C++ mode fails to link with: (...)s.o compile-object-load.o compile-object-run.o compile-loc2c.o compile-c-support.o inflow.o init.o \ ../sim/ppc/libsim.a ../readline/libreadline.a ../opcodes/libopcodes.a ../bfd/libbfd.a -lz ../libiberty/libiberty.a ../libdecnumber/libdecnumber.a -ldl -ldl -lncurses -lm -ldl -lguile-2.0 -lgc -lpthread -ldl -lutil -lm -lpython2.7 -Xlinker -export-dynamic -lexpat -llzma -lbabeltrace -lbabeltrace-ctf ../libiberty/libiberty.a build-gnulib/import/libgnu.a ../sim/ppc/libsim.a(sim_calls.o): In function `sim_open': /home/pedro/gdb/mygit/cxx-convertion/src/sim/ppc/sim_calls.c:73: undefined reference to `printf_filtered' /home/pedro/gdb/mygit/cxx-convertion/src/sim/ppc/sim_calls.c:73: undefined reference to `printf_filtered' ../sim/ppc/libsim.a(sim_calls.o): In function `sim_close': /home/pedro/gdb/mygit/cxx-convertion/src/sim/ppc/sim_calls.c:93: undefined reference to `printf_filtered' /home/pedro/gdb/mygit/cxx-convertion/src/sim/ppc/sim_calls.c:93: undefined reference to `printf_filtered' ../sim/ppc/libsim.a(sim_calls.o): In function `sim_load': /home/pedro/gdb/mygit/cxx-convertion/src/sim/ppc/sim_calls.c:102: undefined reference to `printf_filtered' ../sim/ppc/libsim.a(sim_calls.o):/home/pedro/gdb/mygit/cxx-convertion/src/sim/ppc/sim_calls.c:102: more undefined references to `printf_filtered' follow collect2: error: ld returned 1 exit status The undefined references come from TRACE macro calls, which expand to calls to printf_filtered. But note that the sim's 'printf_filtered' is actually a #define to 'sim_io_printf_filtered', in sim_callbacks.h : #define printf_filtered sim_io_printf_filtered AFAICS, this is not meant to call gdb's printf_filtered function. The ChangeLog entry that added the printf_filtered macro reads: Tue Jul 30 21:12:24 1996 Andrew Cagney <cagney@kremvax.highland.com.au> * sim_callbacks.h (sim_io_printf_filtered): Replace printf_filtered with a local simulator specific version. Add #define printf_filtered to simplify updating of existing code. That is, just another incomplete/partial transition. Maybe prior to 1996 this was really meant to call gdb's printf_filtered version. The reference to printf_filtered appears because sim_calls.c, the compilation unit that fails to link, has this at the top: #undef printf_filtered /* blow away the mapping */ presumably so that this further below: void sim_io_printf_filtered(const char *fmt, ...) { (...) callbacks->printf_filtered(callbacks, "%s", message); } works. So those TRACE macros instances in sim_calls.c just happen to work because gdb is linked in, which satisfies the 'printf_filtered' reference, when GDB is built in C mode. When built in C++ mode, the problem is exposed, as GDB's printf_filtered is mangled. The fix here is to make the TRACE macro call sim_io_printf_filtered directly. (Standalone "run" doesn't fail to link simply because the offending routines are not part of its link.) sim/ppc/ChangeLog 2015-11-17 Pedro Alves <palves@redhat.com> * debug.h (TRACE, ITRACE, DTRACE, DITRACE, PTRACE): Call sim_io_printf_filtered instead of printf_filtered.
2015-11-17sim: sim-close: use XCONCAT2 helperMike Frysinger2-3/+6
No point in open coding this logic when we've got nifty helpers to do it.
2015-11-16sim: sim-stop/sim-reason/sim-reg: move to common obj listMike Frysinger44-56/+119
Now that all arches (for the most part) have moved over, move sim-stop.o, sim-reason.o, and sim-reg.o to the common object list and out of all the arch ports.
2015-11-15sim: cr16: drop global callback stateMike Frysinger4-62/+70
Now that we have access to the sim state in all the right places, use existing sim helpers in place of cr16_callback directly.
2015-11-15sim: cr16: convert to common sim engine logicMike Frysinger5-157/+96
Now that we have access to the sim state everywhere, we can convert to the common engine logic for overall processing. This frees us up from tracking exception state ourselves.
2015-11-15sim: cr16: convert to common sim memory modulesMike Frysinger8-589/+62
The cr16 port has a lot of translation/offset logic baked into it, but it all looks like copy & paste from the d10v port rather than something the cr16 port wants.
2015-11-15sim: cr16: push down sd/cpu varsMike Frysinger6-788/+833
By itself, this commit doesn't really change anything. It lays the groundwork for using the cpu state in follow up commits, both for engine state and for cpu state. Splitting things up this way so it is easier to see how things have changed.
2015-11-15sim: cr16: delete unused memory helpersMike Frysinger3-20/+6
These aren't used anywhere and are just leftover from the d10v port. Delete them so follow up commits are easier to follow.
2015-11-15sim: cr16: switch to common sim-regMike Frysinger3-13/+61
This is mostly to get us off the weird cr16 specific memory functions, but it's also a good clean up to move to the common core.
2015-11-15sim: cr16/d10v: drop redundant call to sim_create_inferiorMike Frysinger4-2/+8
With the conversion to the nrun frontend, this call should no longer be necessary. It also actively crashes when trying to use the sd state.
2015-11-15sim: d10v: drop global callback stateMike Frysinger4-137/+149
Now that we have access to the sim state in all the right places, use existing sim helpers in place of d10v_callback directly.
2015-11-15sim: d10v: convert to common sim engine logicMike Frysinger5-218/+137
Now that we have access to the sim state everywhere, we can convert to the common engine logic for overall processing. This frees us up from tracking exception state ourselves.
2015-11-15sim: d10v: push down sd/cpu varsMike Frysinger6-500/+543
By itself, this commit doesn't really change anything. It lays the groundwork for using the cpu state in follow up commits, both for engine state and for cpu state. Splitting things up this way so it is easier to see how things have changed.
2015-11-15sim: h8300: convert to common sim_{reason,stop}Mike Frysinger3-15/+8
This ends up being pretty easy as the h8300 port already supports much of the common engine core.
2015-11-15sim: mcore: pull cpu state out of global scopeMike Frysinger3-294/+309
This avoids using global variables to hold the cpu state so we can better integrate with the sim common code. There's also a minor fix here where we move the pc register back into the state that is accessible by the asints array. When it was pulled out previously, the reg store/fetch functions broke, but no one really noticed as the mcore gdb port was dropped a while back.
2015-11-15sim: mcore: switch to common sim-regMike Frysinger3-4/+16
This is not entirely useful as mcore doesn't (yet) store its register state in the cpu state, but it does allow for switching to the common code for these functions.
2015-11-15sim: mcore: add a fail testcaseMike Frysinger3-1/+14
2015-11-15sim: mcore: convert to common reason/resume logicMike Frysinger3-40/+64
Switch over to the common event loop logic so we don't have to maintain the exception/exit logic ourselves.
2015-11-15sim: clean up redundant objectsMike Frysinger8-20/+19
Some of the target makefiles listed objects that were already pulled in via SIM_NEW_COMMON_OBJS. Clean those up.
2015-11-15sim: sim-close: unify sim_close logicMike Frysinger50-171/+173
Other than the nice advantage of all sims having to declare one fewer common function, this also fixes leakage in pretty much every sim. Many were not freeing any resources, and a few were inconsistent as to the ones they did. Now we have a single module that takes care of all the logic for us. Most of the non-cgen based ones could be deleted outright. The cgen ones required adding a callback to the arch-specific cleanup func. The few that still have close callbacks are to manage their internal state. We do not convert erc32, m32c, ppc, rl78, or rx as they do not use the common sim core.
2015-11-15sim: m32c: add a basic testsuiteMike Frysinger5-0/+92
2015-11-15sim: testsuite: support basic vars in flagsMike Frysinger2-1/+12
Sometimes in tests, we need supplemental files like linker scripts or board helper files. There's no way to set those flags in the tests currently and relative paths don't work (breaks out of tree builds). Update the main option parser to replace some strings on the fly. Now tests can do things like: Long term we'll want to switch the framework to use the dejagnu helpers like dg-xxx that gcc & gdb utilize. But that'll require more rework.
2015-11-10Update the RX simulator to handle the latest opcode types.Nick Clifton2-1/+24
* rx.c (id_names): Add nop4, nop5, nop6 and nop7. (decode_opcode): Likewise. (get_op): Handle RX_Operand_Zero_Indirect. Handle RX_Bad_Size and RX_MAX_SIZE. (put_op): Likewise. (N_MAP): Increase to 90.
2015-11-10sim: cr16/d10v: localize translation funcsMike Frysinger4-6/+18
These functions are only used in the interp module, so there's no point in exporting them and declaring them in the external sim interface.
2015-11-10sim: m32c: move test code to testsuiteMike Frysinger8-26/+17
Various target code belongs in the testsuite/ subdir, so move the m32c code to match all the other targets.
2015-11-10sim: m32c: drop redundant dependency infoMike Frysinger2-13/+4
2015-11-10sim: h8300: drop unused littleendian variableMike Frysinger2-13/+5
2015-10-12sim: ft32: test coverage for link parameters and PM write portJames Bowman2-0/+42
Adds test coverage for recent features.
2015-10-11sim: moxie: fix leakage in error path [BZ #18273]Mike Frysinger2-0/+6
Reported-by: dcb <dcb314@hotmail.com>
2015-10-11sim: bfin: handle negative left saturated shifts as ashifts [BZ #18407]Mike Frysinger4-1/+33
When handling left saturated ashifts with negative immediates, they should be treated as right ashifts. This matches hardware behavior. Reported-by: Igor Rayak <igorr@gitatechnologies.com>
2015-09-29sim: ft32: correct simulation of MEMCPY and MEMSETJames Bowman2-2/+7
The MEMCPY and MEMSET instructions should only examine the low 15 bits of their length arguments.
2015-09-29sim: ft32: correctly simulate PM write portJames Bowman2-2/+10
The FT32 simulator was not correctly simulating the behavior of the program memory (PM) write port. When it is locked, writes to the data register do nothing.
2015-09-25[PATCH] Add micromips support to the MIPS simulatorAndrew Bennett22-1468/+7290
2015-09-25 Andrew Bennett <andrew.bennett@imgtec.com> Ali Lown <ali.lown@imgtec.com> sim/common/ * sim-bits.h (EXTEND6): New macro. (EXTEND12): New macro. (EXTEND25): New macro. sim/mips/ * Makefile.in (tmp-micromips): New rule. (tmp-mach-multi): Add support for micromips. * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim that works for both mips64 and micromips64. (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and micromips32. Add build support for micromips. * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc, do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv, do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu, do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv, do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append, do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions. Refactored instruction code to use these functions. * dsp2.igen: Refactored instruction code to use the new functions. * interp.c (decode_coproc): Refactored to work with any instruction encoding. (isa_mode): New variable (RSVD_INSTRUCTION): Changed to 0x00000039. * m16.igen (BREAK16): Refactored instruction to use do_break16. (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models. * micromips.dc: New file. * micromips.igen: New file. * micromips16.dc: New file. * micromipsdsp.igen: New file. * micromipsrun.c: New file. * mips.igen (do_swc1): Changed to work with any instruction encoding. (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32 do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc, do_scd do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu, do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt, do_add_fmt do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1, do_cvt_d_fmt do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl, do_cvt_s_pu do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt, do_luxc1_32 do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b, do_mov_fmt, do_movtf do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt, do_mtc1b, do_mul_fmt do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps, do_plu_ps, do_pul_ps do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt, do_prefx, do_sdc1 do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt, do_swc1, do_swxc1 do_trunc_fmt): New functions, refactored from existing instructions. Refactored instruction code to use these functions. (RSVD): Changed to use new reserved instruction. (loadstore_ea, not_word_value, unpredictable, check_mt_hilo, check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32, do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double, do_store_double): Added micromips32 and micromips64 models. Added include for micromips.igen and micromipsdsp.igen Add micromips32 and micromips64 models. (DecodeCoproc): Updated to use new macro definition. * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di, do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu, do_seb, do_seh do_rdhwr, do_wsbh): New functions. Refactored instruction code to use these functions. * sim-main.h (CP0_operation): New enum. (DecodeCoproc): Updated macro. (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE, MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16, MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and ISA_MODE_MICROMIPS): New defines. (sim_state): Add isa_mode field. sim/testsuite/sim/mips/ * basic.exp (run_micromips_test, run_sim_tests): New functions Add support for micromips tests. * hilo-hazard-4.s: New file. * testutils.inc (_dowrite): Changed reserved instruction encoding. (writemsg): Moved the la and li instructions before the data they are assigned to, which prevents a bug where MIPS32 relocations are used instead of micromips relocations when building for micromips.
2015-09-22sim: ft32: add character input portJames Bowman2-0/+6
The FT32 simulator has character output, of course. This patch adds character input, which lets the simulator run interactive FT32 applications, e.g. language interpreters.
2015-08-05Fix building GDB for the M32C by providing a stub sim_info function.Nick Clifton2-0/+11
* gdb-if.c (sim_info): Stub function to allow GDB to be built with this simulator.
2015-07-24Remove leading/trailing white spaces in ChangeLogH.J. Lu31-1219/+1219
2015-07-14Remove extraneous whitespace from ARM sim sources.Nick Clifton29-320/+348
* armcopro.c: Remove extraneous whitespace. * armdefs.h: Likewise. * armfpe.h: Likewise. * arminit.c: Likewise. * armopts.h: Likewise. * armos.c: Likewise. * armos.h: Likewise. * armrdi.c: Likewise. * armsupp.c: Likewise. * armvirt.c: Likewise. * bag.c: Likewise. * bag.h: Likewise. * communicate.c: Likewise. * communicate.h: Likewise. * dbg_conf.h: Likewise. * dbg_cp.h: Likewise. * dbg_hif.h: Likewise. * dbg_rdi.h: Likewise. * gdbhost.c: Likewise. * gdbhost.h: Likewise. * iwmmxt.c: Likewise. * iwmmxt.h: Likewise. * kid.c: Likewise. * main.c: Likewise. * maverick.c: Likewise. * parent.c: Likewise. * thumbemu.c: Likewise. * wrapper.c: Likewise.
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