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2023-01-10sim: riscv: move libsim.a creation to top-levelMike Frysinger3-31/+83
2023-01-10sim: pru: move libsim.a creation to top-levelMike Frysinger3-31/+80
2023-01-10sim: or1k: move libsim.a creation to top-levelMike Frysinger3-52/+122
2023-01-10sim: msp430: move libsim.a creation to top-levelMike Frysinger3-37/+86
2023-01-10sim: moxie: move libsim.a creation to top-levelMike Frysinger3-37/+87
2023-01-10sim: mn10300: move libsim.a creation to top-levelMike Frysinger3-46/+118
2023-01-10sim: mips: move libsim.a creation to top-levelMike Frysinger5-153/+251
2023-01-10sim: microblaze: move libsim.a creation to top-levelMike Frysinger3-57/+106
2023-01-10sim: mcore: move libsim.a creation to top-levelMike Frysinger3-57/+105
2023-01-10sim: m68hc11: move libsim.a creation to top-levelMike Frysinger3-67/+132
2023-01-10sim: m32r: move libsim.a creation to top-levelMike Frysinger3-77/+186
2023-01-10sim: m32c: move libsim.a creation to top-levelMike Frysinger3-90/+136
2023-01-10sim: lm32: move libsim.a creation to top-levelMike Frysinger3-82/+167
2023-01-10sim: iq2000: move libsim.a creation to top-levelMike Frysinger3-87/+165
2023-01-10sim: h8300: move libsim.a creation to top-levelMike Frysinger3-83/+132
2023-01-10sim: ft32: move libsim.a creation to top-levelMike Frysinger3-86/+133
2023-01-10sim: frv: move libsim.a creation to top-levelMike Frysinger3-96/+209
2023-01-10sim: example-synacor: move libsim.a creation to top-levelMike Frysinger3-91/+143
2023-01-10sim: erc32: move libsim.a creation to top-levelMike Frysinger3-100/+148
2023-01-10sim: d10v: move libsim.a creation to top-levelMike Frysinger3-104/+157
2023-01-10sim: cris: move libsim.a creation to top-levelMike Frysinger3-115/+205
2023-01-10sim: cr16: move libsim.a creation to top-levelMike Frysinger3-116/+167
2023-01-10sim: bpf: move libsim.a creation to top-levelMike Frysinger3-126/+207
2023-01-10sim: bfin: move libsim.a creation to top-levelMike Frysinger3-125/+181
2023-01-10sim: avr: move libsim.a creation to top-levelMike Frysinger3-121/+168
2023-01-10sim: arm: move libsim.a creation to top-levelMike Frysinger3-125/+181
2023-01-10sim: aarch64: move libsim.a creation to top-levelMike Frysinger4-129/+184
2023-01-10sim: build: drop support for subdir extra depsMike Frysinger2-17/+0
2023-01-10sim: modules: trigger generation from top-levelMike Frysinger18-10/+67
2023-01-04sim: mips: add multi source to built sourcesMike Frysinger2-1/+6
2023-01-05sim: Move getopt checking inside SIM_AC_PLATFORMTsukasa OI3-42/+46
2023-01-04sim: bpf: fix testsuite due to linker warnings [PR sim/29954]Guillermo E. Martinez1-4/+1
2023-01-04sim: Regenerate using the maintainer modeTsukasa OI1-1/+1
2023-01-02sim: sh: move some generated source files to built sourcesMike Frysinger2-13/+20
2023-01-02sim: build: add var for tracking sim enable directlyMike Frysinger2-34/+69
2023-01-02sim: common: drop libcommon.a linkageMike Frysinger2-8/+3
2023-01-02sim: build: move generated headers to built sourcesMike Frysinger14-123/+189
2023-01-02sim: cgen: drop common subdir build rulesMike Frysinger2-74/+0
2023-01-02sim: or1k: hoist cgen rules to top-levelMike Frysinger3-34/+21
2023-01-02sim: m32r: hoist cgen rules to top-levelMike Frysinger3-48/+37
2023-01-02sim: lm32: hoist cgen rules to top-levelMike Frysinger3-22/+21
2023-01-02sim: iq2000: hoist cgen rules to top-levelMike Frysinger3-26/+21
2023-01-02sim: frv: hoist cgen rules to top-levelMike Frysinger3-24/+21
2023-01-02sim: cris: hoist cgen rules to top-levelMike Frysinger3-33/+33
2023-01-02sim: bpf: hoist cgen rules to top-levelMike Frysinger3-90/+67
2023-01-02sim: cgen: hoist rules to the top-level buildMike Frysinger2-0/+113
2023-01-02sim: build: use Automake include varsMike Frysinger4-14/+4
2023-01-01sim: replace -I$srcroot/bfd include with -I$srcrootMike Frysinger11-13/+13
2023-01-01sim: replace -I$srcroot/opcodes include with -I$srcrootMike Frysinger12-19/+19
2023-01-01sim: build: drop unused SIM_EXTRA_LIBSMike Frysinger3-6/+1
generated by cgit v1.1 at 2024-09-13 04:55:26 +0000