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AgeCommit message (Expand)AuthorFilesLines
2021-11-03sim: mips: fix missing prototype in multi-run generationMike Frysinger2-0/+4
2021-11-03sim: ppc: inline common sim-fpu.c logicMike Frysinger3-33/+2
2021-11-03sim: ppc: switch to common builds for callback objectsMike Frysinger3-37/+6
2021-11-03sim: mloop: mark a few conditionally used funcs as unusedMike Frysinger2-3/+4
2021-11-02sim: hoist cgen mloop rules up to common buildsMike Frysinger17-199/+707
2021-11-02sim: hoist mn10300 & v850 igen rules up to common buildsMike Frysinger7-153/+386
2021-11-02sim: hoist gencode & opc2c build rules up to common buildsMike Frysinger12-119/+625
2021-11-02gdb/sim: update my email addressAndrew Burgess1-1/+1
2021-11-01sim: iq2000: reduce -Wno-error scopeMike Frysinger2-5/+5
2021-11-01sim: lm32: reduce -Wno-error scopeMike Frysinger3-5/+5
2021-11-01sim: frv: reduce -Wno-error scopeMike Frysinger1-2/+2
2021-11-01sim: m32r: reduce -Wno-error scopeMike Frysinger1-2/+2
2021-11-01sim: mips: reduce -Wno-error scopeMike Frysinger2-8/+8
2021-11-01sim: erc32: reduce -Wno-error scopeMike Frysinger1-2/+2
2021-11-01sim: cris: reduce -Wno-error scopeMike Frysinger1-2/+2
2021-11-01sim: sh: reduce -Wno-error scopeMike Frysinger1-2/+2
2021-11-01sim: or1k: build with -WerrorMike Frysinger1-3/+0
2021-11-01sim: igen: minor build output alignment fixMike Frysinger1-1/+1
2021-11-01sim: ppc: fix the printf fix for 32-bit systemsMike Frysinger1-1/+1
2021-11-01sim: m68hc11: clean up pointer castsMike Frysinger1-3/+3
2021-11-01sim: d10v: clean up pointer castsMike Frysinger1-6/+6
2021-10-31sim: bfin: cast pointers using uintptr_tMike Frysinger28-61/+61
2021-10-31sim: ppc: clean up printf format handlingMike Frysinger9-117/+116
2021-10-31sim: ppc: switch core types to stdint.h typesMike Frysinger1-12/+11
2021-10-31sim: mn10300: clean up pointer castsMike Frysinger2-9/+9
2021-10-31sim: events: clean up trace castsMike Frysinger1-72/+83
2021-10-31sim: ppc: handle \r in igen inputs [PR sim/28476]Mike Frysinger1-8/+16
2021-10-31sim: ppc: constify strings in igen toolingMike Frysinger13-50/+51
2021-10-31sim: ppc: use silent build rules here tooMike Frysinger3-50/+50
2021-10-31sim: rl78: drop obsolete manual dependency rulesMike Frysinger1-15/+0
2021-10-31sim: drop unused targ-vals.h includesMike Frysinger6-7/+0
2021-10-31sim: unify callback.o buildingMike Frysinger3-1/+22
2021-10-31sim: nltvals: pull target open flags out into a dedicated source fileMike Frysinger6-45/+106
2021-10-31sim: nltvals: localize TARGET_<open> definesMike Frysinger3-25/+40
2021-10-31sim: nltvals: pull target signal out into a dedicated source fileMike Frysinger6-65/+157
2021-10-31sim: nltvals: pull target errno out into a dedicated source fileMike Frysinger7-147/+384
2021-10-31sim: erc32: use silent build rules with sis linkageMike Frysinger1-1/+1
2021-10-31sim: erc32: fix a few more build warningsMike Frysinger1-5/+8
2021-10-31sim: erc32: fix signedness compatibility and redefinition warningsOrgad Shaneh4-25/+27
2021-10-31sim: add arch-specific conditional logicMike Frysinger2-33/+532
2021-10-31sim: v850: delete old gencode logicMike Frysinger1-7/+2
2021-10-31sim: common: merge multiple clean commandsMike Frysinger1-6/+6
2021-10-31sim: m32c: tighten up opc2c build outputMike Frysinger2-7/+6
2021-10-31sim: tighten up build regen rulesMike Frysinger1-4/+4
2021-10-31sim: tighten up gencode outputMike Frysinger4-19/+19
2021-10-31sim: igen: tighten up build outputMike Frysinger5-11/+14
2021-10-31sim: tighten up stamp rulesMike Frysinger8-31/+46
2021-10-31sim: silence stamp touch rulesMike Frysinger12-48/+48
2021-10-31sim: standardize move-if-change rulesMike Frysinger12-188/+158
2021-10-31sim: mips/v850: remove redundant variable setupMike Frysinger2-7/+0
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