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AgeCommit message (Expand)AuthorFilesLines
1997-01-23 * configure configure.in Makefile.in: Update to new configureStu Grossman32-1269/+10379
1997-01-23 * aclocal.m4 (SIM_AC_COMMON): Move contents of Make-common.inStu Grossman2-0/+328
1997-01-23 * configure configure.in: Don't configure common anymore. FilesStu Grossman3-87/+256
1997-01-21 * simops.c: Undo last change to "rol" and "ror", original codeJeff Law2-2/+7
1997-01-20Multiply ops sign extend, not zero extendMichael Meissner1-0/+11
1997-01-16 * simops.c: Fix "rol" and "ror".Jeff Law2-2/+10
1997-01-15 * simops.c: Fix typo in last change.Jeff Law1-1/+1
1997-01-13 * simops.c: Use REG macros in few places not using them yet.Jeff Law2-5/+9
1997-01-13 * configure: Enable the mn10200 simulator.Jeff Law2-0/+6
1997-01-08For NEC 4300 project, fix last remaining host/target endianness problemJim Wilson1-1/+1
1997-01-06 * mn10300_sim.h (struct _state): Fix number of registers!Jeff Law1-0/+4
1997-01-03 * interp.c (sim_monitor): Make output to stdout visible inMark Alexander1-0/+5
1996-12-31 * mn10300_sim.h (struct _state): Put all registers into a singleJeff Law3-53/+51
1996-12-31Deal with kill encoding the signal via the exit status.Michael Meissner2-3/+11
1996-12-31 * support.h: Undo previous change to SIGTRAPMark Alexander2-2/+7
1996-12-30 * interp.c (store_word, load_word): New static functions.Ian Lance Taylor2-1/+152
1996-12-29 * interp.c: Fix byte-swapping code throughout to work onMark Alexander2-9/+20
1996-12-29 * support.h: Make definitions of SIGTRAP and SIGQUIT consistentMark Alexander2-2/+7
1996-12-28 * gencode.c (build_instruction): Work around MSVC++ code gen bugMark Alexander2-1/+11
1996-12-27Allow exit to work normally under gdbMichael Meissner2-102/+148
1996-12-25add flush_cache PMON routineAngela Marie Thomas2-0/+12
1996-12-20 * support.h: Use _WIN32 instead of __WIN32__. Also add defs forStu Grossman2-2/+9
1996-12-19 * gencode.c (build_instruction) [MUL]: Cast operands to word64, toIan Lance Taylor2-1/+14
1996-12-18 * interp.c (sim_resume): Handle 0xff as a single byte insn.Jeff Law2-12/+19
1996-12-17Getting there ...David Edelsohn2-0/+35
1996-12-16 * simops.c: Handle "break" instruction.Jeff Law2-0/+12
1996-12-16 Link with SIM_EXTRA_LIBS, not just EXTRA_LIBS, which is never set.Rob Savoye1-3/+12
1996-12-16 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.Ian Lance Taylor2-10/+19
1996-12-16Mon Dec 16 13:39:03 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt1-0/+9
1996-12-16 * gencode.c (build_mips16_operands): Fix base PC value for PCIan Lance Taylor3-119/+95
1996-12-16 * simops.c: Fix restoring the PC for "ret" and "retf" instructions.Jeff Law2-4/+23
1996-12-11For NEC 4100/4300 project: Add little endian support and misc cleanups.Jim Wilson1-1/+1
1996-12-11 * gencode.c (write_opcodes): Also write out the format of theJeff Law1-3/+4
1996-12-10 * simops.c (REG0_4): Define.Jeff Law2-8/+14
1996-12-10For NEC 4100/4300 projectJim Wilson3-69/+145
1996-12-10New revision from AndrewMichael Meissner8-377/+3635
1996-12-09 * callback.c: #include <stdlib.h>David Edelsohn2-0/+459
1996-12-07 * simops.c (REG0_16): Fix typo.Jeff Law2-1/+5
1996-12-07Add missing semicolons in last change.Jeff Law1-13/+13
1996-12-06 * simops.c: Call abort for any instruction that's not currentlyJeff Law2-0/+16
1996-12-06 * simops.c: Define accessor macros to extract registerJeff Law2-368/+329
1996-12-06 * interp.c: Delete unused global variable "OP".Jeff Law3-31/+30
1996-12-06Opps. Forgot something in last change.Jeff Law1-1/+1
1996-12-06 * gencode.c (write_header): Add "insn" and "extension" argumentsJeff Law5-248/+699
1996-12-06 * simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)"Jeff Law2-3/+5
1996-12-06 * simops.c: Fix thinkos in last change to "inc dn".Jeff Law2-5/+11
1996-12-04 * simops.c: "add imm,sp" does not effect the condition codes.Jeff Law2-31/+20
1996-12-04 * simops.c: Treat both operands as signed values forJeff Law2-2/+13
1996-12-04 * configure.in: Look for libtermcap.a.Rob Savoye3-64/+132
1996-12-04 * simops.c: Fix simulation of division instructions.Jeff Law1-12/+8