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path: root/sim/v850/sim-main.h
AgeCommit message (Expand)AuthorFilesLines
2014-01-07remove PARAMS from simTom Tromey1-3/+3
2012-03-29Commit gdb and sim support for v850e2 and v850e2v3 on behalf ofKevin Buettner1-2/+296
2002-11-302002-11-30 Andrew Cagney <cagney@redhat.com>Andrew Cagney1-2/+2
2002-08-29Makefile.in: Add gen-zero-r0 option.Nick Clifton1-0/+2
1999-04-16Initial creation of sourceware repositorygdb-4_18-branchpointStan Shebs1-0/+388
1999-04-16Initial creation of sourceware repositoryStan Shebs1-470/+0
1997-09-19Clean up tracing for Bcond & jmp insns.Andrew Cagney1-0/+41
1997-09-19Fix cmov immed.Andrew Cagney1-3/+17
1997-09-19Fix cmov insn.Andrew Cagney1-0/+17
1997-09-17Clean up more tracing.Andrew Cagney1-1/+1
1997-09-17Fix tracing for: "ctret", "bsw", "hsw"Andrew Cagney1-5/+52
1997-09-16Smooth some of ALU tracing's rough edges.Andrew Cagney1-5/+59
1997-09-16Restrict ldsr (load system register) to modifying just non-reserved PSW bits.Andrew Cagney1-0/+1
1997-09-15For instructions moved into v850.igen was computing (wrong) NIA whenAndrew Cagney1-4/+10
1997-09-15Fix sanitization for v850 V v850e V v850eqAndrew Cagney1-4/+31
1997-09-15For v850eq start up with US bit set.Andrew Cagney1-0/+52
1997-09-12Check reserved bits before executing instructions.Andrew Cagney1-0/+1
1997-09-12Add profiling support to v850*.Andrew Cagney1-0/+8
1997-09-08Add multi-sim support to v850/v850e/v850eq simulators.Andrew Cagney1-26/+51
1997-09-04Replace memory model with one from sim/common directory.Andrew Cagney1-9/+15
1997-09-03Pacify gcc-current -Wall.Andrew Cagney1-2/+1
1997-09-03Standard simulator header file.Andrew Cagney1-0/+172
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