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AgeCommit message (Expand)AuthorFilesLines
2024-02-13sim: riscv: Add support for compressed integer instructionsJaydeep Patil5-4/+99
2023-10-18sim/riscv: fix JALR instruction simulationJaydeep Patil2-3/+31
2022-10-11sim/riscv: fix multiply instructions on simulatorTsukasa OI1-0/+18
2022-02-16sim: testsuite: cleanup the istarget * logicMike Frysinger1-10/+7
2021-11-28sim: testsuite: drop most specific istarget checksMike Frysinger1-1/+1
2021-11-26sim: testsuite: rework sim_init usageMike Frysinger1-0/+2
2021-08-17sim: rename ChangeLog files to ChangeLog-2021Mike Frysinger1-0/+0
2021-04-08sim: testsuite: calculate $arch from $subdirMike Frysinger2-4/+4
2021-02-13sim: testsuite: push $arch out to targetsMike Frysinger2-0/+8
2021-02-04sim: riscv: new portMike Frysinger4-0/+77