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path: root/sim/riscv/ChangeLog
AgeCommit message (Expand)AuthorFilesLines
2021-06-12sim: unify assert build settingsMike Frysinger1-0/+4
2021-06-12sim: unify platform function & header testsMike Frysinger1-0/+4
2021-05-17sim: fully merge sim_state_base into sim_stateMike Frysinger1-0/+4
2021-05-17sim: riscv: invert sim_state storageMike Frysinger1-0/+9
2021-05-16sim: switch config.h usage to defs.hMike Frysinger1-0/+4
2021-05-16sim: riscv: move __int128 check to configureMike Frysinger1-0/+5
2021-05-12sim: clean up explicit environment build callsMike Frysinger1-0/+5
2021-05-04sim: add support for build-time ar & ranlibMike Frysinger1-0/+4
2021-05-01sim: nrun: add local strsignal prototypeMike Frysinger1-0/+4
2021-05-01sim: riscv: fix building on 32-bit hosts w/out int128Mike Frysinger1-0/+4
2021-04-26sim: riscv: switch MIN/MAX to common min/maxMike Frysinger1-0/+5
2021-04-26sim: enable hardware support by defaultMike Frysinger1-0/+4
2021-04-22Do not check for sys/time.h or sys/times.hTom Tromey1-0/+4
2021-04-22Require GNU makeTom Tromey1-0/+4
2021-04-21sim: regen against sim/m4/Mike Frysinger1-0/+4
2021-04-21sim: use -Werror when probing for supported warning flagsSimon Marchi1-0/+4
2021-04-18sim: switch to AC_CHECK_FUNCS_ONCE & merge a littleMike Frysinger1-0/+4
2021-04-12sim: cgen: move cgen_cpu_max_extra_bytes logic into the common codeMike Frysinger1-0/+4
2021-04-02sim: unify toolchain settingsMike Frysinger1-0/+4
2021-02-28sim: require AC_PROG_CPP explicitlyMike Frysinger1-0/+4
2021-02-21sim: common: split up acinclude.m4 into individual m4 filesMike Frysinger1-0/+5
2021-02-13sim: switch to AC_CONFIG_MACRO_DIRSMike Frysinger1-0/+5
2021-02-06sim: drop use of bfd/configure.hostMike Frysinger1-0/+4
2021-02-04gdb: riscv: enable sim integrationMike Frysinger1-0/+6
2021-02-04sim: riscv: new portMike Frysinger1-0/+5