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2024-01-12Update copyright year range in header of all files managed by GDBAndrew Burgess1-1/+1
This commit is the result of the following actions: - Running gdb/copyright.py to update all of the copyright headers to include 2024, - Manually updating a few files the copyright.py script told me to update, these files had copyright headers embedded within the file, - Regenerating gdbsupport/Makefile.in to refresh it's copyright date, - Using grep to find other files that still mentioned 2023. If these files were updated last year from 2022 to 2023 then I've updated them this year to 2024. I'm sure I've probably missed some dates. Feel free to fix them up as you spot them.
2023-01-01Update copyright year range in header of all files managed by GDBJoel Brobecker1-1/+1
This commit is the result of running the gdb/copyright.py script, which automated the update of the copyright year range for all source files managed by the GDB project to be updated to include year 2023.
2022-12-25sim: cpu: change default init to handle all cpusMike Frysinger1-1/+1
All the runtimes were only initializing a single CPU. When SMP is enabled, things quickly crash as none of the other CPU structs are setup. Change the default from 0 to the compile time value.
2022-12-25sim: or1k: fix iterator typo when setting up cpusMike Frysinger1-1/+1
This code loops over available cpus with "c", but then looks up the cpu with "i". Fix the typo so the code works correctly with smp.
2022-12-22sim: use bfd_vma when reading start addr from bfd infoMike Frysinger1-1/+1
Since SIM_ADDR is always 32-bit, it might truncate the address with 64-bit ELFs. Since we load that addr from the bfd, use the bfd_vma type which matches the bfd_get_start_address API.
2022-12-21sim: or1k: invert sim_cpu storageMike Frysinger1-1/+2
The cpu.h change is in generated cgen code, but that has been sent upstream too, so the next regen should include it automatically.
2022-01-01Automatic Copyright Year update after running gdb/copyright.pyJoel Brobecker1-1/+1
This commit brings all the changes made by running gdb/copyright.py as per GDB's Start of New Year Procedure. For the avoidance of doubt, all changes in this commits were performed by the script.
2021-11-15sim: split program path out of argv vectorMike Frysinger1-4/+1
We use the program argv to both find the program to run (argv[0]) and to hold the arguments to the program. Most of the time this is fine, but if we want to let programs specify argv[0] independently (which is possible in standard *NIX programs), this double duty doesn't work. So let's split the path to the program to run out into a separate field by itself. This simplifies the various sim_open funcs too. By itself, this code is more of a logical cleanup than something that is super useful. But it will open up customization of argv[0] in a follow up commit. Split the changes to make it easier to review.
2021-06-30sim: move default model to the runtime sim stateMike Frysinger1-0/+1
This kills off another compile-time option by moving the setting to the individual arch runtimes. This will allow dynamic selection by the arch when doing a single build with multiple arches. The sim_model_init rework is a little funky. In the past it was disabled entirely if no default model was set. We maintain the spirit of the logic by gating the fallback logic on whether the port has defined any models.
2021-06-30sim: namespace sim_machsMike Frysinger1-0/+3
We want to do a single build with all arches in one binary which means we need to namespace sim_machs on a per-arch basis. Move it from a global variable to the sim description structure so it can be setup at runtime. Changing the SIM_MODEL->num from an enum to an int is unfortunate, but we specifically don't want to maintain a centralized list anymore, and this was never used directly in common code, just passed to per-arch callbacks.
2021-06-17sim: overhaul & unify endian settings managementMike Frysinger1-0/+3
The m4 macro has 2 args: the "wire" settings (which represents the hardwired port behavior), and the default settings (which are used if nothing else is specified). If none are specified, the arch is expected to support both, and the value will be probed based on the user runtime options or the input program. Only two arches today set the default value (bpf & mips). We can probably let this go as it only shows up in one scenario: the sim is invoked, but with no inputs, and no user endian selection. This means bpf will not behave like the other arches: an error is shown and forces the user to make a choice. If an input program is used though, we'll still switch the default to that. This allows us to remove the WITH_DEFAULT_TARGET_BYTE_ORDER setting. For the ports that set a "wire" endian, move it to the runtime init of the respective sim_open calls. This allows us to change the WITH_TARGET_BYTE_ORDER to purely a user-selected configure setting if they want to force a specific endianness. With all the endian logic moved to runtime selection, we can move the configure call up to the common dir so we only process it once across all ports. The ppc arch was picking the wire endian based on the target used, but since we weren't doing that for other biendian arches, we can let this go too. We'll rely on the input selecting the endian, or make the user decide.
2021-06-09sim: cgen: inline cgen_init logicMike Frysinger1-4/+0
This function has done only one thing: post-process command line settings to see if profiling or tracing has been enabled, and if so, set the run_fast_p flag in the simulator state. That flag is only used in one place: to select the fast or slow cgen engine. By inlining the run_fast_p logic to the one place it's used, we can delete a good amount of logic specific to cgen ports: both the call to cgen_init and the conditional simulator state. This in turn allows us to have a single simulator state struct across all ports so we can share objects more between them, and makes the sim_open calls look more consistent.
2021-05-16sim: switch config.h usage to defs.hMike Frysinger1-0/+3
The defs.h header will take care of including the various config.h headers. For now, it's just config.h, but we'll add more when we integrate gnulib in. This header should be used instead of config.h, and should be the first include in every .c file. We won't rely on the old behavior where we expected files to include the port's sim-main.h which then includes the common sim-basics.h which then includes config.h. We have a ton of code that includes things before sim-main.h, and it sometimes needs to be that way. Creating a dedicated header avoids the ordering mess and implicit inclusion that shows up otherwise.
2021-04-12sim: cgen: move cgen_cpu_max_extra_bytes logic into the common codeMike Frysinger1-1/+1
Every arch handles this the same way, so move it to the common code. This will also make unifying the sim_cpu structure easier.
2021-01-11sim: clean up C11 header includesMike Frysinger1-8/+0
Since we require C11 now, we can assume many headers exist, and clean up all of the conditional includes. It's not like any of this code actually accounted for the headers not existing, just whether we could include them. The strings.h cleanup is a little nuanced: it isn't in C11, but every use of it in the codebase will include strings.h only if string.h doesn't exist. Since we now assume the C11 string.h exists, we'll never include strings.h, so we can delete it.
2021-01-01Update copyright year range in all GDB filesJoel Brobecker1-1/+1
This commits the result of running gdb/copyright.py as per our Start of New Year procedure... gdb/ChangeLog Update copyright year range in copyright header of all GDB files.
2020-01-01Update copyright year range in all GDB files.Joel Brobecker1-1/+1
gdb/ChangeLog: Update copyright year range in all GDB files.
2019-01-01Update copyright year range in all GDB files.Joel Brobecker1-1/+1
This commit applies all changes made after running the gdb/copyright.py script. Note that one file was flagged by the script, due to an invalid copyright header (gdb/unittests/basic_string_view/element_access/char/empty.cc). As the file was copied from GCC's libstdc++-v3 testsuite, this commit leaves this file untouched for the time being; a patch to fix the header was sent to gcc-patches first. gdb/ChangeLog: Update copyright year range in all GDB files.
2018-01-02Update copyright year range in all GDB filesJoel Brobecker1-1/+1
gdb/ChangeLog: Update copyright year range in all GDB files
2017-12-12sim: or1k: add or1k target to simStafford Horne1-0/+279
This adds the OpenRISC 32-bit sim target. The OpenRISC sim is a CGEN based sim so the bulk of the code is generated from the .cpu files by CGEN. The engine decode and execute logic in mloop uses scache with pseudo-basic-block extraction and supports both full and fast (switch) modes. The sim does not implement an mmu at the moment. The sim does implement fpu instructions via the common sim-fpu implementation. sim/ChangeLog: 2017-12-12 Stafford Horne <shorne@gmail.com> Peter Gavin <pgavin@gmail.com> * configure.tgt: Add or1k sim. * or1k/README: New file. * or1k/Makefile.in: New file. * or1k/configure.ac: New file. * or1k/mloop.in: New file. * or1k/or1k-sim.h: New file. * or1k/or1k.c: New file. * or1k/sim-if.c: New file. * or1k/sim-main.h: New file. * or1k/traps.c: New file.