riscv-gnu-toolchain/gdb.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2024-01-12	Update copyright year range in header of all files managed by GDB	Andrew Burgess	1	-1/+1
2023-01-01	Update copyright year range in header of all files managed by GDB	Joel Brobecker	1	-1/+1
2022-12-25	sim: cpu: change default init to handle all cpus	Mike Frysinger	1	-1/+1
2022-12-25	sim: or1k: fix iterator typo when setting up cpus	Mike Frysinger	1	-1/+1
2022-12-22	sim: use bfd_vma when reading start addr from bfd info	Mike Frysinger	1	-1/+1
2022-12-21	sim: or1k: invert sim_cpu storage	Mike Frysinger	1	-1/+2
2022-01-01	Automatic Copyright Year update after running gdb/copyright.py	Joel Brobecker	1	-1/+1
2021-11-15	sim: split program path out of argv vector	Mike Frysinger	1	-4/+1
2021-06-30	sim: move default model to the runtime sim state	Mike Frysinger	1	-0/+1
2021-06-30	sim: namespace sim_machs	Mike Frysinger	1	-0/+3
2021-06-17	sim: overhaul & unify endian settings management	Mike Frysinger	1	-0/+3
2021-06-09	sim: cgen: inline cgen_init logic	Mike Frysinger	1	-4/+0
2021-05-16	sim: switch config.h usage to defs.h	Mike Frysinger	1	-0/+3
2021-04-12	sim: cgen: move cgen_cpu_max_extra_bytes logic into the common code	Mike Frysinger	1	-1/+1
2021-01-11	sim: clean up C11 header includes	Mike Frysinger	1	-8/+0
2021-01-01	Update copyright year range in all GDB files	Joel Brobecker	1	-1/+1
2020-01-01	Update copyright year range in all GDB files.	Joel Brobecker	1	-1/+1
2019-01-01	Update copyright year range in all GDB files.	Joel Brobecker	1	-1/+1
2018-01-02	Update copyright year range in all GDB files	Joel Brobecker	1	-1/+1
2017-12-12	sim: or1k: add or1k target to sim	Stafford Horne	1	-0/+279