aboutsummaryrefslogtreecommitdiff
path: root/sim/or1k/cpu.h
AgeCommit message (Collapse)AuthorFilesLines
2023-08-19sim regenAlan Modra1-2/+2
This regenerates sim files. Tested with the following tools from a recent binutils build in sim-site-config.exp, plus a few cross compilers. set AS_FOR_TARGET_AARCH64 "/home/alan/build/gas/aarch64-linux-gnu/gas/as-new" set LD_FOR_TARGET_AARCH64 "/home/alan/build/gas/aarch64-linux-gnu/ld/ld-new" set CC_FOR_TARGET_AARCH64 "aarch64-linux-gnu-gcc" set AS_FOR_TARGET_ARM "/home/alan/build/gas/arm-linux-gnueabi/gas/as-new" set LD_FOR_TARGET_ARM "/home/alan/build/gas/arm-linux-gnueabi/ld/ld-new" set CC_FOR_TARGET_ARM "arm-linux-gnueabi-gcc" set AS_FOR_TARGET_AVR "/home/alan/build/gas/avr-elf/gas/as-new" set LD_FOR_TARGET_AVR "/home/alan/build/gas/avr-elf/ld/ld-new" set CC_FOR_TARGET_AVR "" set AS_FOR_TARGET_BFIN "/home/alan/build/gas/bfin-elf/gas/as-new" set LD_FOR_TARGET_BFIN "/home/alan/build/gas/bfin-elf/ld/ld-new" set CC_FOR_TARGET_BFIN "" set AS_FOR_TARGET_BPF "/home/alan/build/gas/bpf-none/gas/as-new" set LD_FOR_TARGET_BPF "/home/alan/build/gas/bpf-none/ld/ld-new" set CC_FOR_TARGET_BPF "" set AS_FOR_TARGET_CR16 "/home/alan/build/gas/cr16-elf/gas/as-new" set LD_FOR_TARGET_CR16 "/home/alan/build/gas/cr16-elf/ld/ld-new" set CC_FOR_TARGET_CR16 "" set AS_FOR_TARGET_CRIS "/home/alan/build/gas/cris-elf/gas/as-new" set LD_FOR_TARGET_CRIS "/home/alan/build/gas/cris-elf/ld/ld-new" set CC_FOR_TARGET_CRIS "" set AS_FOR_TARGET_D10V "/home/alan/build/gas/d10v-elf/gas/as-new" set LD_FOR_TARGET_D10V "/home/alan/build/gas/d10v-elf/ld/ld-new" set CC_FOR_TARGET_D10V "" set AS_FOR_TARGET_FRV "/home/alan/build/gas/frv-elf/gas/as-new" set LD_FOR_TARGET_FRV "/home/alan/build/gas/frv-elf/ld/ld-new" set CC_FOR_TARGET_FRV "" set AS_FOR_TARGET_FT32 "/home/alan/build/gas/ft32-elf/gas/as-new" set LD_FOR_TARGET_FT32 "/home/alan/build/gas/ft32-elf/ld/ld-new" set CC_FOR_TARGET_FT32 "" set AS_FOR_TARGET_H8300 "/home/alan/build/gas/h8300-elf/gas/as-new" set LD_FOR_TARGET_H8300 "/home/alan/build/gas/h8300-elf/ld/ld-new" set CC_FOR_TARGET_H8300 "" set AS_FOR_TARGET_IQ2000 "/home/alan/build/gas/iq2000-elf/gas/as-new" set LD_FOR_TARGET_IQ2000 "/home/alan/build/gas/iq2000-elf/ld/ld-new" set CC_FOR_TARGET_IQ2000 "" set AS_FOR_TARGET_LM32 "/home/alan/build/gas/lm32-linux-gnu/gas/as-new" set LD_FOR_TARGET_LM32 "/home/alan/build/gas/lm32-linux-gnu/ld/ld-new" set CC_FOR_TARGET_LM32 "" set AS_FOR_TARGET_M32C "/home/alan/build/gas/m32c-elf/gas/as-new" set LD_FOR_TARGET_M32C "/home/alan/build/gas/m32c-elf/ld/ld-new" set CC_FOR_TARGET_M32C "" set AS_FOR_TARGET_M32R "/home/alan/build/gas/m32r-elf/gas/as-new" set LD_FOR_TARGET_M32R "/home/alan/build/gas/m32r-elf/ld/ld-new" set CC_FOR_TARGET_M32R "" set AS_FOR_TARGET_M68HC11 "/home/alan/build/gas/m68hc11-elf/gas/as-new" set LD_FOR_TARGET_M68HC11 "/home/alan/build/gas/m68hc11-elf/ld/ld-new" set CC_FOR_TARGET_M68HC11 "" set AS_FOR_TARGET_MCORE "/home/alan/build/gas/mcore-elf/gas/as-new" set LD_FOR_TARGET_MCORE "/home/alan/build/gas/mcore-elf/ld/ld-new" set CC_FOR_TARGET_MCORE "" set AS_FOR_TARGET_MICROBLAZE "/home/alan/build/gas/microblaze-linux-gnu/gas/as-new" set LD_FOR_TARGET_MICROBLAZE "/home/alan/build/gas/microblaze-linux-gnu/ld/ld-new" set CC_FOR_TARGET_MICROBLAZE "microblaze-linux-gnu-gcc" set AS_FOR_TARGET_MIPS "/home/alan/build/gas/mips-linux-gnu/gas/as-new" set LD_FOR_TARGET_MIPS "/home/alan/build/gas/mips-linux-gnu/ld/ld-new" set CC_FOR_TARGET_MIPS "mips-linux-gnu-gcc" set AS_FOR_TARGET_MN10300 "/home/alan/build/gas/mn10300-elf/gas/as-new" set LD_FOR_TARGET_MN10300 "/home/alan/build/gas/mn10300-elf/ld/ld-new" set CC_FOR_TARGET_MN10300 "" set AS_FOR_TARGET_MOXIE "/home/alan/build/gas/moxie-elf/gas/as-new" set LD_FOR_TARGET_MOXIE "/home/alan/build/gas/moxie-elf/ld/ld-new" set CC_FOR_TARGET_MOXIE "" set AS_FOR_TARGET_MSP430 "/home/alan/build/gas/msp430-elf/gas/as-new" set LD_FOR_TARGET_MSP430 "/home/alan/build/gas/msp430-elf/ld/ld-new" set CC_FOR_TARGET_MSP430 "" set AS_FOR_TARGET_OR1K "/home/alan/build/gas/or1k-linux-gnu/gas/as-new" set LD_FOR_TARGET_OR1K "/home/alan/build/gas/or1k-linux-gnu/ld/ld-new" set CC_FOR_TARGET_OR1K "" set AS_FOR_TARGET_PPC "/home/alan/build/gas/powerpc-linux-gnu/gas/as-new" set LD_FOR_TARGET_PPC "/home/alan/build/gas/powerpc-linux-gnu/ld/ld-new" set CC_FOR_TARGET_PPC "powerpc-linux-gnu-gcc" set AS_FOR_TARGET_PRU "/home/alan/build/gas/pru-elf/gas/as-new" set LD_FOR_TARGET_PRU "/home/alan/build/gas/pru-elf/ld/ld-new" set CC_FOR_TARGET_PRU "" set AS_FOR_TARGET_RISCV "/home/alan/build/gas/riscv32-elf/gas/as-new" set LD_FOR_TARGET_RISCV "/home/alan/build/gas/riscv32-elf/ld/ld-new" set CC_FOR_TARGET_RISCV "" set AS_FOR_TARGET_RL78 "/home/alan/build/gas/rl78-elf/gas/as-new" set LD_FOR_TARGET_RL78 "/home/alan/build/gas/rl78-elf/ld/ld-new" set CC_FOR_TARGET_RL78 "" set AS_FOR_TARGET_RX "/home/alan/build/gas/rx-elf/gas/as-new" set LD_FOR_TARGET_RX "/home/alan/build/gas/rx-elf/ld/ld-new" set CC_FOR_TARGET_RX "" set AS_FOR_TARGET_SH "/home/alan/build/gas/sh-rtems/gas/as-new" set LD_FOR_TARGET_SH "/home/alan/build/gas/sh-rtems/ld/ld-new" set CC_FOR_TARGET_SH "" set AS_FOR_TARGET_ERC32 "" set LD_FOR_TARGET_ERC32 "" set CC_FOR_TARGET_ERC32 "" set AS_FOR_TARGET_V850 "/home/alan/build/gas/v850-elf/gas/as-new" set LD_FOR_TARGET_V850 "/home/alan/build/gas/v850-elf/ld/ld-new" set CC_FOR_TARGET_V850 "" Results both before and after were: FAIL: crisv10 mem1.ms (execution) FAIL: crisv10 mem2.ms (execution) FAIL: crisv32 mem1.ms (execution) FAIL: crisv32 mem2.ms (execution) FAIL: microblaze fail.s (execution) FAIL: microblaze pass.s (execution) expected passes 5288 unexpected failures 6 expected failures 3 untested testcases 373 unsupported tests 14
2023-01-01Update copyright year range in header of all files managed by GDBJoel Brobecker1-1/+1
This commit is the result of running the gdb/copyright.py script, which automated the update of the copyright year range for all source files managed by the GDB project to be updated to include year 2023.
2022-12-21sim: or1k: invert sim_cpu storageMike Frysinger1-1/+1
The cpu.h change is in generated cgen code, but that has been sent upstream too, so the next regen should include it automatically.
2022-01-01Automatic Copyright Year update after running gdb/copyright.pyJoel Brobecker1-1/+1
This commit brings all the changes made by running gdb/copyright.py as per GDB's Start of New Year Procedure. For the avoidance of doubt, all changes in this commits were performed by the script.
2021-01-01Update copyright year range in all GDB filesJoel Brobecker1-1/+1
This commits the result of running gdb/copyright.py as per our Start of New Year procedure... gdb/ChangeLog Update copyright year range in copyright header of all GDB files.
2020-01-01Update copyright year range in all GDB files.Joel Brobecker1-1/+1
gdb/ChangeLog: Update copyright year range in all GDB files.
2019-06-13sim/or1k: Regenerate simStafford Horne1-8/+166
This picks up changes for: - new orfpx64a32 spec - new unordered instructions - documentation and symbol updates sim/ChangeLog: * or1k/cpu.c: Regenerate. * or1k/cpu.h: Regenerate. * or1k/decode.c: Regenerate. * or1k/decode.h: Regenerate. * or1k/model.c: Regenerate. * or1k/sem-switch.c: Regenerate. * or1k/sem.c: Regenerate.
2019-01-01Update copyright year range in all GDB files.Joel Brobecker1-1/+1
This commit applies all changes made after running the gdb/copyright.py script. Note that one file was flagged by the script, due to an invalid copyright header (gdb/unittests/basic_string_view/element_access/char/empty.cc). As the file was copied from GCC's libstdc++-v3 testsuite, this commit leaves this file untouched for the time being; a patch to fix the header was sent to gcc-patches first. gdb/ChangeLog: Update copyright year range in all GDB files.
2018-10-05or1k: Add the l.muld, l.muldu, l.macu, l.msbu insnsRichard Henderson1-0/+32
Also fix the incorrect definitions of multiply and divide carry and overflow float. Changes to the instructions are made in the .cpu file, then we regenerate the binutils and sim files. The changes also required a few fixups for tests and additional sim helpers. cpu/ChangeLog: yyyy-mm-dd Richard Henderson <rth@twiddle.net> Stafford Horne <shorne@gmail.com> * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU. (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU. (l-mul): Fix overflow support and indentation. (l-mulu): Fix overflow support and indentation. (l-muld, l-muldu, l-msbu, l-macu): New instructions. (l-div); Remove incorrect carry behavior. (l-divu): Fix carry and overflow behavior. (l-mac): Add overflow support. (l-msb, l-msbu): Add carry and overflow support. opcodes/ChangeLog: yyyy-mm-dd Richard Henderson <rth@twiddle.net> Stafford Horne <shorne@gmail.com> * or1k-desc.c: Regenerate. * or1k-desc.h: Regenerate. * or1k-opc.c: Regenerate. * or1k-opc.h: Regenerate. * or1k-opinst.c: Regenerate. sim/common/ChangeLog: yyyy-mm-dd Stafford Horne <shorne@gmail.com> * cgen-ops.h (ADDCFDI): New function, add carry flag DI variant. (ADDOFDI): New function, add overflow flag DI variant. (SUBCFDI): New function, subtract carry flag DI variant. (SUBOFDI): New function, subtract overflow flag DI variant. sim/ChangeLog: yyyy-mm-dd Stafford Horne <shorne@gmail.com> * or1k/cpu.h: Regenerate. * or1k/decode.c: Regenerate. * or1k/decode.h: Regenerate. * or1k/model.c: Regenerate. * or1k/sem-switch.c: Regenerate. * or1k/sem.c: Regenerate: sim/testsuite/sim/or1k/ChangeLog: yyyy-mm-dd Stafford Horne <shorne@gmail.com> * div.S: Fix tests to match correct overflow/carry semantics. * mul.S: Likewise. gas/ChangeLog: yyyy-mm-dd Stafford Horne <shorne@gmail.com> * testsuite/gas/or1k/allinsn.s: Add instruction tests for l.muld, l.muldu, l.macu, l.msb, l.msbu. * testsuite/gas/or1k/allinsn.d: Add test results for new instructions.
2018-01-02Update copyright year range in all GDB filesJoel Brobecker1-1/+1
gdb/ChangeLog: Update copyright year range in all GDB files
2017-12-12sim: or1k: add cgen generated filesStafford Horne1-0/+5024
These are the simulator files generated by cgen. These are split out from the main sim patch to make the patch easier to review and smaller. sim/ChangeLog: 2017-12-12 Stafford Horne <shorne@gmail.com> Peter Gavin <pgavin@gmail.com> * or1k/arch.c: Generated. * or1k/arch.h: Generated. * or1k/cpu.c: Generated. * or1k/cpu.h: Generated. * or1k/cpuall.h: Generated. * or1k/decode.c: Generated. * or1k/decode.h: Generated. * or1k/model.c: Generated. * or1k/sem-switch.c: Generated. * or1k/sem.c: Generated.