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AgeCommit message (Expand)AuthorFilesLines
2022-01-01Automatic Copyright Year update after running gdb/copyright.pyJoel Brobecker4-4/+4
2021-12-09sim: use ## for automake commentsMike Frysinger1-16/+16
2021-12-04sim: moxie: hoist dtb rules up to common buildsMike Frysinger2-20/+32
2021-11-28sim: iq2000/lm32/m32c/moxie/rx: switch to new target-newlib-syscall.hMike Frysinger1-6/+6
2021-11-28sim: moxie: fix datadir handlingMike Frysinger1-1/+1
2021-11-15sim: split program path out of argv vectorMike Frysinger1-4/+1
2021-08-17sim: rename ChangeLog files to ChangeLog-2021Mike Frysinger1-0/+0
2021-06-22sim: drop configure scripts for simple portsMike Frysinger4-2893/+6
2021-06-21sim: unify hardware settingsMike Frysinger3-54/+5
2021-06-21sim: hw: rework configure option & device selectionMike Frysinger2-38/+30
2021-06-20sim: delete SIM_AC_COMMON macroMike Frysinger4-5/+5
2021-06-20sim: unify general maintainer settingsMike Frysinger4-125/+6
2021-06-20sim: move sim-inline to the common codeMike Frysinger3-36/+5
2021-06-19sim: unify dtc tool checksMike Frysinger4-98/+6
2021-06-19sim: unify gettext/intl probing logicMike Frysinger2-85/+0
2021-06-19sim: unify toolchain dependency logicMike Frysinger2-1109/+1
2021-06-19sim: unify toolchain probing logicMike Frysinger2-1360/+26
2021-06-19sim: unify bfd library dependency testing logicMike Frysinger3-7691/+6
2021-06-19sim: unify various library testing logicMike Frysinger2-141/+6
2021-06-18sim: unify -Werror build settingsMike Frysinger3-112/+6
2021-06-18sim: move -Werror disabling to MakefileMike Frysinger2-5/+8
2021-06-18sim: split sim-signal.h include outMike Frysinger2-0/+5
2021-06-17sim: overhaul & unify endian settings managementMike Frysinger5-59/+12
2021-06-16sim: drop obsolete AC_EXEEXT callMike Frysinger2-2/+4
2021-06-16sim: drop arch-specific config.hMike Frysinger3-280/+47
2021-06-15sim: move dv-sockser define to CPPFLAGSMike Frysinger3-8/+5
2021-06-12sim: overhaul alignment settings managementMike Frysinger4-56/+8
2021-06-12sim: unify bug & package settingsMike Frysinger3-87/+2
2021-06-12sim: unify debug/stdio/trace/profile build settingsMike Frysinger2-150/+2
2021-06-12sim: unify environment build settingsMike Frysinger3-32/+2
2021-06-12sim: unify assert build settingsMike Frysinger4-28/+6
2021-06-12sim: unify platform function & header testsMike Frysinger3-552/+6
2021-05-17sim: fully merge sim_state_base into sim_stateMike Frysinger2-2/+4
2021-05-17sim: invert sim_state storageMike Frysinger2-7/+7
2021-05-16sim: switch config.h usage to defs.hMike Frysinger2-1/+7
2021-05-16sim: riscv: move __int128 check to configureMike Frysinger3-2/+19
2021-05-14sim: create header namespaceMike Frysinger2-1/+5
2021-05-04sim: remove sys/times.h in most placesMike Frysinger2-1/+4
2021-05-04sim: add support for build-time ar & ranlibMike Frysinger2-2/+14
2021-05-01sim: nrun: add local strsignal prototypeMike Frysinger3-2/+12
2021-04-26sim: nltvals: unify common syscall tablesMike Frysinger2-3/+4
2021-04-26sim: enable hardware support by defaultMike Frysinger4-5/+120
2021-04-22Do not check for sys/time.h or sys/times.hTom Tromey3-14/+6
2021-04-22Require GNU makeTom Tromey2-67/+6
2021-04-21sim: regen against sim/m4/Mike Frysinger2-9/+13
2021-04-21sim: use -Werror when probing for supported warning flagsSimon Marchi2-1/+5
2021-04-18sim: switch to AC_CHECK_HEADERS_ONCEMike Frysinger2-52/+51
2021-04-18sim: moxie: switch syscalls to common nltvalsMike Frysinger3-5/+15
2021-04-18sim: switch to AC_CHECK_FUNCS_ONCE & merge a littleMike Frysinger2-25/+52
2021-04-12sim: cgen: move cgen_cpu_max_extra_bytes logic into the common codeMike Frysinger2-1/+5
generated by cgit v1.1 at 2024-11-21 16:32:19 +0000