| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 1997-06-24 | * interp.c (sim_resume): Clear State.exited. | Jeff Law | 1 | -0/+1 |
| 1997-06-12 | * simops.c: Fix thinko in last change. | Jeff Law | 1 | -1/+1 |
| 1997-06-10 | * simops.c: "call" stores the callee saved registers into the | Jeff Law | 1 | -53/+51 |
| 1997-06-10 | * simops.c: Fix return address computation for "call" instructions. | Jeff Law | 1 | -2/+2 |
| 1997-05-20 | * interp.c: Replace all references to load_mem and store_mem | Jeff Law | 1 | -255/+247 |
| 1997-05-19 | * interp.c (dispatch): Make this an inline function. | Jeff Law | 1 | -6/+2 |
| 1997-05-06 | * mn10300_sim.h (struct _state): Add space for mdrq register. | Jeff Law | 1 | -27/+125 |
| 1997-04-17 | Cleanups to compile under FreeBSD | Andrew Cagney | 1 | -1/+9 |
| 1997-04-08 | * simops.c (syscall): Handle new mn10300 calling conventions. | Jeff Law | 1 | -2/+2 |
| 1997-03-20 | * simops.c: Fix register extraction for a two "movbu" variants. | Jeff Law | 1 | -30/+75 |
| 1997-03-18 | * simops.c: Do syscall emulation in "syscall" instruction. Add | Jeff Law | 1 | -0/+7 |
| 1997-03-12 | * simops.c: Fix carry bit computation for "add" instructions. | Jeff Law | 1 | -11/+11 |
| 1997-03-12 | * simops.c: Fix typos in bset insns. Fix arguments to store_mem | Jeff Law | 1 | -5/+7 |
| 1997-03-05 | * simops.c: Fix register references when computing Z and N bits | Jeff Law | 1 | -3/+3 |
| 1997-01-21 | * simops.c: Undo last change to "rol" and "ror", original code | Jeff Law | 1 | -2/+2 |
| 1997-01-16 | * simops.c: Fix "rol" and "ror". | Jeff Law | 1 | -2/+2 |
| 1997-01-15 | * simops.c: Fix typo in last change. | Jeff Law | 1 | -1/+1 |
| 1997-01-13 | * simops.c: Use REG macros in few places not using them yet. | Jeff Law | 1 | -5/+5 |
| 1996-12-31 | * mn10300_sim.h (struct _state): Put all registers into a single | Jeff Law | 1 | -33/+33 |
| 1996-12-18 | * interp.c (sim_resume): Handle 0xff as a single byte insn. | Jeff Law | 1 | -12/+12 |
| 1996-12-16 | * simops.c: Handle "break" instruction. | Jeff Law | 1 | -0/+10 |
| 1996-12-16 | * simops.c: Fix restoring the PC for "ret" and "retf" instructions. | Jeff Law | 1 | -4/+12 |
| 1996-12-10 | * simops.c (REG0_4): Define. | Jeff Law | 1 | -8/+9 |
| 1996-12-07 | * simops.c (REG0_16): Fix typo. | Jeff Law | 1 | -1/+1 |
| 1996-12-07 | Add missing semicolons in last change. | Jeff Law | 1 | -13/+13 |
| 1996-12-06 | * simops.c: Call abort for any instruction that's not currently | Jeff Law | 1 | -0/+13 |
| 1996-12-06 | * simops.c: Define accessor macros to extract register | Jeff Law | 1 | -368/+326 |
| 1996-12-06 | * interp.c: Delete unused global variable "OP". | Jeff Law | 1 | -28/+24 |
| 1996-12-06 | * gencode.c (write_header): Add "insn" and "extension" arguments | Jeff Law | 1 | -233/+466 |
| 1996-12-06 | * simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)" | Jeff Law | 1 | -2/+2 |
| 1996-12-06 | * simops.c: Fix thinkos in last change to "inc dn". | Jeff Law | 1 | -5/+7 |
| 1996-12-04 | * simops.c: "add imm,sp" does not effect the condition codes. | Jeff Law | 1 | -31/+15 |
| 1996-12-04 | * simops.c: Treat both operands as signed values for | Jeff Law | 1 | -2/+2 |
| 1996-12-04 | * simops.c: Fix simulation of division instructions. | Jeff Law | 1 | -12/+8 |
| 1996-12-02 | * simomps.c: Fix carry bit handling in "sub" and "cmp" | Jeff Law | 1 | -9/+9 |
| 1996-12-02 | * simops.c: Fix "mov imm8,an" and "mov imm16,dn". | Jeff Law | 1 | -2/+2 |
| 1996-12-02 | * simops.c: Fix overflow computation for many instructions. | Jeff Law | 1 | -87/+87 |
| 1996-12-02 | * simops.c: Fix "movdm, an", "movbu dm, (an)", and "movhu dm, (an)". | Jeff Law | 1 | -5/+5 |
| 1996-12-02 | * simops.c: Fix "mov am, dn". | Jeff Law | 1 | -1/+1 |
| 1996-12-01 | * simops.c: Fix more bugs in "add imm,an" and | Jeff Law | 1 | -8/+8 |
| 1996-11-27 | * simops.c: Fix bugs in "movm" and "add imm,an". | Jeff Law | 1 | -17/+17 |
| 1996-11-27 | * simops.c: Don't lose the upper 24 bits of the return | Jeff Law | 1 | -16/+150 |
| 1996-11-27 | * simops.c: Implement the remaining 5, 6 and 7 byte instructions. | Jeff Law | 1 | -50/+166 |
| 1996-11-27 | * simops.c Implement remaining 4 byte instructions. | Jeff Law | 1 | -38/+142 |
| 1996-11-27 | * simops.c Implement remaining 3 byte instructions. | Jeff Law | 1 | -32/+118 |
| 1996-11-27 | * simops.c: Implement remaining 2 byte instructions. Call | Jeff Law | 1 | -23/+115 |
| 1996-11-27 | * simops.c: Implement lots of random instructions. | Jeff Law | 1 | -129/+640 |
| 1996-11-27 | * simops.c: Implement "movm" and "bCC" insns. | Jeff Law | 1 | -7/+158 |
| 1996-11-27 | * mn10300_sim.h (_state): Add another register (MDR). | Jeff Law | 1 | -8/+192 |
| 1996-11-26 | * mn10300_sim.h (PSW_*): Define for CC status tracking. | Jeff Law | 1 | -19/+295 |
