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2022-12-25sim: mn10300: fix SMP compileMike Frysinger1-12/+12
The igen tool sets up the SD define for code fragments to use, but mn10300 was expecting "sd". Change all the igen related code to use SD so it actually compiles.
2022-01-06sim: mn10300: migrate to standard uintXX_t typesMike Frysinger1-76/+76
This old port setup its own uintXX types, but since we require C11 now, we can assume the standard uintXX_t types exist and use them.
2021-11-28sim: mn10300: resolve syscalls dynamicallyMike Frysinger1-1/+1
Avoid use of TARGET_<syscall> defines and rely on the callback layers to resolve these dynamically so we can support multiple syscall layers instead of assuming the newlib/libgloss numbers all the time.
2021-06-14sim: mn10300: switch abort to sim_engine_abortMike Frysinger1-1/+1
This allows the caller to catch engine aborts if they want, and fixes the warning about missing stdlib.h include by not using abort().
2021-04-15sim mn10300: Fix igen generation.John Baldwin1-0/+1
Only pass the top-level instruction decode table (mn10300.igen) to igen via -i. The additional files passed previously caused igen to exit its getopt loop in main and exit silently without generating any output. In addition, when am33-2.igen was added, it was not included from mn10300.igen, so was never used. sim/mn10300/ChangeLog: * Makefile.in: (tmp-igen) Only pass mn10300.igen to igen. * mn10300.igen: Include am33-2.igen.
2004-06-262000-08-07 Graham Stott <grahams@cygnus.co.uk>Alexandre Oliva1-0/+241
* am33-2.igen (fmadd, fmsub, fmnadd, fmnsub): Correct typo. 2000-05-29 Alexandre Oliva <aoliva@cygnus.com> * interp.c (fpu_disabled_exception, fpu_unimp_exception, fpu_check_signal_exception): Take additional state arguments. Print exception type and call program_interrupt. Adjust callers. (fpu_rsqrt, fpu_cmp, fpu_add, fpu_sub, fpu_mul, fpu_div, fpu_fmadd, fpu_fmsub, fpu_fnmadd, fpu_fnmsub): Take additional arguments. * mn10300_sim.h (fpu_disabled_exception, fpu_unimp_exception, fpu_check_signal_exception): Adjust prototypes. (fpu_rsqrt, fpu_cmp, fpu_add, fpu_sub, fpu_mul, fpu_div, fpu_fmadd, fpu_fmsub, fpu_fnmadd, fpu_fnmsub): Likewise. * am33-2.igen: Adjust calls. 2000-05-19 Alexandre Oliva <aoliva@cygnus.com> * op_utils.c (cmp2fcc): Moved... * interp.c: ... here. 2000-05-18 Alexandre Oliva <aoliva@cygnus.com> * am33-2.igen: Use `unsigned32', `signed32', `unsigned64' or `signed64' where type width is relevant. 2000-05-15 Alexandre Oliva <aoliva@cygnus.com> * mn10300_sim.h: Include sim-fpu.h. (FD2FPU, FPU2FD): Enclose the FD argument in parentheses. (fpu_check_signal_exception): Declare. (struct fp_prec_t, fp_single_prec, fp_double_prec): Likewise. (FP_SINGLE, FP_DOUBLE): Shorthands for fp_*_prec. (fpu_rsqrt, fpu_cmp, fpu_add, fpu_sub, fpu_mul, fpu_div, fpu_fmadd, fpu_fmsub, fpu_fnmadd, fpu_fnmsub): Declare. * interp.c (fpu_disabled_exception): Document. (fpu_unimp_exception): Likewise. (fpu_check_signal_exception): Define. (reg2val_32, round_32, val2reg_32, fp_single_prec): Likewise. (reg2val_64, round_64, val2reg_64, fp_double_prec): Likewise. (REG2VAL, ROUND, VAL2REG): Define shorthands. (fpu_status_ok): Define. (fpu_rsqrt, fpu_cmp, fpu_add, fpu_sub, fpu_mul, fpu_div, fpu_fmadd, fpu_fmsub, fpu_fnmadd, fpu_fnmsub): Define. * am33-2.igen (frsqrt, fcmp, fadd, fsub, fmul, fdiv, fmadd, fmsub, fnmadd, fnmsub): Use new functions. 2000-04-27 Alexandre Oliva <aoliva@cygnus.com> * interp.c (sim_create_inferior): Set PSW bit to enable FP insns if architecture is AM33/2.0. * am33.igen: Include am33-2.igen. 2000-04-23 Alexandre Oliva <aoliva@cygnus.com> * mn10300.igen (movm, call, ret, retf): Check for am33_2 too. * am33.igen (movm): Likewise. 2000-04-19 Alexandre Oliva <aoliva@cygnus.com> * am33.igen: Added `*am33_2' to some instructions that were missing it. 2000-04-07 Alexandre Oliva <aoliva@cygnus.com> * am33-2.igen: New file. All insns implemented, but FP flags are only set for fcmp, exceptional conditions are not handled yet. * Makefile.in (IGEN_INSN): Added am33-2.igen. (tmp-igen): Added -M am33_2. * mn10300.igen, am33.igen: Added `*am33_2' to all insns. * gencode.c: Support FMT_D3. * mn10300_sim.h (dword): New type. (struct _state): Added fpregs. (REG_FPCR, FPCR): New define. All assorted bitmaps. (XS2FS, AS2FS, Xf2FD): New macros. (FS2FPU, FD2FPU, FPU2FS, FPU2FD): Likewise. (load_dword, store_dword): New functions or macros. (u642dw, dw2u64): New functions. (fpu_disabled_exception, fpu_unimp_exception): Declared. * interp.c (fpu_disabled_exception): Defined; no actual implementation. (fpu_unimp_exception): Likewise. * op_utils.c (cmp2fcc): New function.
2001-05-07* mn10300.igen: Doc fixes.Jim Blandy1-6/+6
2000-05-29minor formatting tweaks to aid syncronisationNick Clifton1-6/+12
2000-05-18* mn10300_sim.h (genericAdd, genericSub, genericCmp, genericOr,Alexandre Oliva1-47/+47
genericXor, genericBtst): Use `unsigned32'. * op_utils.c: Likewise. * mn10300.igen, am33.igen: Use `unsigned32', `signed32', `unsigned64' or `signed64' where type width is relevant.
1999-12-07import gdb-1999-12-06 snapshotJason Molenda1-0/+808
1999-04-26import gdb-19990422 snapshotStan Shebs1-1/+2
1999-04-16Initial creation of sourceware repositorygdb-4_18-branchpointStan Shebs1-0/+3537
1999-04-16Initial creation of sourceware repositoryStan Shebs1-4449/+0
1998-08-26Regress yesterday's change to jmp instruction -- it has deceiving syntax.Joyce Janczyn1-17/+27
Also tidy up some code to match documentation and fix div, divu by 0.
1998-08-25* mn10300.igen (OP_F0F4): Need to load contents of register AN0Joyce Janczyn1-277/+282
for jmp.
1998-07-06 * mn10300.igen: Add am33 support.Jeff Law1-446/+1363
1998-03-25 * mn10300.igen (cmp imm8,An): Do not sign extend imm8 value.Joyce Janczyn1-1/+1
1998-03-25Pacify GCC.Andrew Cagney1-3/+0
1998-03-24IGEN input files for mn10300 simulator.Joyce Janczyn1-0/+3520
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