| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 1997-08-26 | Flush defunct sim_kill. | Andrew Cagney | 1 | -0/+4 |
| 1997-08-25 | Add ABFD argument to sim_open call. Pass through to sim_config so | Andrew Cagney | 1 | -0/+17 |
| 1997-06-12 | * simops.c: Fix thinko in last change. | Jeff Law | 1 | -0/+4 |
| 1997-06-10 | * simops.c: "call" stores the callee saved registers into the | Jeff Law | 1 | -0/+4 |
| 1997-06-10 | * simops.c: Fix return address computation for "call" instructions. | Jeff Law | 1 | -0/+8 |
| 1997-05-22 | * interp.c (sim_resume): Add missing case in big switch | Jeff Law | 1 | -0/+5 |
| 1997-05-20 | * interp.c: Replace all references to load_mem and store_mem | Jeff Law | 1 | -0/+25 |
| 1997-05-19 | * interp.c (dispatch): Make this an inline function. | Jeff Law | 1 | -0/+7 |
| 1997-05-18 | * interp.c (load_mem_big): Remove function. It's now a macro | Jeff Law | 1 | -0/+10 |
| 1997-05-16 | * interp.c (load_mem): If we get a load from an out of range | Jeff Law | 1 | -0/+7 |
| 1997-05-06 | * mn10300_sim.h: Fix ordering of bits in the PSW. | Jeff Law | 1 | -0/+2 |
| 1997-05-06 | * interp.c: Improve hashing routine to avoid long list | Jeff Law | 1 | -0/+7 |
| 1997-05-06 | * mn10300_sim.h (struct _state): Add space for mdrq register. | Jeff Law | 1 | -0/+12 |
| 1997-04-18 | Ref gdb/11763 - can't stop a running simulator: | Andrew Cagney | 1 | -0/+4 |
| 1997-04-17 | * Makefile.in (SIM_OBJS): Add sim-load.o. | David Edelsohn | 1 | -0/+9 |
| 1997-04-17 | Cleanups to compile under FreeBSD | Andrew Cagney | 1 | -0/+10 |
| 1997-04-07 | Get configure to define RETSIGTYPE | Andrew Cagney | 1 | -0/+5 |
| 1997-04-05 | * Makefile.in: Change mn10300-opc.o to m10300-opc.o, to match | Ian Lance Taylor | 1 | -0/+5 |
| 1997-04-02 | * interp.c (sim_open): New arg `kind'. | David Edelsohn | 1 | -0/+2 |
| 1997-04-02 | * aclocal.m4: Check for stdlib.h, string.h, strings.h, unistd.h. | David Edelsohn | 1 | -0/+4 |
| 1997-04-02 | New file common/sim-config.c sets/checks simulator configuration options. | Andrew Cagney | 1 | -0/+18 |
| 1997-03-18 | Move SIM_AC_OPTION_ macros out of SIM_AC_COMMON macro - was trashing | Andrew Cagney | 1 | -0/+4 |
| 1997-03-17 | * configure: Re-generate. | Andrew Cagney | 1 | -0/+4 |
| 1997-03-14 | Regenerate simulator configure scripts; Remove d10v traps 1-3, Make 15 the sy... | Michael Meissner | 1 | -0/+4 |
| 1997-03-13 | * interp.c (sim_open): New SIM_DESC result. Argument is now | David Edelsohn | 1 | -0/+6 |
| 1997-03-12 | * simops.c: Fix carry bit computation for "add" instructions. | Jeff Law | 1 | -0/+2 |
| 1997-03-12 | * simops.c: Fix typos in bset insns. Fix arguments to store_mem | Jeff Law | 1 | -0/+17 |
| 1997-01-24 | * interp.c (init_system): Allocate 2^19 bytes of space for the | Jeff Law | 1 | -0/+5 |
| 1997-01-23 | * configure configure.in Makefile.in: Update to new configure | Stu Grossman | 1 | -0/+9 |
| 1997-01-21 | * simops.c: Undo last change to "rol" and "ror", original code | Jeff Law | 1 | -0/+5 |
| 1997-01-16 | * simops.c: Fix "rol" and "ror". | Jeff Law | 1 | -0/+8 |
| 1997-01-13 | * simops.c: Use REG macros in few places not using them yet. | Jeff Law | 1 | -0/+4 |
| 1997-01-06 | * mn10300_sim.h (struct _state): Fix number of registers! | Jeff Law | 1 | -0/+4 |
| 1996-12-31 | * mn10300_sim.h (struct _state): Put all registers into a single | Jeff Law | 1 | -0/+8 |
| 1996-12-18 | * interp.c (sim_resume): Handle 0xff as a single byte insn. | Jeff Law | 1 | -0/+7 |
| 1996-12-16 | * simops.c: Handle "break" instruction. | Jeff Law | 1 | -0/+2 |
| 1996-12-16 | * simops.c: Fix restoring the PC for "ret" and "retf" instructions. | Jeff Law | 1 | -0/+11 |
| 1996-12-10 | * simops.c (REG0_4): Define. | Jeff Law | 1 | -0/+5 |
| 1996-12-07 | * simops.c (REG0_16): Fix typo. | Jeff Law | 1 | -0/+4 |
| 1996-12-06 | * simops.c: Call abort for any instruction that's not currently | Jeff Law | 1 | -0/+3 |
| 1996-12-06 | * simops.c: Define accessor macros to extract register | Jeff Law | 1 | -0/+3 |
| 1996-12-06 | * interp.c: Delete unused global variable "OP". | Jeff Law | 1 | -0/+5 |
| 1996-12-06 | * gencode.c (write_header): Add "insn" and "extension" arguments | Jeff Law | 1 | -0/+11 |
| 1996-12-06 | * simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)" | Jeff Law | 1 | -1/+3 |
| 1996-12-06 | * simops.c: Fix thinkos in last change to "inc dn". | Jeff Law | 1 | -0/+4 |
| 1996-12-04 | * simops.c: "add imm,sp" does not effect the condition codes. | Jeff Law | 1 | -0/+5 |
| 1996-12-04 | * simops.c: Treat both operands as signed values for | Jeff Law | 1 | -0/+11 |
| 1996-12-02 | * simops.c: Fix "mov imm8,an" and "mov imm16,dn". | Jeff Law | 1 | -0/+4 |
| 1996-12-02 | * simops.c: Fix overflow computation for many instructions. | Jeff Law | 1 | -0/+2 |
| 1996-12-02 | * simops.c: Fix "movdm, an", "movbu dm, (an)", and "movhu dm, (an)". | Jeff Law | 1 | -0/+2 |
