riscv-gnu-toolchain/gdb.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2016-01-01	GDB copyright headers update after running GDB's copyright.py script.	Joel Brobecker	1	-1/+1
2015-05-08	Switch erc32 simulator copyright headers to FSF.	Joel Brobecker	1	-20/+14
2015-04-19	sim/erc32: Switched emulated memory to host endian order.	Jiri Gaisler	1	-0/+2
2015-03-28	sim/erc32: Fix a few compiler warnings	Jiri Gaisler	1	-2/+2
2015-03-28	sim/erc32: Use memory_iread() function for instruction fetching.	Jiri Gaisler	1	-0/+2
2015-03-17	sim/erc32: Added -v command line switch for verbose output	Jiri Gaisler	1	-6/+4
2015-03-16	sim/erc32: use SIM_AC_OPTION_HOSTENDIAN to probe for host endianess	Jiri Gaisler	1	-3/+8
2015-02-21	sim/erc32: Fix incorrect simulator performance report	Jiri Gaisler	1	-2/+3
2014-01-07	remove PARAMS from sim	Tom Tromey	1	-46/+46
2012-12-19	[sim] Update old contact info in GPL license notices	Joel Brobecker	1	-2/+1
2012-12-19	Update sim copyright headers from GPLv2-or-later to GPLv3-or-later.	Joel Brobecker	1	-1/+1
2012-06-15	sim/erc32/sys.h: Include "config.h".	Joel Brobecker	1	-0/+1
2010-05-20	Fix erc32 sim build failure due to missing stdint.h.	Joel Brobecker	1	-3/+4
2010-05-11	2010-04-20 Tiemen Schut <T.Schut@sron.nl>	Joel Sherrill	1	-23/+24
2002-06-09	Move include/callback.h and include/remote-sim.h to include/gdb/.	Andrew Cagney	1	-2/+2
1999-04-16	Initial creation of sourceware repositorygdb-4_18-branchpoint	Stan Shebs	1	-0/+217
1999-04-16	Initial creation of sourceware repository	Stan Shebs	1	-145/+0
1996-07-04	* erc32.c (mec_reset mec_read mec_write memory_read memory_write),	Stu Grossman	1	-0/+145