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path: root/sim/cris/ChangeLog
AgeCommit message (Expand)AuthorFilesLines
2021-06-24sim: cris: fix a few missing prototype warningsMike Frysinger1-0/+8
2021-06-23sim: cris: override getpid callbackMike Frysinger1-0/+5
2021-06-22sim: cris: fix a few warningsMike Frysinger1-0/+6
2021-06-22sim: drop configure scripts for simple portsMike Frysinger1-0/+4
2021-06-21sim: unify hardware settingsMike Frysinger1-0/+5
2021-06-21sim: hw: rework configure option & device selectionMike Frysinger1-0/+6
2021-06-20sim: cris: clean up printf & abort usage a bitMike Frysinger1-0/+6
2021-06-20sim: delete SIM_AC_COMMON macroMike Frysinger1-0/+5
2021-06-20sim: unify general maintainer settingsMike Frysinger1-0/+5
2021-06-20sim: unify cgen maintainer settingsMike Frysinger1-0/+6
2021-06-20sim: move sim-inline to the common codeMike Frysinger1-0/+5
2021-06-19sim: unify bfd library dependency testing logicMike Frysinger1-0/+5
2021-06-19sim: unify various library testing logicMike Frysinger1-0/+4
2021-06-18sim: unify -Werror build settingsMike Frysinger1-0/+4
2021-06-18sim: move -Werror disabling to MakefileMike Frysinger1-0/+6
2021-06-18sim: split sim-signal.h include outMike Frysinger1-0/+4
2021-06-17sim: overhaul & unify endian settings managementMike Frysinger1-0/+6
2021-06-17sim: split sim/callback.h include outMike Frysinger1-0/+4
2021-06-16sim: drop obsolete AC_EXEEXT callMike Frysinger1-0/+4
2021-06-16sim: drop arch-specific config.hMike Frysinger1-0/+6
2021-06-15sim: move dv-sockser define to CPPFLAGSMike Frysinger1-0/+4
2021-06-12sim: start unifying portability shimsMike Frysinger1-0/+4
2021-06-12sim: assume sys/select.h always existsMike Frysinger1-0/+5
2021-06-12sim: overhaul alignment settings managementMike Frysinger1-0/+4
2021-06-12sim: unify assert build settingsMike Frysinger1-0/+4
2021-06-12sim: unify platform function & header testsMike Frysinger1-0/+5
2021-06-09sim: cgen: inline cgen_init logicMike Frysinger1-0/+4
2021-05-24opcodes: cris: move desc & opc files from sim/Mike Frysinger1-0/+9
2021-05-23sim: cris: fix memory setup typosMike Frysinger1-0/+4
2021-05-23sim: cris: add unistd.h for environ declMike Frysinger1-0/+4
2021-05-17sim: cgen: invert sim_state storage for cgen portsMike Frysinger1-0/+4
2021-05-16sim: switch config.h usage to defs.hMike Frysinger1-0/+6
2021-05-16sim: riscv: move __int128 check to configureMike Frysinger1-0/+4
2021-05-15sim: switch to libiberty environ.hMike Frysinger1-0/+6
2021-05-14sim: callback: convert time interface to 64-bitMike Frysinger1-0/+5
2021-05-04Add missing stdlib.h includes to simTom Tromey1-0/+4
2021-05-04sim: add support for build-time ar & ranlibMike Frysinger1-0/+4
2021-05-04sim: clean up bfd_vma printingMike Frysinger1-0/+6
2021-05-01sim: nrun: add local strsignal prototypeMike Frysinger1-0/+4
2021-04-26sim: nltvals: unify common syscall tablesMike Frysinger1-0/+4
2021-04-25Add engv32.h to SIM_EXTRA_DEPS in sim/crisTom Tromey1-0/+4
2021-04-23sim: simplify hardware m4 macroMike Frysinger1-0/+5
2021-04-22Do not check for sys/time.h or sys/times.hTom Tromey1-0/+6
2021-04-22Remove and modernize dependencies in simTom Tromey1-0/+8
2021-04-22Require GNU makeTom Tromey1-0/+4
2021-04-21sim: regen against sim/m4/Mike Frysinger1-0/+4
2021-04-21sim: use -Werror when probing for supported warning flagsSimon Marchi1-0/+4
2021-04-18sim: switch to AC_CHECK_HEADERS_ONCEMike Frysinger1-0/+5
2021-04-18sim: switch to AC_CHECK_FUNCS_ONCE & merge a littleMike Frysinger1-0/+4
2021-04-12sim: cgen: move cgen_cpu_max_extra_bytes logic into the common codeMike Frysinger1-0/+4
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