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AgeCommit message (Expand)AuthorFilesLines
2023-01-10sim: mips: move libsim.a creation to top-levelMike Frysinger1-10/+10
2023-01-05sim: Move getopt checking inside SIM_AC_PLATFORMTsukasa OI1-32/+32
2023-01-02sim: build: add var for tracking sim enable directlyMike Frysinger1-33/+66
2023-01-02sim: build: use Automake include varsMike Frysinger1-6/+2
2023-01-01sim: replace -I$srcroot/bfd include with -I$srcrootMike Frysinger1-2/+2
2023-01-01sim: refresh copyright dates a bitMike Frysinger1-1/+1
2022-12-27sim: mips: hoist "multi" igen rules up to common buildsMike Frysinger1-2/+16
2022-12-27sim: mips: hoist "m16" igen rules up to common buildsMike Frysinger1-2/+16
2022-12-27sim: mips: hoist "single" igen rules up to common buildsMike Frysinger1-2/+16
2022-12-27sim: mips: rename "igen" generation mode to "single"Mike Frysinger1-25/+25
2022-12-27sim: mips: unify itable generation (a bit)Mike Frysinger1-0/+4
2022-12-27sim: mips: rename multi_flags to igen_itable_flagsMike Frysinger1-6/+6
2022-12-27sim: mips: drop unused micromips igen logicMike Frysinger1-8/+2
2022-12-25sim: smp: plumb igen flag down to all usersMike Frysinger1-7/+9
2022-12-25sim: smp: make option available againMike Frysinger1-2/+30
2022-12-24sim: mips: move igen settings to top-level configureMike Frysinger1-8/+260
2022-12-21sim: mips: move fpu bitsize defines to top-level configureMike Frysinger1-2/+26
2022-12-21sim: mips: move bitsize defines to top-level configureMike Frysinger1-2/+28
2022-12-21sim: mips: move subtarget defines to top-level configureMike Frysinger1-2/+27
2022-11-10sim: restore lstat & mkdir func checksMike Frysinger1-2/+8
2022-11-07sim: riscv: add missing AC_MSG_RESULT callMike Frysinger1-0/+2
2022-11-07sim: v850: drop subdir configure logicMike Frysinger1-5/+21
2022-11-07sim: mn10300: drop subdir configure logicMike Frysinger1-4/+20
2022-11-07sim: or1k: drop subdir configure logicMike Frysinger1-4/+20
2022-11-07sim: bpf: drop subdir configure logicMike Frysinger1-8/+24
2022-11-07sim: riscv: drop subdir configure logicMike Frysinger1-2/+30
2022-11-07sim: .gdbinit: generate for all arch subdirsMike Frysinger1-100/+121
2022-11-07sim: build: add a proper var for enabled archesMike Frysinger1-33/+69
2022-11-05sim: fix readline linkageMike Frysinger1-1/+1
2022-11-05sim: run: move linking into top-levelMike Frysinger1-2/+16
2022-11-05sim: adjust sim_hw options styleMike Frysinger1-2/+4
2022-11-04sim: don't hardcode -ldl for SDL supportMike Frysinger1-5/+9
2022-11-04sim: build: change AC_CHECK_LIB to AC_SEARCH_LIBSMike Frysinger1-90/+145
2022-11-04sim: build: switch to bfd & opcodes libtool linker scriptsMike Frysinger1-359/+4
2022-11-03sim: merge gnulib logic into the top-levelMike Frysinger1-2/+6
2022-11-02sim: split CPPFLAGS between build & hostMike Frysinger1-2/+6
2022-10-11sim: Check known getopt definition existenceTsukasa OI1-0/+32
2022-09-27sim: Link ZSTD_LIBSFangrui Song1-2/+132
2022-03-28sim: add arch/.gdbinit stub scriptsMike Frysinger1-25/+100
2022-03-25libtool.m4: fix the NM="/nm/over/here -B/option/with/path" caseNick Alcock1-7/+13
2022-02-21sim: gdbinit: hoist setup to common codeMike Frysinger1-1/+2
2022-02-14sim: Fix use of out-of-tree assembler and linker when testingHans-Peter Nilsson1-97/+259
2021-11-28sim: testsuite: setup per-port toolchain settings for multitarget buildMike Frysinger1-3/+769
2021-11-18sim: avoid installing headers when there is no simMike Frysinger1-2/+16
2021-11-10sim: frv: flip trapdump default back to offMike Frysinger1-1/+1
2021-10-31sim: add arch-specific conditional logicMike Frysinger1-33/+529
2021-09-27configure: regenerate in all projects that use libtool.m4Nick Alcock1-45/+46
2021-09-13sim: bfin: add support for SDL2Mike Frysinger1-24/+228
2021-09-09sim: dv-sockser: enable for mingw targets tooMike Frysinger1-10/+2
2021-09-08sim: update configure target listMike Frysinger1-22/+22
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