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AgeCommit message (Expand)AuthorFilesLines
2021-11-11sim: io: tweak compiler workaround with error outputMike Frysinger1-3/+3
2021-11-03sim: mloop: mark a few conditionally used funcs as unusedMike Frysinger1-2/+2
2021-11-02sim: hoist cgen mloop rules up to common buildsMike Frysinger1-6/+9
2021-11-01sim: igen: minor build output alignment fixMike Frysinger1-1/+1
2021-10-31sim: events: clean up trace castsMike Frysinger1-72/+83
2021-10-31sim: drop unused targ-vals.h includesMike Frysinger3-3/+0
2021-10-31sim: unify callback.o buildingMike Frysinger2-1/+3
2021-10-31sim: nltvals: pull target open flags out into a dedicated source fileMike Frysinger5-45/+87
2021-10-31sim: nltvals: localize TARGET_<open> definesMike Frysinger2-19/+29
2021-10-31sim: nltvals: pull target signal out into a dedicated source fileMike Frysinger5-65/+138
2021-10-31sim: nltvals: pull target errno out into a dedicated source fileMike Frysinger6-147/+365
2021-10-31sim: common: merge multiple clean commandsMike Frysinger1-6/+6
2021-10-31sim: tighten up build regen rulesMike Frysinger1-4/+4
2021-10-31sim: igen: tighten up build outputMike Frysinger1-0/+1
2021-10-31sim: tighten up stamp rulesMike Frysinger1-20/+24
2021-10-31sim: silence stamp touch rulesMike Frysinger1-3/+3
2021-10-31sim: standardize move-if-change rulesMike Frysinger1-4/+4
2021-10-30sim: fix compilation on mingw64 [PR sim/28476]Orgad Shaneh1-3/+2
2021-10-04sim: add --info-target for listing supported BFD targetsMike Frysinger1-0/+19
2021-10-03sim: filter out SIGSTKSZ [PR sim/28302]Mike Frysinger2-3/+4
2021-09-28sim: drop weak func attrs on module initsMike Frysinger1-1/+1
2021-09-11sim: run: change help short option to -hMike Frysinger1-1/+1
2021-09-09sim: accept -EB/-EL short optionsMike Frysinger1-3/+3
2021-09-09sim: drop old O_NDELAY & FNBLOCK supportMike Frysinger2-22/+4
2021-09-09sim: dv-sockser: enable for mingw targets tooMike Frysinger1-4/+4
2021-09-09sim: cgen: workaround Windows VOID defineMike Frysinger1-0/+2
2021-09-09sim: dv-sockser: move sim-main.h include after system includesMike Frysinger1-2/+1
2021-08-19sim: nltvals: switch output mode to a directoryMike Frysinger1-5/+8
2021-08-17sim: nltvals: localize TARGET_<ERRNO> definesMike Frysinger1-5/+1
2021-08-17sim: rename ChangeLog files to ChangeLog-2021Mike Frysinger1-0/+0
2021-07-01sim: unify reserved instruction bits settingsMike Frysinger2-2/+4
2021-07-01cgen: split GUILE setting outMike Frysinger2-1/+7
2021-06-30sim: unify scache settingsMike Frysinger4-8/+8
2021-06-30sim: move scache init to dynamic modules.cMike Frysinger4-7/+12
2021-06-30sim: move profile init to dynamic modules.cMike Frysinger4-8/+11
2021-06-30sim: move trace init to dynamic modules.cMike Frysinger4-8/+11
2021-06-30sim: move engine init to dynamic modules.cMike Frysinger4-6/+10
2021-06-30sim: delete unused model settingsMike Frysinger2-23/+6
2021-06-30sim: move default model to the runtime sim stateMike Frysinger5-16/+21
2021-06-30sim: namespace sim_machsMike Frysinger7-37/+67
2021-06-29sim: fix arch Makefile regen when unifiedMike Frysinger2-1/+7
2021-06-29sim: callback: add check for HAVE_KILLMike Frysinger2-0/+9
2021-06-29sim: model: constify sim_machs storageMike Frysinger3-6/+15
2021-06-29sim: io: add printf attributes to vprintf funcs tooMike Frysinger2-2/+9
2021-06-29sim: callback: add printf attributesMike Frysinger2-1/+7
2021-06-29sim: callback: drop unused printf helpersMike Frysinger3-66/+8
2021-06-29sim: cgen: require long long supportMike Frysinger3-29/+6
2021-06-27sim: cgen: suppress trace non-literal printf warningMike Frysinger2-0/+10
2021-06-27sim: cgen: add asserts to fix unused engine warningsMike Frysinger2-1/+8
2021-06-27sim: cgen: add printf attributes in a few more callsMike Frysinger2-2/+7
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