aboutsummaryrefslogtreecommitdiff
path: root/sim/common/sim-core.c
AgeCommit message (Expand)AuthorFilesLines
2020-01-19sim: add some stdlib.h includesSimon Marchi1-0/+2
2020-01-01Update copyright year range in all GDB files.Joel Brobecker1-1/+1
2019-01-01Update copyright year range in all GDB files.Joel Brobecker1-1/+1
2018-09-28Change "xor" name in cpu_core to allow building with iso646.h or C++ compilerКомпан, Вячеслав Олегович1-3/+5
2018-01-02Update copyright year range in all GDB filesJoel Brobecker1-1/+1
2017-01-01update copyright year range in GDB filesJoel Brobecker1-1/+1
2016-01-01GDB copyright headers update after running GDB's copyright.py script.Joel Brobecker1-1/+1
2015-12-26sim: punt WITH_DEVICES & tconfig.h supportMike Frysinger1-54/+0
2015-12-26sim: sim-core: pass down cpu to hw accesses when availableMike Frysinger1-10/+34
2015-12-25sim: device_error: puntMike Frysinger1-24/+0
2015-12-25sim: always enable callback memoryMike Frysinger1-4/+2
2015-11-17sim: always enable modulo memoryMike Frysinger1-21/+3
2015-04-17sim: replace CIA_{GET,SET} with CPU_PC_{GET,SET}Mike Frysinger1-2/+2
2015-01-01Update year range in copyright notice of all files owned by the GDB project.Joel Brobecker1-1/+1
2014-01-01Update Copyright year range in all files maintained by GDB.Joel Brobecker1-1/+1
2013-01-01Update years in copyright notice for the GDB files.Joel Brobecker1-1/+1
2012-01-04Copyright year update in most files of the GDB Project.Joel Brobecker1-1/+1
2011-05-11sim: fix func call style (space before paren)Mike Frysinger1-23/+23
2011-03-15sim: common: trim trailing whitespaceMike Frysinger1-9/+9
2011-02-14sim: punt zfree()Mike Frysinger1-4/+4
2011-01-01run copyright.sh for 2011.Joel Brobecker1-1/+1
2010-11-23sim: cast away hw/device differencesMike Frysinger1-0/+3
2010-03-30sim: change raddr to address_wordMike Frysinger1-2/+2
2010-01-01Update copyright notices to add year 2010.Joel Brobecker1-1/+1
2009-01-14 Update the copyright notice of some of the files I missedJoel Brobecker1-1/+1
2008-01-01 Updated copyright notices for most files.Daniel Jacobowitz1-1/+1
2007-08-24 Switch the license of all files explicitly copyright the FSFJoel Brobecker1-4/+2
2007-01-09Copyright updates for 2007.Daniel Jacobowitz1-1/+1
2003-12-19Add support for m32r-linux target, including a RELA ABI and PIC.Nick Clifton1-0/+19
2002-11-232002-11-22 Andrew Cagney <ac131313@redhat.com>Andrew Cagney1-19/+22
2001-03-16* tweakFrank Ch. Eigler1-3/+3
1999-04-26import gdb-19990422 snapshotStan Shebs1-9/+6
1999-04-16Initial creation of sourceware repositorygdb-4_18-branchpointStan Shebs1-0/+839
1999-04-16Initial creation of sourceware repositoryStan Shebs1-820/+0
1998-06-11 * sim-core.h (SIM_CORE_SIGNAL_FN): New typedef.Doug Evans1-130/+155
1998-03-04 * sim-core.c (sim_core_attach): Use xmalloc instead of zalloc.Doug Evans1-6/+3
1998-03-03Good grief. Detailed function descriptions should accompany their definition.Doug Evans1-11/+1
1998-03-03(sim_core_attach): Add a comment describing its function.Doug Evans1-1/+13
1998-03-02 * sim-core.c (sim_core_attach): Revise last patch.Doug Evans1-1/+4
1998-03-02 * sim-core.c (sim_core_attach): Use xmalloc instead of zalloc.Doug Evans1-2/+3
1998-02-25 (profile_print_core): Simplify by calling sim_core_map_to_str.Doug Evans1-1/+1
1998-02-20Backout of revision 1.35. Abort may be valid operation.Andrew Cagney1-3/+14
1997-11-19 * sim-core.c (sim_core_signal): Use sim_stopped instead ofDoug Evans1-2/+2
1997-11-19 * sim-signal.c, sim-signal.h: New files.Doug Evans1-11/+2
1997-11-18 * sim-core.c (sim_core_signal): Use CIA_ADDR to fetch value.Doug Evans1-3/+1
1997-11-14(sim_core_signal): Add missing "\n" in message.Doug Evans1-4/+7
1997-11-05Rewrite the MIPS simulator's memory model so that it uses the genericAndrew Cagney1-9/+20
1997-10-31Make memory regions layered (just like existing device regions) soAndrew Cagney1-68/+61
1997-10-28Implement sim_core_{read,write}_word using sim_core_{read,write}_<N>.Andrew Cagney1-4/+0
1997-10-27Add 128 bit transfers to sim core.Andrew Cagney1-1/+5
generated by cgit v1.1 at 2024-11-20 01:42:11 +0000