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AgeCommit message (Expand)AuthorFilesLines
2023-01-10sim: build: drop support for creating libsim.a in subdirsMike Frysinger1-2/+0
2023-01-10sim: bpf: move libsim.a creation to top-levelMike Frysinger2-12/+36
2023-01-10sim: modules: trigger generation from top-levelMike Frysinger1-0/+1
2023-01-02sim: build: move generated headers to built sourcesMike Frysinger1-2/+4
2023-01-02sim: bpf: hoist cgen rules to top-levelMike Frysinger2-90/+40
2023-01-01sim: replace -I$srcroot/opcodes include with -I$srcrootMike Frysinger1-2/+2
2023-01-01Update copyright year range in header of all files managed by GDBJoel Brobecker26-26/+26
2022-12-25sim: cpu: change default init to handle all cpusMike Frysinger1-1/+1
2022-12-23sim: cgen: move cgen-types.h include to cgen-defs.hMike Frysinger1-1/+0
2022-12-22sim: use bfd_vma when reading start addr from bfd infoMike Frysinger1-1/+1
2022-12-21sim: enable common sim_cpu usage everywhereMike Frysinger1-2/+0
2022-12-21sim: bpf: invert sim_cpu storageMike Frysinger3-7/+13
2022-11-07sim: bpf: drop subdir configure logicMike Frysinger4-2955/+2
2022-11-05sim: run: move linking into top-levelMike Frysinger1-0/+8
2022-11-04sim: build: remove various obsolete generation dep variablesMike Frysinger1-19/+1
2022-11-02sim: common: change sim_{fetch,store}_register helpers to use void* buffersMike Frysinger1-2/+2
2022-10-31sim: reg: constify store helperMike Frysinger1-1/+1
2022-02-21sim: gdbinit: hoist setup to common codeMike Frysinger1-9/+0
2022-01-01Automatic Copyright Year update after running gdb/copyright.pyJoel Brobecker26-26/+26
2021-12-09sim: use ## for automake commentsMike Frysinger1-17/+17
2021-11-16sim: callback: expose argv & environMike Frysinger1-0/+5
2021-11-16sim: keep track of program environment stringsMike Frysinger1-1/+7
2021-11-15sim: split program path out of argv vectorMike Frysinger1-4/+1
2021-11-02sim: hoist cgen mloop rules up to common buildsMike Frysinger2-27/+50
2021-10-31sim: tighten up stamp rulesMike Frysinger1-2/+4
2021-10-31sim: silence stamp touch rulesMike Frysinger1-8/+8
2021-10-31sim: standardize move-if-change rulesMike Frysinger1-4/+4
2021-08-17sim: rename ChangeLog files to ChangeLog-2021Mike Frysinger1-0/+0
2021-07-01sim: unify reserved instruction bits settingsMike Frysinger2-2/+4
2021-06-30sim: unify scache settingsMike Frysinger4-26/+6
2021-06-30sim: move default model to the runtime sim stateMike Frysinger5-23/+8
2021-06-30sim: namespace sim_machsMike Frysinger3-1/+13
2021-06-29sim: model: constify sim_machs storageMike Frysinger2-1/+5
2021-06-28sim: bpf: enable -Werror usageMike Frysinger2-3/+4
2021-06-28sim: bpf: fix printf warnings on 32-bit systemsMike Frysinger2-1/+5
2021-06-28sim: cgen: delete unused record_trace_results functionsMike Frysinger2-8/+4
2021-06-27sim: bpf/cris: include cgen-mem in decodersMike Frysinger3-0/+9
2021-06-27sim: bpf: include more local headers & fix broken funcsMike Frysinger5-10/+25
2021-06-27sim: bpf: add explicit casts when using explicit formatsMike Frysinger2-12/+16
2021-06-27sim: bpf: fix mixed decls & code warnings (and style)Mike Frysinger3-3/+12
2021-06-22sim: drop configure scripts for simple portsMike Frysinger2-0/+11
2021-06-21sim: unify hardware settingsMike Frysinger3-49/+5
2021-06-21sim: hw: rework configure option & device selectionMike Frysinger2-37/+29
2021-06-20sim: delete SIM_AC_COMMON macroMike Frysinger4-5/+5
2021-06-20sim: unify general maintainer settingsMike Frysinger3-124/+5
2021-06-20sim: unify cgen maintainer settingsMike Frysinger5-45/+6
2021-06-20sim: move sim-inline to the common codeMike Frysinger3-36/+5
2021-06-19sim: unify gettext/intl probing logicMike Frysinger2-85/+0
2021-06-19sim: unify toolchain dependency logicMike Frysinger2-1109/+1
2021-06-19sim: unify toolchain probing logicMike Frysinger2-1360/+26
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