| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2011-03-17 | sim: bfin: check for kill/pread | Mike Frysinger | 5 | -2/+25 |
| 2011-03-15 | sim: bfin: add GPIO device simulation | Mike Frysinger | 7 | -28/+369 |
| 2011-03-15 | sim: bfin: fix brace style | Mike Frysinger | 27 | -27/+54 |
| 2011-03-15 | sim: bfin: fix brace style | Mike Frysinger | 58 | -161/+342 |
| 2011-03-15 | sim: bfin: handle AZ updates with 16bit adds/subs | Mike Frysinger | 2 | -1/+6 |
| 2011-03-15 | sim: bfin: skip acc/ASTAT updates for moves | Mike Frysinger | 2 | -6/+10 |
| 2011-03-15 | sim: bfin: handle AN (negative overflows) in dsp mult insns | Mike Frysinger | 2 | -8/+40 |
| 2011-03-15 | sim: bfin: handle V overflows in dsp mult insns | Mike Frysinger | 2 | -7/+15 |
| 2011-03-15 | sim: bfin: decode ASTAT on failure | Mike Frysinger | 2 | -34/+79 |
| 2011-03-15 | sim: bfin: handle saturation with fract multiplications | Mike Frysinger | 2 | -0/+6 |
| 2011-03-14 | sim: bfin: forgot to cvs add the changelog | Mike Frysinger | 1 | -0/+29 |
| 2011-03-06 | sim: bfin: new port | Mike Frysinger | 101 | -0/+30214 |
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