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path: root/sim/aarch64/ChangeLog
AgeCommit message (Expand)AuthorFilesLines
2021-04-18sim: switch to AC_CHECK_FUNCS_ONCE & merge a littleMike Frysinger1-0/+4
2021-04-12sim: cgen: move cgen_cpu_max_extra_bytes logic into the common codeMike Frysinger1-0/+4
2021-04-07Aarch64 sim fix for gcc-10 miscompilation.Jim Wilson1-0/+6
2021-04-02sim: unify toolchain settingsMike Frysinger1-0/+4
2021-02-28sim: require AC_PROG_CPP explicitlyMike Frysinger1-0/+4
2021-02-21sim: common: split up acinclude.m4 into individual m4 filesMike Frysinger1-0/+5
2021-02-13sim: switch to AC_CONFIG_MACRO_DIRSMike Frysinger1-0/+5
2021-02-06sim: drop use of bfd/configure.hostMike Frysinger1-0/+4
2021-01-11sim: clean up C11 header includesMike Frysinger1-0/+4
2021-01-09sim: enable -Werror by default for some archesMike Frysinger1-0/+4
2021-01-08sim: require a C11 compilerMike Frysinger1-0/+4
2021-01-04sim: update bug URI to https://Mike Frysinger1-0/+4
2020-02-06sim/aarch64: Fix register ordering bug in blr (PR sim/25318)Carlo Bramini1-0/+6
2019-03-28sim: fix aarch64 sim buildAndrew Burgess1-0/+5
2017-09-06Honor an existing CC_FOR_BUILD in the environment for sim.John Baldwin1-0/+4
2017-04-22Fix ldn/stn multiple instructions. Fix testcases with unaligned data.Jim Wilson1-0/+11
2017-04-08Add support for fcvtl and fcvtl2.Jim Wilson1-0/+3
2017-04-08Support the fcmXX zero instructions.Jim Wilson1-0/+6
2017-03-25Fix bug with cmn/adds where C flag was incorrectly set.Jim Wilson1-0/+5
2017-03-03Fix umulh and smulh bugs. Fix bugs in last week's sumov.s testsuite.Jim Wilson1-0/+6
2017-02-25Add missing smov support, and clean up existing umov support.Jim Wilson1-0/+8
2017-02-25Add missing cnt (popcount) instruction support.Jim Wilson1-0/+6
2017-02-19Fix for aarch64 sim sxtl/uxtl insns, plus another fix for addv.Jim Wilson1-0/+6
2017-02-14Add self to aarch64 maintainers. Fix mla instruction.Jim Wilson1-0/+2
2017-02-14Fix bit/bif instructions.Jim Wilson1-0/+4
2017-02-14Add ldn/stn single support, fix ldnr support.Jim Wilson1-0/+12
2017-01-23Add support for cmtst.Jim Wilson1-0/+4
2017-01-17Fixes for addv and xtn2 instructions.Jim Wilson1-0/+8
2017-01-09Fix problems with the implementation of the uzp1 and uzp2 instructions.Jim Wilson1-0/+4
2017-01-04Five fixes, for fcsel, fcvtz, fminnm, mls, and non-widening mul.Jim Wilson1-0/+19
2016-12-21Fix bugs with float compare and Inf operands.Jim Wilson1-0/+6
2016-12-13Fix aarch64 sim bug with adds64, and add testcases for last 3 bug fixes.Jim Wilson1-0/+6
2016-12-03Fix bugs with tbnz/tbz instructions.users/ARM/embedded-binutils-master-2016q4Jim Wilson1-0/+5
2016-12-01Fix typo in ChangeLog entry.Jim Wilson1-1/+1
2016-12-01Fix bug with FP stur instructions.Jim Wilson1-0/+5
2016-08-15sim: unify symbol table handlingMike Frysinger1-0/+19
2016-08-12Undo the previous change to the aarch64 sim - exporting aarch64_step() - and ...Nick Clifton1-0/+10
2016-08-11Export the single step function from the AArch64 simulator.Nick Clifton1-0/+8
2016-07-27Wean gdb and sim off private libbfd.h headerAlan Modra1-0/+4
2016-07-21Fix typo fsqrt -> sqrtf.Nick Clifton1-1/+1
2016-07-21Use fsqrt() to calculate float (rather than double) square root.Nick Clifton1-0/+4
2016-06-30Add support for simulating big-endian AArch64 binaries.Jim Wilson1-0/+8
2016-05-06Add support for FMLA (by element) to AArch64 sim.Nick Clifton1-0/+5
2016-04-27Add support for the --trace-decode option to the AArch64 simulator.Nick Clifton1-0/+5
2016-03-30Fix more bugs in AArch64 simulator.Nick Clifton1-0/+32
2016-03-29Tidy up AArch64 simulator code.Nick Clifton1-0/+9
2016-03-23More AArch64 simulator improvements.Nick Clifton1-0/+55
2016-03-18Fix thinko in new GET_VEC_ELEMENT macro.Nick Clifton1-0/+1
2016-03-18Fix code to check for illegal element numbers when accessing AArch64 vector r...Nick Clifton1-0/+4
2016-03-18Add simulation of MUL and NEG instructions to AArch64 simulator.Nick Clifton1-0/+26
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