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AgeCommit message (Expand)AuthorFilesLines
2023-01-10sim: build: add basic framework for compiling arch objects in top-levelMike Frysinger1-5/+13
2023-01-10sim: modules.c: move generation to top-levelMike Frysinger1-4/+24
2023-01-10sim: build: drop common/nrun.o subdir hackMike Frysinger1-3/+0
2023-01-10sim: build: drop support for creating libsim.a in subdirsMike Frysinger1-3/+0
2023-01-10sim: v850: move libsim.a creation to top-levelMike Frysinger1-15/+61
2023-01-10sim: sh: move libsim.a creation to top-levelMike Frysinger1-23/+55
2023-01-10sim: rx: move libsim.a creation to top-levelMike Frysinger1-25/+61
2023-01-10sim: rl78: move libsim.a creation to top-levelMike Frysinger1-27/+56
2023-01-10sim: riscv: move libsim.a creation to top-levelMike Frysinger1-25/+62
2023-01-10sim: pru: move libsim.a creation to top-levelMike Frysinger1-27/+61
2023-01-10sim: or1k: move libsim.a creation to top-levelMike Frysinger1-31/+87
2023-01-10sim: msp430: move libsim.a creation to top-levelMike Frysinger1-33/+67
2023-01-10sim: moxie: move libsim.a creation to top-levelMike Frysinger1-33/+68
2023-01-10sim: mn10300: move libsim.a creation to top-levelMike Frysinger1-39/+90
2023-01-10sim: mips: move libsim.a creation to top-levelMike Frysinger1-90/+171
2023-01-10sim: microblaze: move libsim.a creation to top-levelMike Frysinger1-53/+87
2023-01-10sim: mcore: move libsim.a creation to top-levelMike Frysinger1-53/+86
2023-01-10sim: m68hc11: move libsim.a creation to top-levelMike Frysinger1-61/+107
2023-01-10sim: m32r: move libsim.a creation to top-levelMike Frysinger1-64/+139
2023-01-10sim: m32c: move libsim.a creation to top-levelMike Frysinger1-72/+109
2023-01-10sim: lm32: move libsim.a creation to top-levelMike Frysinger1-74/+132
2023-01-10sim: iq2000: move libsim.a creation to top-levelMike Frysinger1-79/+133
2023-01-10sim: h8300: move libsim.a creation to top-levelMike Frysinger1-80/+113
2023-01-10sim: ft32: move libsim.a creation to top-levelMike Frysinger1-81/+114
2023-01-10sim: frv: move libsim.a creation to top-levelMike Frysinger1-85/+161
2023-01-10sim: example-synacor: move libsim.a creation to top-levelMike Frysinger1-86/+123
2023-01-10sim: erc32: move libsim.a creation to top-levelMike Frysinger1-94/+125
2023-01-10sim: d10v: move libsim.a creation to top-levelMike Frysinger1-97/+135
2023-01-10sim: cris: move libsim.a creation to top-levelMike Frysinger1-104/+167
2023-01-10sim: cr16: move libsim.a creation to top-levelMike Frysinger1-110/+146
2023-01-10sim: bpf: move libsim.a creation to top-levelMike Frysinger1-114/+171
2023-01-10sim: bfin: move libsim.a creation to top-levelMike Frysinger1-117/+157
2023-01-10sim: avr: move libsim.a creation to top-levelMike Frysinger1-117/+149
2023-01-10sim: arm: move libsim.a creation to top-levelMike Frysinger1-119/+159
2023-01-10sim: aarch64: move libsim.a creation to top-levelMike Frysinger1-120/+160
2023-01-10sim: modules: trigger generation from top-levelMike Frysinger1-7/+34
2023-01-04sim: mips: add multi source to built sourcesMike Frysinger1-1/+2
2023-01-02sim: sh: move some generated source files to built sourcesMike Frysinger1-11/+14
2023-01-02sim: common: drop libcommon.a linkageMike Frysinger1-5/+2
2023-01-02sim: build: move generated headers to built sourcesMike Frysinger1-110/+143
2023-01-02sim: or1k: hoist cgen rules to top-levelMike Frysinger1-0/+10
2023-01-02sim: m32r: hoist cgen rules to top-levelMike Frysinger1-0/+18
2023-01-02sim: lm32: hoist cgen rules to top-levelMike Frysinger1-0/+10
2023-01-02sim: iq2000: hoist cgen rules to top-levelMike Frysinger1-0/+10
2023-01-02sim: frv: hoist cgen rules to top-levelMike Frysinger1-0/+10
2023-01-02sim: cris: hoist cgen rules to top-levelMike Frysinger1-0/+16
2023-01-02sim: bpf: hoist cgen rules to top-levelMike Frysinger1-0/+27
2023-01-02sim: cgen: hoist rules to the top-level buildMike Frysinger1-0/+53
2023-01-02sim: build: use Automake include varsMike Frysinger1-2/+1
2023-01-01sim: refresh copyright dates a bitMike Frysinger1-2/+2
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