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2008-09-302008-09-30 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-132/+210
* i386-gen.c: Include "hashtab.h". (next_field): Take a new argument, last. Check last. (process_i386_cpu_flag): Updated. (process_i386_opcode_modifier): Likewise. (process_i386_operand_type): Likewise. (process_i386_registers): Likewise. (output_i386_opcode): New. (opcode_hash_entry): Likewise. (opcode_hash_table): Likewise. (opcode_hash_hash): Likewise. (opcode_hash_eq): Likewise. (process_i386_opcodes): Use opcode hash table and opcode array.
2008-09-302008-09-30 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>Andreas Krebbel2-2/+6
* s390-opc.txt (stdy, stey): Fix description
2008-09-30run "make dep-am"Alan Modra3-754/+613
2008-09-292008-09-29 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu4-310/+1119
* aclocal.m4: Regenerated. * configure: Likewise. * Makefile.in: Likewise.
2008-09-29 * po/vi.po: Updated Vietnamese translation.Nick Clifton3-460/+898
* po/fr.po: Updated French translation.
2008-09-262008-09-26 Florian Krohm <fkrohm@us.ibm.com>Andreas Krebbel3-10/+17
* s390-opc.txt (thder, thdr): Change RRE_RR to RRE_FF. (cfxr, cfdr, cfer, clclu): Add esa flag. (sqd): Instruction added. (qadtr, qaxtr): Change RRF_FFFU to RRF_FUFF. * s390-opc.c: (INSTR_RRF_FFFU, MASK_RRF_FFFU): Removed. 2008-09-26 Andreas Krebbel <krebbel1@de.ibm.com> * gas/s390/esa-g5.d: Adjust according to the s390-opc changes. * gas/s390/esa-g5.s: Likewise. * gas/s390/esa-z990.d: Likewise. * gas/s390/esa-z990.s: Likewise. * gas/s390/zarch-z900.d: Likewise. * gas/s390/zarch-z900.s: Likewise. * gas/s390/zarch-z990.d: Likewise. * gas/s390/zarch-z990.s: Likewise.
2008-09-14Fix bugs in the disassembly of some ld-instructionsArnold Metselaar2-1/+10
2008-09-11gas/testsuite/H.J. Lu3-48/+53
2008-09-11 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/sse2avx.s: Remove pclmulXXX tests. Add tests for Intel syntax. * gas/i386/x86-64-sse2avx.s: Likewise. * gas/i386/sse2avx.d: Updated. * gas/i386/x86-64-sse2avx.d: Likewise. opcodes/ 2008-09-11 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Fix memory operand size for cmpXXXs[sd]. * i386-tbl.h: Regenerated.
2008-08-28gas/testsuite/Jan Beulich4-2/+30
2008-08-28 Jan Beulich <jbeulich@novell.com> * gas/i386/intel.s: Add retf. * gas/i386/intel.{d,e}: Adjust. * gas/i386/opcode-intel.d: Replace lret with retf. opcodes/ 2008-08-28 Jan Beulich <jbeulich@novell.com> * i386-dis.c (dis386): Adjust far return mnemonics. * i386-opc.tbl: Add retf. * i386-tbl.h: Re-generate.
2008-08-28gas/testsuite/Jan Beulich2-16/+20
2008-08-28 Jan Beulich <jbeulich@novell.com> * gas/i386/gas/i386/opcode-suffix.d: Add suffixes to cmovXX. opcodes/ 2008-08-28 Jan Beulich <jbeulich@novell.com> * i386-dis.c (dis386_twobyte): Adjust cmovXX mnemonics.
2008-08-28gas/H.J. Lu7-831/+852
2008-08-28 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (CR_IIB0): New. (CR_IIB1): Likewise. (cr): Add cr.iib0 and cr.iib1. (specify_resource): Handle IA64_RS_CR_IIB and CR_IIB0/CR_IIB1. gas/testsuite/ 2008-08-28 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add tests for cr.iib0 and cr.iib1. * gas/ia64/dv-waw-err.s: Likewise. * gas/ia64/regs.s: Likewise. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/dv-waw-err.l: Likewise. * gas/ia64/regs.d: Likewise. include/opcode/ 2008-08-28 H.J. Lu <hongjiu.lu@intel.com> * ia64.h (ia64_resource_specifier): Add IA64_RS_CR_IIB. Update IA64_RS_CR. opcodes/ 2008-08-28 H.J. Lu <hongjiu.lu@intel.com> * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1. * ia64-gen.c (lookup_specifier): Likewise. * ia64-ic.tbl: Add support for cr.iib0 and cr.iib1. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated.
2008-08-27gas/testsuite/H.J. Lu3-2/+8
2008-08-27 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/intel.s: Add tests for fidivr. * gas/i386/intel.d: Updated. opcodes/ 2008-08-27 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Correct fidivr operand size. * i386-tbl.h: Regenerated.
2008-08-24Update a number of obsolete autoconf macros.Alan Modra3-16/+9
2008-08-20gas/H.J. Lu4-8/+309
2008-08-20 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (August, 2008) * config/tc-i386.c (CPU_FLAGS_AES_MATCH): New. (CPU_FLAGS_AVX_MATCH): Likewise. (CPU_FLAGS_32BIT_MATCH): Updated. (cpu_flags_match): Likewise. gas/testsuite/ 2008-08-20 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (August, 2008) * gas/i386/avx.s: Add AES + AVX tests. * gas/i386/arch-10.s: Likewise. * gas/i386/sse2avx.s: Likewise. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/x86-64-sse2avx.s: Likewise. * gas/i386/arch-10.d: Updated. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/avx.d: Likewise. * gas/i386/avx-intel.d: Likewise. * gas/i386/sse2avx.d: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. * gas/i386/x86-64-sse2avx.d: Likewise. * gas/i386/i386.exp: Run arch-avx-1, arch-avx-1-1 and arch-avx-1-2. * gas/i386/arch-avx-1.d: New. * gas/i386/arch-avx-1.s: Likewise. * gas/i386/arch-avx-1-1.l: Likewise. * gas/i386/arch-avx-1-1.s: Likewise. * gas/i386/arch-avx-1-2.l: Likewise. * gas/i386/arch-avx-1-2.s: Likewise. opcodes/ 2008-08-20 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (August, 2008) * i386-dis.c (PREFIX_VEX_38DB): New. (PREFIX_VEX_38DC): Likewise. (PREFIX_VEX_38DD): Likewise. (PREFIX_VEX_38DE): Likewise. (PREFIX_VEX_38DF): Likewise. (PREFIX_VEX_3ADF): Likewise. (VEX_LEN_38DB_P_2): Likewise. (VEX_LEN_38DC_P_2): Likewise. (VEX_LEN_38DD_P_2): Likewise. (VEX_LEN_38DE_P_2): Likewise. (VEX_LEN_38DF_P_2): Likewise. (VEX_LEN_3ADF_P_2): Likewise. (PREFIX_VEX_3A04): Updated. (VEX_LEN_3A06_P_2): Likewise. (prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC, PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF. (x86_64_table): Likewise. (vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2, VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and VEX_LEN_3ADF_P_2. * i386-opc.tbl: Add AES + AVX instructions. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2008-08-152008-08-15 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>Andreas Krebbel3-3/+10
* s390-opc.c (INSTR_RRF_FFRU, MASK_RRF_FFRU): New instruction format. * s390-opc.txt (lxr, rrdtr, rrxtr): Fix instruction format. 2008-08-15 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * gas/s390/esa-g5.d: lxr operands are floating point. * gas/s390/esa-g5.s: Likewise. * gas/testsuite/gas/s390/zarch-z9-ec.d: rrdtr, rrxtr third operands is gpr. * gas/testsuite/gas/s390/zarch-z9-ec.s: Likewise.
2008-08-15 PR 6526Alan Modra6-507/+793
* configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
2008-08-14 PR 6825Alan Modra2-3/+8
* ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
2008-08-12gas/testsuite/H.J. Lu3-0/+26
2008-08-12 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/amd.s: Add syscall and sysret. Remove padding. * gas/i386/amd.d: Updated. * gas/i386/x86-64-opcode.d: Likewise. * gas/i386/i386.exp: Run x86-64-intel64. * gas/i386/x86-64-intel64.d: New. * gas/i386/x86-64-intel64.s: Likewise. * gas/i386/x86-64-opcode.s: Add syscall and sysret. opcodes/ 2008-08-12 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Add syscall and sysret for Cpu64. * i386-tbl.h: Regenerated.
2008-08-04Set LC_ALL=C rather than unsetting LC_COLLATE for sort.Alan Modra4-9/+15
2008-08-02gas/Peter Bergner3-1/+177
* config/tc-ppc.c (parse_cpu): Rename altivec_or_spe to retain_flags. Handle -mvsx and -mpower7. (md_show_usage): Document -mpower7 and -mvsx. * doc/as.texinfo (Target PowerPC): Document -mvsx. * doc/c-ppc.texi (PowerPC-Opts): Document -mvsx and -mpower7. gas/testsuite/ * gas/ppc/power7.d: New. * gas/ppc/power7.s: Likewise. * gas/ppc/ppc.exp: Run power7 test. include/opcode/ * ppc.h (PPC_OPCODE_VSX, PPC_OPERAND_VSR): New. opcodes/ * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options. (print_insn_powerpc): Prepend 'vs' when printing VSX registers. (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx. * ppc-opc.c (insert_xt6): New static function. (extract_xt6): Likewise. (insert_xa6): Likewise. (extract_xa6: Likewise. (insert_xb6): Likewise. (extract_xb6): Likewise. (insert_xb6s): Likewise. (extract_xb6s): Likewise. (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK, XX3DM_MASK, PPCVSX): New. (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x", "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
2008-08-01Missed ChangeLog entry for last change.Pedro Alves1-0/+5
* Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation. * Makefile.in: Regenerate.
2008-08-01 * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.Pedro Alves2-4/+6
* Makefile.in: Regenerate.
2008-08-01binutils/H.J. Lu3-32/+37
2008-08-01 H.J. Lu <hongjiu.lu@intel.com> * dwarf.c (dwarf_regnames_i386): Remove AVX registers. (dwarf_regnames_x86_64): Likewise. gas/testsuite/ 2008-08-01 H.J. Lu <hongjiu.lu@intel.com> * gas/cfi/cfi-i386.s: Remove tests for AVX register maps. * gas/cfi/cfi-x86_64.s: Likewise. * gas/cfi/cfi-i386.d: Updated. * gas/cfi/cfi-x86_64.d: Likewise. opcodes/ 2008-08-01 H.J. Lu <hongjiu.lu@intel.com> * i386-reg.tbl: Use Dw2Inval on AVX registers. * i386-tbl.h: Regenerated.
2008-07-30include/opcode/Alan Modra3-7/+113
* ppc.h (PPC_OPCODE_405): Define. (PPC_OPERAND_FSL, PPC_OPERAND_FCR, PPC_OPERAND_UDI): Define. gas/ * config/tc-ppc.c (parse_cpu): Separate handling of -m403/405. (md_show_usage): Likewise. opcodes/ * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields. * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands. (insert_sprg, PPC405): Use PPC_OPCODE_405. (powerpc_opcodes): Add Xilinx APU related opcodes.
2008-07-30Silence gcc printf warningsAlan Modra5-9/+18
2008-07-10include/elf/Richard Sandiford2-2/+6
* mips.h (ELF_ST_IS_MIPS16, ELF_ST_SET_MIPS16): New macros. bfd/ * elfxx-mips.c (mips_elf_check_mips16_stubs): Use ELF_ST_IS_MIPS16. (mips_elf_calculate_relocation): Likewise. (_bfd_mips_elf_add_symbol_hook): Likewise. (_bfd_mips_elf_finish_dynamic_symbol): Likewise. (_bfd_mips_vxworks_finish_dynamic_symbol): Likewise. opcodes/ * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16. gas/ * config/tc-mips.c (mips16_mark_labels): Use ELF_ST_SET_MIPS16. (mips_fix_adjustable): Likewise. (mips_frob_file_after_relocs): Likewise. gas/testsuite/ * gas/mips/mips16-vis-1.d, gas/mips/mips16-vis-1.s: New tests. * gas/mips/mips.exp: Run them.
2008-07-07 * mips-opc.c (CP): New macro.Adam Nemet2-19/+29
(mips_builtin_opcodes): Mark c0, c2 and c3 as CP. Add Octeon to the membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0. Add dmfc2 and dmtc2 Octeon instructions.
2008-07-072008-07-07 Stan Shebs <stan@codesourcery.com>Stan Shebs3-4/+23
* dis-init.c (init_disassemble_info): Init endian_code field. * arm-dis.c (print_insn): Disassemble code according to setting of endian_code. (print_insn_big_arm): Detect when BE8 extension flag has been set.
2008-06-30bfd/Richard Sandiford2-2/+7
* syms.c (BSF_SYNTHETIC): New flag. * elf.c (_bfd_elf_get_synthetic_symtab): Set it. * elf32-ppc.c (ppc_elf_get_synthetic_symtab): Likewise. * elf64-ppc.c (ppc64_elf_get_synthetic_symtab): Likewise. * bfd-in.h (bfd_asymbol_flavour): Return bfd_target_unknown_flavour for synthetic symbols. * bfd-in2.h: Regenerate. opcodes/ * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check for ELF symbols.
2008-06-25gas/Peter Bergner3-1/+15
* config/tc-ppc.c (parse_cpu): Handle -m464. (md_show_usage): Likewise. opcodes/ * ppc-dis.c (powerpc_init_dialect): Handle -M464. (print_ppc_disassembler_options): Likewise. * ppc-opc.c (PPC464): Define. (powerpc_opcodes): Add mfdcrux and mtdcrux.
2008-06-17 * configure: Regenerate.Ralf Wildenhues2-26/+50
config/ * override.m4: Use m4_version_prereq throughout. (_AC_ARG_VAR_VALIDATE, AC_MSG_FAILURE): Backport from git Autoconf: output pwd along with fatal errors, so the right config.log file is hinted at more prominently. (PARSE_ARGS): Push setting of ac_pwd in this diversion. (_GCC_AUTOCONF_VERSION): New, define to 2.59 if not defined. (_GCC_AUTOCONF_VERSION_CHECK): New macro, require use of Autoconf version _GCC_AUTOCONF_VERSION throughout the tree. (m4_wrap): New override, fix for Posix semantics of m4wrap. binutils/ * configure: Regenerate. opcodes/ * configure: Regenerate. bfd/ * configure: Regenerate. gas/ * configure: Regenerate. gprof/ * configure: Regenerate. ld/ * config.in: Regenerate. * configure: Regenerate.
2008-06-13include/opcode/Peter Bergner3-86/+124
* ppc.h (ppc_cpu_t): New typedef. (struct powerpc_opcode <flags>): Use it. (struct powerpc_operand <insert, extract>): Likewise. (struct powerpc_macro <flags>): Likewise. gas/ * config/tc-ppc.c (ppc_cpu): Use ppc_cpu_t typedef. (ppc_insert_operand): Likewise. (ppc_machine): Likewise. * config/tc-ppc.h: #include "opcode/ppc.h" (struct _ppc_fix_extra <ppc_cpu>): Use ppc_cpu_t typedef. (ppc_cpu): Update extern decl. opcodes/ * ppc-dis.c (print_insn_powerpc): Update prototye to use new ppc_cpu_t typedef. (struct dis_private): New. (POWERPC_DIALECT): New define. (powerpc_dialect): Renamed to... (powerpc_init_dialect): This. Update to use ppc_cpu_t and struct dis_private. (print_insn_big_powerpc): Update for using structure in info->private_data. (print_insn_little_powerpc): Likewise. (operand_value_powerpc): Change type of dialect param to ppc_cpu_t. (skip_optional_operands): Likewise. (print_insn_powerpc): Likewise. Remove initialization of dialect. * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp, extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe, extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr, extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm, insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe, insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs, insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect param to be of type ppc_cpu_t. Update prototype.
2008-06-12 * mips.h: Document new field descriptors +Q.Nick Clifton3-0/+15
(OP_SH_SEQI, OP_MASK_SEQI): New bit mask and shift count for SEQI. opcodes/ * mips-dis.c (print_insn_args): Handle field descriptor +Q. * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq, seqi, sne and snei. gas/ * config/tc-mips.c (validate_mips_insn): Handle field descriptor +Q. (mips_ip): Likewise. (macro_build): Likewise. (CPU_HAS_SEQ): New macro. (macro2) <M_SEQ_I, M_SNE_I>: Use it. Emit seq/sne and seqi/snei. gas/testsuite/ * gas/mips/octeon.s, gas/mips/octeon.d: Add tests for seq* and sne*. * gas/mips/octeon-ill.s, gas/mips/octeon-ill.s: Add tests for seqi and snei.
2008-06-12include/opcode/Nick Clifton3-0/+56
* mips.h: Document new field descriptors +x, +X, +p, +P, +s, +S. Update comment before MIPS16 field descriptors to mention MIPS16. (OP_SH_BBITIND, OP_MASK_BBITIND): New bit mask and shift count for BBIT. (OP_SH_CINSPOS, OP_MASK_CINSPOS, OP_SH_CINSLM1, OP_MASK_CINSLM1): New bit masks and shift counts for cins and exts. gas/ * config/tc-mips.c (validate_mips_insn): Handle field descriptors +x, +X, +p, +P, +s, +S. (mips_ip): Likewise. opcodes/ * mips-dis.c (print_insn_args): Handle field descriptors +x, +p, +s, +S. * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs, syncw, syncws, vm3mulu, vm0 and vmulu. gas/testsuite/ * gas/mips/octeon.s, gas/mips/octeon.d: Add tests for baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs, syncw, syncws, vm3mulu, vm0 and vmulu. * gas/mips/octeon-ill.s, gas/mips/octeon-ill.s: New test. * gas/mips/mips.exp: Run it. Run octeon test with run_dump_test_arches.
2008-05-30gas/testsuite/H.J. Lu3-0/+36
2008-05-30 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/x86-64-avx.s: Add tests for vmovd on 64bit operands. * gas/i386/x86-64-sse2avx.s: Add tests for movd on 64bit operands. * gas/testsuite/gas/i386/x86-64-avx.d: Updated. * gas/testsuite/gas/i386/x86-64-avx-intel.d: Likewise. * gas/testsuite/gas/i386/x86-64-sse2avx.d: Likewise. opcodes/ 2008-05-30 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Add vmovd with 64bit operand. * i386-tbl.h: Regenerated.
2008-05-272008-05-27 Martin Schwidefsky <schwidefsky@de.ibm.com>Martin Schwidefsky2-1/+5
* s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format. 2008-05-27 Martin Schwidefsky <schwidefsky@de.ibm.com> * gas/s390/zarch-z990.d (idte): Fix operand format.
2008-05-23gas/testsuite/H.J. Lu3-7/+12
2008-05-22 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/sse-noavx.s: Add tests for cvtpd2pi, cvtpi2pd and cvttpd2pi. * gas/i386/x86-64-sse-noavx.s: Likewise. * gas/i386/sse-noavx.d: Updated. * gas/i386/x86-64-sse-noavx.d: Likewise. opcodes/ 2008-05-22 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi. * i386-tbl.h: Regenerated.
2008-05-22gas/testsuite/H.J. Lu3-12/+104
2008-05-22 H.J. Lu <hongjiu.lu@intel.com> PR gas/6517 * gas/i386/avx.s: Add tests for unspecified memory operand size in Intel syntax. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/simd.s: Add tests for cvtsi2ss and cvtsi2sd with unspecified memory operand size in Intel syntax. * gas/i386/avx.d: Updated. * gas/i386/avx-intel.d: Likewise. * gas/i386/simd.d: Likewise. * gas/i386/simd-intel.d: Likewise. * gas/i386/simd-suffix.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. opcodes/ 2008-05-22 H.J. Lu <hongjiu.lu@intel.com> PR gas/6517 * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss into 32bit and 64bit. Remove Reg64|Qword and add IgnoreSize|No_qSuf on 32bit version. * i386-tbl.h: Regenerated.
2008-05-21gas/testsuite/H.J. Lu3-4/+9
2008-05-21 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/sse-noavx.s: Add tests for movdq2q and movq2dq. * gas/i386/x86-64-sse-noavx.s: Likewise. * gas/i386/sse-noavx.d: Updated. * gas/i386/x86-64-sse-noavx.d: Likewise. opcodes/ 2008-05-21 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq. * i386-tbl.h: Regenerated.
2008-05-21 * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.Nick Clifton2-1/+10
2008-05-14update dependenciesAlan Modra3-5/+12
2008-05-02gas/H.J. Lu7-2485/+2665
2008-05-02 H.J. Lu <hongjiu.lu@intel.com> * NEWS: Mention XSAVE, EPT and MOVBE. * config/tc-i386.c (cpu_arch): Add .movbe and .ept. (md_show_usage): Add .movbe and .ept. * doc/c-i386.texi: Add movbe and ept to -march=. Document .movbe and .ept. gas/testsuite/ 2008-05-02 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run movbe, movbe-intel, inval-movbe, ept, ept-intel, inval-ept, x86-64-movbe, x86-64-movbe-intel, x86-64-inval-movbe. x86-64-ept, x86-64-ept-intel and x86-64-inval-ept. * gas/i386/arch-10.s: Add movbe and invept. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/ept.d: New file * gas/i386/ept-intel.d: Likewise. * gas/i386/ept.s: Likewise. * gas/i386/inval-ept.l: Likewise. * gas/i386/inval-ept.s: Likewise. * gas/i386/inval-movbe.l: Likewise. * gas/i386/inval-movbe.s: Likewise. * gas/i386/movbe.d: Likewise. * gas/i386/movbe-intel.d: Likewise. * gas/i386/movbe.s: Likewise. * gas/i386/x86-64-inval-ept.l: Likewise. * gas/i386/x86-64-inval-ept.s: Likewise. * gas/i386/x86-64-inval-movbe.l: Likewise. * gas/i386/x86-64-inval-movbe.s: Likewise. * gas/i386/x86-64-ept.d: Likewise. * gas/i386/x86-64-ept-intel.d: Likewise. * gas/i386/x86-64-ept.s: Likewise. * gas/i386/x86-64-movbe.d: Likewise. * gas/i386/x86-64-movbe-intel.d: Likewise. * gas/i386/x86-64-movbe.s: Likewise. * gas/i386/arch-10.d: Updated. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. opcodes/ 2008-05-02 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (MOVBE_Fixup): New. (Mo): Likewise. (PREFIX_0F3880): Likewise. (PREFIX_0F3881): Likewise. (PREFIX_0F38F0): Updated. (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881. Update PREFIX_0F38F0 and PREFIX_0F38F1 for movbe. (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881. * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and CPU_EPT_FLAGS. (cpu_flags): Add CpuMovbe and CpuEPT. * i386-opc.h (CpuMovbe): New. (CpuEPT): Likewise. (CpuLM): Updated. (i386_cpu_flags): Add cpumovbe and cpuept. * i386-opc.tbl: Add entries for movbe and EPT instructions. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2008-04-29 * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 forAdam Nemet2-4/+9
the two drem and the two dremu macros.
2008-04-28 * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1Adam Nemet2-23/+30
instructions FP_S. Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and cop1 macros INSN2_M_FP_S. Mark l.d, li.d, ldc1 and sdc1 macros INSN2_M_FP_D. Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
2008-04-25gas/David S. Miller2-1/+6
* config/tc-sparc.c: Accept 'softint_clear' and 'softint_set' %asr aliases. * doc/c-sparc.texi: Consistently refer to architecture 'versions', rather than occaisionally 'levels'. Consistently refer to Sun's UNIX variant as SunOS, every version of Solaris is also SunOS. Document new 'softint_clear' and 'softint_set' aliases. Clarify which architecture versions support '%dcr', '%cq', and '%gl'. Add section on 32-bit/64-bit opcode translations. opcodes/ * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr instead of %sys_tick_cmpr, as suggested in architecture manuals.
2008-04-23bfd/H.J. Lu3-20/+35
2008-04-23 Paolo Bonzini <bonzini@gnu.org> * aclocal.m4: Regenerate. * configure: Regenerate. binutils/ 2008-04-23 Paolo Bonzini <bonzini@gnu.org> * aclocal.m4: Regenerate. * configure: Regenerate. gas/ 2008-04-23 Paolo Bonzini <bonzini@gnu.org> * aclocal.m4: Regenerate. * configure: Regenerate. gold/ 2008-04-23 Paolo Bonzini <bonzini@gnu.org> * aclocal.m4: Regenerate. * configure: Regenerate. gprof/ 2008-04-23 Paolo Bonzini <bonzini@gnu.org> * aclocal.m4: Regenerate. * configure: Regenerate. ld/ 2008-04-23 Paolo Bonzini <bonzini@gnu.org> * aclocal.m4: Regenerate. * configure: Regenerate. opcodes/ 2008-04-23 Paolo Bonzini <bonzini@gnu.org> * aclocal.m4: Regenerate. * configure: Regenerate.
2008-04-23opcodes/David S. Miller2-3/+139
* sparc-opc.c (asi_table): Add UltraSPARC and Niagara extended values. (prefetch_table): Add missing values. gas/ * config/tc-sparc.c (v9a_asr_table): Add missing 'stick' and 'stick_cmpr', and document ordering rules of table. (tc_gen_reloc): Accept BFD_RELOC_SPARC_PC22 and BFD_RELOC_SPARC_PC10. * doc/c-sparc.texi: New section on Sparc constants. Add documentation for %stick and %stick_cmpr. gas/testsuite/ * gas/sparc/pc2210.d: New file. * gas/sparc/pc2210.d: Likewise. * gas/sparc/sparc.exp: Run new %pc22/%pc10 relocation test.
2008-04-22gas/H.J. Lu5-2492/+2508
2008-04-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (md_assemble): Don't check SSE instructions if noavx is 0. opcodes/ 2008-04-22 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (opcode_modifiers): Add NoAVX. * i386-opc.h (NoAVX): New. (OldGcc): Updated. (i386_opcode_modifier): Add noavx. * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3 instructions which don't have AVX equivalent. * i386-tbl.h: Regenerated.
2008-04-18gas/H.J. Lu2-95/+195
2008-04-18 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (build_modrm_byte): Swap REG and NDS for FMA. gas/testsuite/ 2008-04-18 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/arch-10.d: Updated. * gas/i386/avx.d: Likewise. * gas/i386/avx-intel.d: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. opcodes/ 2008-04-18 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_VEX_FMA): New. (OP_EX_VexImmW): Likewise. (VexFMA): Likewise. (Vex128FMA): Likewise. (EXVexImmW): Likewise. (get_vex_imm8): Likewise. (OP_EX_VexReg): Likewise. (vex_i4_done): Renamed to ... (vex_w_done): This. (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps and vpermil2pd. Replace Vex/Vex128 with VexFMA/Vex128FMA on FMA instructions. (print_insn): Updated. (OP_EX_VexW): Rewrite to swap register in VEX with EX. (OP_REG_VexI4): Check invalid high registers.
2008-04-16<opcode changes>Dwarakanath Rajagopal3-12/+18
2008-04-16 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> Michael Meissner <michael.meissner@amd.com> * i386-opc.tbl: Fix protX to allow memory in the middle operand. * i386-tbl.h: Regenerate from i386-opc.tbl. <gas/testsuite changes> 2008-04-16 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> Michael Meissner <michael.meissner@amd.com> * gas/i386/x86-64-sse5.s: Add protX tests to allow memory in the middle operand. * gas/i386/x86-64-sse5.d: Likewise.
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