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path: root/opcodes/sparc-opc.c
AgeCommit message (Expand)AuthorFilesLines
2012-05-17 PR 14072Nick Clifton1-2/+2
2012-04-27Add support for sparc %cfr ASR register.David S. Miller1-0/+3
2012-04-27Add support for sparc pause instruction.David S. Miller1-0/+4
2012-04-27Add support for sparc compare-and-branch instructions.David S. Miller1-0/+30
2012-04-27Add support for SPARC T4 crypto instructions.David S. Miller1-0/+29
2012-04-27Move sparc opcode hwcaps out of sparc_opcode flags field.David S. Miller1-1338/+1338
2011-09-27opcodes/David S. Miller1-1/+1
2011-09-26Add sparc integer multiply-add instructions.David S. Miller1-0/+2
2011-09-21Annotate sparc objects with cpu hardware capabilities used.David S. Miller1-229/+229
2011-09-08opcodes/David S. Miller1-0/+1
2011-09-08opcodes/David S. Miller1-5/+21
2011-09-08opcodes/David S. Miller1-1/+1
2011-08-05include/opcode/David S. Miller1-0/+88
2009-09-02update copyright datesAlan Modra1-1/+1
2008-04-23opcodes/David S. Miller1-3/+133
2007-07-05Change source files over to GPLv3.Nick Clifton1-13/+14
2006-02-252006-02-24 David S. Miller <davem@sunset.davemloft.net>David S. Miller1-0/+11
2005-07-01Update function declarations to ISO C90 formattingNick Clifton1-98/+79
2005-05-07Update the address and phone number of the FSFNick Clifton1-2/+2
2004-04-20 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.Jakub Jelinek1-101/+63
2004-01-18* sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.Jakub Jelinek1-7/+7
2002-10-23Add conditional/unconditional branch classification.Nick Clifton1-19/+19
2001-03-13Fix typos in ChangeLogs; fix dates in copyright noticesNick Clifton1-1/+2
2000-10-20gas/Jakub Jelinek1-7/+32
2000-07-11 * sparc-opc.c (sparc_opcodes): popc has 0 in rs1, not rs2.Jakub Jelinek1-2/+2
2000-04-14More portability patches. Include sysdep.h everywhere.Alan Modra1-1/+1
1999-06-07Jakub Jelinek <jj@ultra.linux.cz>Richard Henderson1-4/+5
1999-06-07Jakub Jelinek <jj@ultra.linux.cz>Richard Henderson1-2/+111
1999-05-0319990502 sourceware importbinu_ss_19990502Richard Henderson1-0/+1920