| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2024-03-01 | x86/APX: optimize certain XOR and SUB forms | Jan Beulich | 1 | -2/+2 |
| 2024-02-23 | x86: also permit YMM/ZMM use in CFI directives | Jan Beulich | 1 | -64/+64 |
| 2024-02-23 | x86/APX: INV{EPT,PCID,VPID} are WIG | Jan Beulich | 1 | -3/+3 |
| 2024-02-16 | x86/APX: drop stray IgnoreSize | Jan Beulich | 1 | -11/+11 |
| 2024-02-16 | x86: don't use VexWIG in SSE2AVX templates | Jan Beulich | 1 | -4/+4 |
| 2024-02-09 | x86/APX: V{BROADCAST,EXTRACT,INSERT}{F,I}128 can also be expressed | Jan Beulich | 1 | -197/+269 |
| 2024-02-09 | x86/APX: VROUND{P,S}{S,D} encodings require AVX512{F,VL} | Jan Beulich | 1 | -4/+4 |
| 2024-01-26 | x86/APX: optimize MOVBE | Jan Beulich | 1 | -34/+34 |
| 2024-01-19 | x86-64: Dwarf2 register numbers for %bnd<N> | Jan Beulich | 1 | -4/+4 |
| 2024-01-19 | x86/APX: VROUND{P,S}{S,D} can generally be encoded | Jan Beulich | 1 | -147/+199 |
| 2024-01-19 | x86: support APX forms of U{RD,WR}MSR | Jan Beulich | 1 | -6/+26 |
| 2024-01-15 | opcodes: x86: new marker for insns that implicitly update stack pointer | Indu Bhagat | 1 | -52/+52 |
| 2024-01-15 | opcodes: gas: x86: define and use Rex2 as attribute not constraint | Indu Bhagat | 1 | -3887/+7772 |
| 2024-01-04 | Update year range in copyright notice of binutils files | Alan Modra | 1 | -1/+1 |
| 2023-12-28 | Support APX pushp/popp | Cui, Lili | 1 | -182/+198 |
| 2023-12-28 | Support APX Push2/Pop2 | Mo, Zewei | 1 | -1/+42 |
| 2023-12-28 | Support APX NDD | konglin1 | 1 | -285/+1348 |
| 2023-12-28 | Support APX GPR32 with extend evex prefix | Cui, Lili | 1 | -4087/+4407 |
| 2023-12-28 | Support APX GPR32 with rex2 prefix | Cui, Lili | 1 | -11373/+11637 |
| 2023-12-19 | x86: Remove the restriction for size of the mask register in AVX10 | Haochen Jiang | 1 | -3743/+3743 |
| 2023-12-15 | revert "x86: allow 32-bit reg to be used with U{RD,WR}MSR" | Jan Beulich | 1 | -2/+2 |
| 2023-12-15 | x86: fold assembly dialect attributes | Jan Beulich | 1 | -7486/+3743 |
| 2023-12-15 | x86: Intel syntax implies Intel mnemonics | Jan Beulich | 1 | -308/+276 |
| 2023-12-01 | x86: allow 32-bit reg to be used with U{RD,WR}MSR | Jan Beulich | 1 | -2/+2 |
| 2023-11-24 | x86: shrink opcode sets table | Jan Beulich | 1 | -2343/+295 |
| 2023-11-17 | x86: CPU-qualify {disp16} / {disp32} | Jan Beulich | 1 | -2/+2 |
| 2023-11-09 | x86: rework UWRMSR operand swapping | Jan Beulich | 1 | -2/+2 |
| 2023-11-09 | x86: do away with is_evex_encoding() | Jan Beulich | 1 | -575/+575 |
| 2023-11-09 | x86: split insn templates' CPU field | Jan Beulich | 1 | -161/+3908 |
| 2023-10-31 | Support Intel USER_MSR | Hu, Lin1 | 1 | -117/+155 |
| 2023-09-27 | x86: fold FMA VEX and EVEX templates | Jan Beulich | 1 | -1157/+497 |
| 2023-09-27 | x86: fold VAES/VPCLMULQDQ VEX and EVEX templates | Jan Beulich | 1 | -299/+198 |
| 2023-09-27 | x86: fold certain VEX and EVEX templates | Jan Beulich | 1 | -955/+621 |
| 2023-09-15 | x86: fold CpuLM and Cpu64 | Jan Beulich | 1 | -2188/+2188 |
| 2023-09-14 | x86: support AVX10.1 vector size restrictions | Jan Beulich | 1 | -3846/+7692 |
| 2023-09-14 | x86: make AES/PCMULQDQ respectively prereqs of VAES/VPCMULQDQ | Jan Beulich | 1 | -290/+290 |
| 2023-09-01 | x86: drop Size64 from VMOVQ | Jan Beulich | 1 | -1/+1 |
| 2023-08-11 | x86: pack CPU flags in opcode table | Jan Beulich | 1 | -30768/+3846 |
| 2023-08-02 | Revert "2.41 Release sources" | Sam James | 1 | -4415/+8525 |
| 2023-08-02 | 2.41 Release sourcesbinutils-2_41-release | Nick Clifton | 1 | -8525/+4415 |
| 2023-07-27 | Support Intel PBNDKB | Hu, Lin1 | 1 | -3923/+3938 |
| 2023-07-27 | Support Intel SM4 | Haochen Jiang | 1 | -4439/+4477 |
| 2023-07-27 | Support Intel SM3 | Haochen Jiang | 1 | -4617/+4676 |
| 2023-07-27 | Support Intel SHA512 | Haochen Jiang | 1 | -4697/+4750 |
| 2023-07-27 | Support Intel AVX-VNNI-INT16 | konglin1 | 1 | -3991/+7936 |
| 2023-07-04 | x86: optimize 128-bit VPBROADCASTQ to VPUNPCKLQDQ | Jan Beulich | 1 | -2/+2 |
| 2023-07-04 | x86: optimize pre-AVX512 {,V}PCMPGT* with identical sources | Jan Beulich | 1 | -15/+15 |
| 2023-07-04 | x86: optimize pre-AVX512 {,V}PCMPEQQ with identical sources | Jan Beulich | 1 | -3/+3 |
| 2023-06-16 | x86: shrink Masking insn attribute to a single bit (boolean) | Jan Beulich | 1 | -1057/+1057 |
| 2023-05-23 | Support Intel FRED LKGS | Zhang, Jun | 1 | -3913/+3967 |
