| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2018-03-08 | x86: Remove support for old (<= 2.8.1) versions of gcc | H.J. Lu | 1 | -3/+0 |
| 2018-03-08 | x86: fold several AVX512VL templates | Jan Beulich | 1 | -0/+2 |
| 2018-03-08 | x86: drop FloatD | Jan Beulich | 1 | -3/+0 |
| 2018-02-27 | x86: Add -O[2|s] assembler command-line options | H.J. Lu | 1 | -0/+4 |
| 2018-01-23 | Enable Intel PCONFIG instruction. | Igor Tsimbalist | 1 | -0/+3 |
| 2018-01-23 | Enable Intel WBNOINVD instruction. | Igor Tsimbalist | 1 | -0/+3 |
| 2018-01-17 | Replace CET bit with IBT and SHSTK bits. | Igor Tsimbalist | 1 | -3/+5 |
| 2018-01-03 | Update year range in copyright notice of binutils files | Alan Modra | 1 | -1/+1 |
| 2017-12-18 | x86: fold certain AVX and AVX2 templates | Jan Beulich | 1 | -1/+1 |
| 2017-12-18 | x86: fold RegXMM/RegYMM/RegZMM into RegSIMD | Jan Beulich | 1 | -13/+4 |
| 2017-12-18 | x86: drop FloatReg and FloatAcc | Jan Beulich | 1 | -7/+1 |
| 2017-12-18 | x86: replace Reg8, Reg16, Reg32, and Reg64 | Jan Beulich | 1 | -12/+3 |
| 2017-11-30 | x86: drop Vec_Disp8 | Jan Beulich | 1 | -4/+0 |
| 2017-10-23 | Enable Intel AVX512_BITALG instructions. | Igor Tsimbalist | 1 | -0/+3 |
| 2017-10-23 | Enable Intel AVX512_VNNI instructions. | Igor Tsimbalist | 1 | -1/+4 |
| 2017-10-23 | Enable Intel VPCLMULQDQ instruction. | Igor Tsimbalist | 1 | -1/+4 |
| 2017-10-23 | Enable Intel VAES instructions. | Igor Tsimbalist | 1 | -0/+3 |
| 2017-10-23 | Enable Intel GFNI instructions. | Igor Tsimbalist | 1 | -2/+3 |
| 2017-10-23 | Enable Intel AVX512_VBMI2 instructions. | Igor Tsimbalist | 1 | -2/+5 |
| 2017-05-22 | x86: Add NOTRACK prefix support | H.J. Lu | 1 | -0/+3 |
| 2017-03-09 | X86: Add pseudo prefixes to control encoding | H.J. Lu | 1 | -4/+3 |
| 2017-03-06 | Add support for Intel CET instructions | H.J. Lu | 1 | -0/+5 |
| 2017-01-12 | Enable Intel AVX512_VPOPCNTDQ instructions | Igor Tsimbalist | 1 | -0/+3 |
| 2017-01-02 | Update year range in copyright notice of all files. | Alan Modra | 1 | -1/+1 |
| 2016-11-02 | Enable Intel AVX512_4VNNIW instructions | Igor Tsimbalist | 1 | -0/+3 |
| 2016-11-02 | Enable Intel AVX512_4FMAPS instructions | Igor Tsimbalist | 1 | -0/+9 |
| 2016-10-21 | X86: Remove pcommit instruction | H.J. Lu | 1 | -3/+0 |
| 2016-08-24 | X86: Add ptwrite instruction | H.J. Lu | 1 | -0/+3 |
| 2016-05-27 | Update x86 CPU_XXX_FLAGS handling | H.J. Lu | 1 | -0/+15 |
| 2016-05-27 | Replace CpuAMD64/CpuIntel64 with AMD64/Intel64 | H.J. Lu | 1 | -7/+7 |
| 2016-05-27 | Correct CpuMax in i386-opc.h | H.J. Lu | 1 | -1/+1 |
| 2016-05-10 | Enable Intel RDPID instruction. | Alexander Fomin | 1 | -0/+3 |
| 2016-01-01 | Copyright update for binutils | Alan Modra | 1 | -1/+1 |
| 2015-12-09 | Implement Intel OSPKE instructions | H.J. Lu | 1 | -0/+3 |
| 2015-08-12 | Remove trailing spaces in opcodes | H.J. Lu | 1 | -1/+1 |
| 2015-06-30 | Add support for monitorx/mwaitx instructions | Amit Pawar | 1 | -0/+3 |
| 2015-05-15 | Support AMD64/Intel ISAs in assembler/disassembler | H.J. Lu | 1 | -0/+6 |
| 2015-05-11 | Add Intel MCU support to opcodes | H.J. Lu | 1 | -0/+3 |
| 2015-03-17 | Add znver1 processor | Ganesh Gopalasubramanian | 1 | -0/+3 |
| 2015-01-02 | ChangeLog rotatation and copyright year update | Alan Modra | 1 | -1/+1 |
| 2014-11-17 | Add AVX512VBMI instructions | Ilya Tocar | 1 | -0/+3 |
| 2014-11-17 | Add AVX512IFMA instructions | Ilya Tocar | 1 | -0/+3 |
| 2014-11-17 | Add pcommit instruction | Ilya Tocar | 1 | -0/+3 |
| 2014-11-17 | Add clwb instruction | Ilya Tocar | 1 | -0/+3 |
| 2014-07-22 | Add AVX512DQ instructions and their AVX512VL variants. | Ilya Tocar | 1 | -0/+3 |
| 2014-07-22 | Add support for AVX512BW instructions and their AVX512VL versions. | Ilya Tocar | 1 | -0/+3 |
| 2014-07-22 | Add support for AVX512VL. Add AVX512VL versions of AVX512F instructions. | Ilya Tocar | 1 | -0/+5 |
| 2014-04-04 | Add support for Intel SGX instructions | Ilya Tocar | 1 | -0/+3 |
| 2014-03-05 | Update copyright years | Alan Modra | 1 | -2/+1 |
| 2014-02-21 | Add support for CPUID PREFETCHWT1 | Ilya Tocar | 1 | -0/+3 |
