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path: root/opcodes/i386-init.h
AgeCommit message (Expand)AuthorFilesLines
2019-11-07x86: support further AMD Zen2 instructionsJan Beulich1-166/+182
2019-07-16x86: make RegMem an opcode modifierJan Beulich1-48/+48
2019-07-16x86: fold SReg{2,3}Jan Beulich1-124/+71
2019-07-01x86: drop Vec_Imm4Jan Beulich1-55/+50
2019-06-25x86: correct / adjust debug printingJan Beulich1-9/+14
2019-06-04Enable Intel AVX512_VP2INTERSECT insnH.J. Lu1-184/+200
2019-06-04Add support for Intel ENQCMD[S] instructionsH.J. Lu1-162/+178
2019-04-05x86: Support Intel AVX512 BF16Xuepeng Guo1-181/+197
2019-03-19ix86: Disable AVX512F when disabling AVX2H.J. Lu1-6/+6
2019-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2018-08-11x86: Add CpuCMOV and CpuFXSRH.J. Lu1-417/+449
2018-08-03x86: drop "mem" operand type attributeJan Beulich1-62/+62
2018-07-31x86: drop CpuVREXJan Beulich1-216/+216
2018-07-11x86: drop {,reg16_}inoutportreg variablesJan Beulich1-10/+0
2018-05-30Add znver2 support.Amit Pawar1-0/+8
2018-05-07Enable Intel MOVDIRI, MOVDIR64B instructionsH.J. Lu1-151/+183
2018-04-27Revert "Enable Intel MOVDIRI, MOVDIR64B instructions."Igor Tsimbalist1-183/+151
2018-04-26Enable Intel MOVDIRI, MOVDIR64B instructions.Igor Tsimbalist1-151/+183
2018-04-26x86: CpuXSAVE is a prereq for various other featuresJan Beulich1-24/+24
2018-04-26x86: drop CpuRegMMX, CpuReg[XYZ]MM, and CpuRegMaskJan Beulich1-151/+151
2018-04-26x86: x87-related adjustmentsJan Beulich1-21/+21
2018-04-17Enable Intel CLDEMOTE instruction.Igor Tsimbalist1-174/+182
2018-04-11Enable Intel WAITPKG instructions.Igor Tsimbalist1-204/+212
2018-01-23Enable Intel PCONFIG instruction.Igor Tsimbalist1-203/+211
2018-01-23Enable Intel WBNOINVD instruction.Igor Tsimbalist1-203/+211
2018-01-17Replace CET bit with IBT and SHSTK bits.Igor Tsimbalist1-204/+228
2018-01-03Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2017-12-18x86: fold RegXMM/RegYMM/RegZMM into RegSIMDJan Beulich1-108/+108
2017-12-18x86: drop FloatReg and FloatAccJan Beulich1-108/+108
2017-12-18x86: replace Reg8, Reg16, Reg32, and Reg64Jan Beulich1-116/+116
2017-11-30x86: drop Vec_Disp8Jan Beulich1-56/+51
2017-10-23Fix the master due to bad regenerated filesIgor Tsimbalist1-139/+318
2017-10-23Enable Intel VAES instructions.Igor Tsimbalist1-138/+145
2017-10-23Enable Intel GFNI instructions.Igor Tsimbalist1-137/+144
2017-10-23Enable Intel AVX512_VBMI2 instructions.Igor Tsimbalist1-135/+149
2017-03-06Add support for Intel CET instructionsH.J. Lu1-56/+63
2017-01-12Enable Intel AVX512_VPOPCNTDQ instructionsIgor Tsimbalist1-132/+146
2017-01-02Update year range in copyright notice of all files.Alan Modra1-1/+1
2016-11-02Enable Intel AVX512_4VNNIW instructionsIgor Tsimbalist1-130/+144
2016-11-02Enable Intel AVX512_4FMAPS instructionsIgor Tsimbalist1-128/+142
2016-10-21X86: Remove pcommit instructionH.J. Lu1-140/+133
2016-09-07X86: Allow additional ISAs for IAMCU in assemblerH.J. Lu1-7/+0
2016-08-24X86: Add ptwrite instructionH.J. Lu1-129/+136
2016-05-29Add .noavx512XX directives to x86 assemblerH.J. Lu1-0/+63
2016-05-27Update x86 CPU_XXX_FLAGS handlingH.J. Lu1-182/+252
2016-05-27Replace CpuAMD64/CpuIntel64 with AMD64/Intel64H.J. Lu1-110/+110
2016-05-25Enable VREX for all AVX512 directivesH.J. Lu1-38/+38
2016-05-25Enable VREX for AVX512 directivesH.J. Lu1-4/+4
2016-05-25Reimplement .no87/.nommx/.nosse/.noavx directivesH.J. Lu1-1/+8
2016-05-10Enable Intel RDPID instruction.Alexander Fomin1-108/+115
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