aboutsummaryrefslogtreecommitdiff
path: root/opcodes/i386-gen.c
AgeCommit message (Expand)AuthorFilesLines
2019-11-12x86: fold EsSeg into IsStringJan Beulich1-4/+1
2019-11-12x86: eliminate ImmExt abuseJan Beulich1-0/+1
2019-11-12x86: introduce operand type "instance"Jan Beulich1-17/+42
2019-11-08x86: convert RegMask and RegBND from bitfield to enumeratorJan Beulich1-5/+5
2019-11-08x86: convert RegSIMD and RegMMX from bitfield to enumeratorJan Beulich1-6/+6
2019-11-08x86: convert Control/Debug/Test from bitfield to enumeratorJan Beulich1-6/+6
2019-11-08x86: convert SReg from bitfield to enumeratorJan Beulich1-2/+2
2019-11-08x86: introduce operand type "class"Jan Beulich1-13/+42
2019-11-07x86: support further AMD Zen2 instructionsJan Beulich1-1/+7
2019-10-30x86: re-do "shorthand" handlingJan Beulich1-42/+13
2019-10-30x86: slightly rearrange struct insn_templateJan Beulich1-2/+1
2019-10-30x86: drop stray WJan Beulich1-0/+24
2019-07-17x86: drop stale Mem enumeratorJan Beulich1-1/+15
2019-07-16x86: make RegMem an opcode modifierJan Beulich1-1/+1
2019-07-16x86: fold SReg{2,3}Jan Beulich1-6/+3
2019-07-01x86: drop Vec_Imm4Jan Beulich1-3/+0
2019-06-25x86: correct / adjust debug printingJan Beulich1-5/+7
2019-06-04Enable Intel AVX512_VP2INTERSECT insnH.J. Lu1-1/+6
2019-06-04Add support for Intel ENQCMD[S] instructionsH.J. Lu1-0/+5
2019-04-05x86: Support Intel AVX512 BF16Xuepeng Guo1-1/+6
2019-03-19ix86: Disable AVX512F when disabling AVX2H.J. Lu1-1/+1
2019-01-01Update year range in copyright notice of binutils filesAlan Modra1-2/+2
2018-10-10x86: fold Size{16,32,64} template attributesJan Beulich1-3/+1
2018-08-11x86: Add CpuCMOV and CpuFXSRH.J. Lu1-1/+11
2018-08-03x86: drop "mem" operand type attributeJan Beulich1-1/+0
2018-07-31x86: drop CpuVREXJan Beulich1-3/+2
2018-07-25x86: Expand Broadcast to 3 bitsH.J. Lu1-4/+57
2018-07-19x86: pre-process opcodes table before parsingJan Beulich1-6/+23
2018-07-11x86: drop {,reg16_}inoutportreg variablesJan Beulich1-4/+0
2018-05-30Add znver2 support.Amit Pawar1-0/+2
2018-05-07Enable Intel MOVDIRI, MOVDIR64B instructionsH.J. Lu1-0/+10
2018-05-07x86: Replace AddrPrefixOp0 with AddrPrefixOpRegH.J. Lu1-1/+1
2018-04-27Revert "Enable Intel MOVDIRI, MOVDIR64B instructions."Igor Tsimbalist1-16/+0
2018-04-26Enable Intel MOVDIRI, MOVDIR64B instructions.Igor Tsimbalist1-0/+16
2018-04-26x86: CpuXSAVE is a prereq for various other featuresJan Beulich1-7/+7
2018-04-26x86: drop CpuRegMMX, CpuReg[XYZ]MM, and CpuRegMaskJan Beulich1-15/+6
2018-04-26x86: x87-related adjustmentsJan Beulich1-3/+3
2018-04-26x86: drop VexImmExtJan Beulich1-1/+0
2018-04-17Enable Intel CLDEMOTE instruction.Igor Tsimbalist1-0/+3
2018-04-11Enable Intel WAITPKG instructions.Igor Tsimbalist1-0/+3
2018-03-28x86: drop VecESizeJan Beulich1-1/+0
2018-03-08x86: Remove support for old (<= 2.8.1) versions of gccH.J. Lu1-1/+0
2018-03-08x86: drop FloatDJan Beulich1-1/+0
2018-03-03opcodes error messagesAlan Modra1-4/+4
2018-02-27x86: Add -O[2|s] assembler command-line optionsH.J. Lu1-0/+1
2018-01-23Enable Intel PCONFIG instruction.Igor Tsimbalist1-0/+3
2018-01-23Enable Intel WBNOINVD instruction.Igor Tsimbalist1-0/+3
2018-01-17Replace CET bit with IBT and SHSTK bits.Igor Tsimbalist1-3/+10
2018-01-03Update year range in copyright notice of binutils filesAlan Modra1-2/+2
2018-01-02x86: partial revert of 10c17abdd0Jan Beulich1-0/+4
generated by cgit v1.1 at 2024-11-21 17:39:42 +0000